esp32p4/
gpio_sd.rs

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1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5    sigmadelta: [SIGMADELTA; 8],
6    clock_gate: CLOCK_GATE,
7    sigmadelta_misc: SIGMADELTA_MISC,
8    _reserved3: [u8; 0x08],
9    glitch_filter_ch: [GLITCH_FILTER_CH; 8],
10    _reserved4: [u8; 0x10],
11    etm_event_ch_cfg: [ETM_EVENT_CH_CFG; 8],
12    _reserved5: [u8; 0x20],
13    etm_task_p0_cfg: ETM_TASK_P0_CFG,
14    etm_task_p1_cfg: ETM_TASK_P1_CFG,
15    etm_task_p2_cfg: ETM_TASK_P2_CFG,
16    etm_task_p3_cfg: ETM_TASK_P3_CFG,
17    etm_task_p4_cfg: ETM_TASK_P4_CFG,
18    etm_task_p5_cfg: ETM_TASK_P5_CFG,
19    etm_task_p6_cfg: ETM_TASK_P6_CFG,
20    etm_task_p7_cfg: ETM_TASK_P7_CFG,
21    etm_task_p8_cfg: ETM_TASK_P8_CFG,
22    etm_task_p9_cfg: ETM_TASK_P9_CFG,
23    etm_task_p10_cfg: ETM_TASK_P10_CFG,
24    etm_task_p11_cfg: ETM_TASK_P11_CFG,
25    etm_task_p12_cfg: ETM_TASK_P12_CFG,
26    etm_task_p13_cfg: ETM_TASK_P13_CFG,
27    _reserved19: [u8; 0x24],
28    version: VERSION,
29}
30impl RegisterBlock {
31    #[doc = "0x00..0x20 - Duty Cycle Configure Register of SDM%s"]
32    #[inline(always)]
33    pub const fn sigmadelta(&self, n: usize) -> &SIGMADELTA {
34        &self.sigmadelta[n]
35    }
36    #[doc = "Iterator for array of:"]
37    #[doc = "0x00..0x20 - Duty Cycle Configure Register of SDM%s"]
38    #[inline(always)]
39    pub fn sigmadelta_iter(&self) -> impl Iterator<Item = &SIGMADELTA> {
40        self.sigmadelta.iter()
41    }
42    #[doc = "0x20 - Clock Gating Configure Register"]
43    #[inline(always)]
44    pub const fn clock_gate(&self) -> &CLOCK_GATE {
45        &self.clock_gate
46    }
47    #[doc = "0x24 - MISC Register"]
48    #[inline(always)]
49    pub const fn sigmadelta_misc(&self) -> &SIGMADELTA_MISC {
50        &self.sigmadelta_misc
51    }
52    #[doc = "0x30..0x50 - Glitch Filter Configure Register of Channel%s"]
53    #[inline(always)]
54    pub const fn glitch_filter_ch(&self, n: usize) -> &GLITCH_FILTER_CH {
55        &self.glitch_filter_ch[n]
56    }
57    #[doc = "Iterator for array of:"]
58    #[doc = "0x30..0x50 - Glitch Filter Configure Register of Channel%s"]
59    #[inline(always)]
60    pub fn glitch_filter_ch_iter(&self) -> impl Iterator<Item = &GLITCH_FILTER_CH> {
61        self.glitch_filter_ch.iter()
62    }
63    #[doc = "0x60..0x80 - Etm Config register of Channel%s"]
64    #[inline(always)]
65    pub const fn etm_event_ch_cfg(&self, n: usize) -> &ETM_EVENT_CH_CFG {
66        &self.etm_event_ch_cfg[n]
67    }
68    #[doc = "Iterator for array of:"]
69    #[doc = "0x60..0x80 - Etm Config register of Channel%s"]
70    #[inline(always)]
71    pub fn etm_event_ch_cfg_iter(&self) -> impl Iterator<Item = &ETM_EVENT_CH_CFG> {
72        self.etm_event_ch_cfg.iter()
73    }
74    #[doc = "0x60 - Etm Config register of Channel0"]
75    #[inline(always)]
76    pub const fn etm_event_ch0_cfg(&self) -> &ETM_EVENT_CH_CFG {
77        self.etm_event_ch_cfg(0)
78    }
79    #[doc = "0x64 - Etm Config register of Channel1"]
80    #[inline(always)]
81    pub const fn etm_event_ch1_cfg(&self) -> &ETM_EVENT_CH_CFG {
82        self.etm_event_ch_cfg(1)
83    }
84    #[doc = "0x68 - Etm Config register of Channel2"]
85    #[inline(always)]
86    pub const fn etm_event_ch2_cfg(&self) -> &ETM_EVENT_CH_CFG {
87        self.etm_event_ch_cfg(2)
88    }
89    #[doc = "0x6c - Etm Config register of Channel3"]
90    #[inline(always)]
91    pub const fn etm_event_ch3_cfg(&self) -> &ETM_EVENT_CH_CFG {
92        self.etm_event_ch_cfg(3)
93    }
94    #[doc = "0x70 - Etm Config register of Channel4"]
95    #[inline(always)]
96    pub const fn etm_event_ch4_cfg(&self) -> &ETM_EVENT_CH_CFG {
97        self.etm_event_ch_cfg(4)
98    }
99    #[doc = "0x74 - Etm Config register of Channel5"]
100    #[inline(always)]
101    pub const fn etm_event_ch5_cfg(&self) -> &ETM_EVENT_CH_CFG {
102        self.etm_event_ch_cfg(5)
103    }
104    #[doc = "0x78 - Etm Config register of Channel6"]
105    #[inline(always)]
106    pub const fn etm_event_ch6_cfg(&self) -> &ETM_EVENT_CH_CFG {
107        self.etm_event_ch_cfg(6)
108    }
109    #[doc = "0x7c - Etm Config register of Channel7"]
110    #[inline(always)]
111    pub const fn etm_event_ch7_cfg(&self) -> &ETM_EVENT_CH_CFG {
112        self.etm_event_ch_cfg(7)
113    }
114    #[doc = "0xa0 - Etm Configure Register to decide which GPIO been chosen"]
115    #[inline(always)]
116    pub const fn etm_task_p0_cfg(&self) -> &ETM_TASK_P0_CFG {
117        &self.etm_task_p0_cfg
118    }
119    #[doc = "0xa4 - Etm Configure Register to decide which GPIO been chosen"]
120    #[inline(always)]
121    pub const fn etm_task_p1_cfg(&self) -> &ETM_TASK_P1_CFG {
122        &self.etm_task_p1_cfg
123    }
124    #[doc = "0xa8 - Etm Configure Register to decide which GPIO been chosen"]
125    #[inline(always)]
126    pub const fn etm_task_p2_cfg(&self) -> &ETM_TASK_P2_CFG {
127        &self.etm_task_p2_cfg
128    }
129    #[doc = "0xac - Etm Configure Register to decide which GPIO been chosen"]
130    #[inline(always)]
131    pub const fn etm_task_p3_cfg(&self) -> &ETM_TASK_P3_CFG {
132        &self.etm_task_p3_cfg
133    }
134    #[doc = "0xb0 - Etm Configure Register to decide which GPIO been chosen"]
135    #[inline(always)]
136    pub const fn etm_task_p4_cfg(&self) -> &ETM_TASK_P4_CFG {
137        &self.etm_task_p4_cfg
138    }
139    #[doc = "0xb4 - Etm Configure Register to decide which GPIO been chosen"]
140    #[inline(always)]
141    pub const fn etm_task_p5_cfg(&self) -> &ETM_TASK_P5_CFG {
142        &self.etm_task_p5_cfg
143    }
144    #[doc = "0xb8 - Etm Configure Register to decide which GPIO been chosen"]
145    #[inline(always)]
146    pub const fn etm_task_p6_cfg(&self) -> &ETM_TASK_P6_CFG {
147        &self.etm_task_p6_cfg
148    }
149    #[doc = "0xbc - Etm Configure Register to decide which GPIO been chosen"]
150    #[inline(always)]
151    pub const fn etm_task_p7_cfg(&self) -> &ETM_TASK_P7_CFG {
152        &self.etm_task_p7_cfg
153    }
154    #[doc = "0xc0 - Etm Configure Register to decide which GPIO been chosen"]
155    #[inline(always)]
156    pub const fn etm_task_p8_cfg(&self) -> &ETM_TASK_P8_CFG {
157        &self.etm_task_p8_cfg
158    }
159    #[doc = "0xc4 - Etm Configure Register to decide which GPIO been chosen"]
160    #[inline(always)]
161    pub const fn etm_task_p9_cfg(&self) -> &ETM_TASK_P9_CFG {
162        &self.etm_task_p9_cfg
163    }
164    #[doc = "0xc8 - Etm Configure Register to decide which GPIO been chosen"]
165    #[inline(always)]
166    pub const fn etm_task_p10_cfg(&self) -> &ETM_TASK_P10_CFG {
167        &self.etm_task_p10_cfg
168    }
169    #[doc = "0xcc - Etm Configure Register to decide which GPIO been chosen"]
170    #[inline(always)]
171    pub const fn etm_task_p11_cfg(&self) -> &ETM_TASK_P11_CFG {
172        &self.etm_task_p11_cfg
173    }
174    #[doc = "0xd0 - Etm Configure Register to decide which GPIO been chosen"]
175    #[inline(always)]
176    pub const fn etm_task_p12_cfg(&self) -> &ETM_TASK_P12_CFG {
177        &self.etm_task_p12_cfg
178    }
179    #[doc = "0xd4 - Etm Configure Register to decide which GPIO been chosen"]
180    #[inline(always)]
181    pub const fn etm_task_p13_cfg(&self) -> &ETM_TASK_P13_CFG {
182        &self.etm_task_p13_cfg
183    }
184    #[doc = "0xfc - Version Control Register"]
185    #[inline(always)]
186    pub const fn version(&self) -> &VERSION {
187        &self.version
188    }
189}
190#[doc = "SIGMADELTA (rw) register accessor: Duty Cycle Configure Register of SDM%s\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sigmadelta::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sigmadelta::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sigmadelta`] module"]
191pub type SIGMADELTA = crate::Reg<sigmadelta::SIGMADELTA_SPEC>;
192#[doc = "Duty Cycle Configure Register of SDM%s"]
193pub mod sigmadelta;
194#[doc = "CLOCK_GATE (rw) register accessor: Clock Gating Configure Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clock_gate::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clock_gate::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clock_gate`] module"]
195pub type CLOCK_GATE = crate::Reg<clock_gate::CLOCK_GATE_SPEC>;
196#[doc = "Clock Gating Configure Register"]
197pub mod clock_gate;
198#[doc = "SIGMADELTA_MISC (rw) register accessor: MISC Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sigmadelta_misc::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sigmadelta_misc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sigmadelta_misc`] module"]
199pub type SIGMADELTA_MISC = crate::Reg<sigmadelta_misc::SIGMADELTA_MISC_SPEC>;
200#[doc = "MISC Register"]
201pub mod sigmadelta_misc;
202#[doc = "GLITCH_FILTER_CH (rw) register accessor: Glitch Filter Configure Register of Channel%s\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`glitch_filter_ch::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`glitch_filter_ch::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@glitch_filter_ch`] module"]
203pub type GLITCH_FILTER_CH = crate::Reg<glitch_filter_ch::GLITCH_FILTER_CH_SPEC>;
204#[doc = "Glitch Filter Configure Register of Channel%s"]
205pub mod glitch_filter_ch;
206#[doc = "ETM_EVENT_CH_CFG (rw) register accessor: Etm Config register of Channel%s\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`etm_event_ch_cfg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`etm_event_ch_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@etm_event_ch_cfg`] module"]
207pub type ETM_EVENT_CH_CFG = crate::Reg<etm_event_ch_cfg::ETM_EVENT_CH_CFG_SPEC>;
208#[doc = "Etm Config register of Channel%s"]
209pub mod etm_event_ch_cfg;
210#[doc = "ETM_TASK_P0_CFG (rw) register accessor: Etm Configure Register to decide which GPIO been chosen\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`etm_task_p0_cfg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`etm_task_p0_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@etm_task_p0_cfg`] module"]
211pub type ETM_TASK_P0_CFG = crate::Reg<etm_task_p0_cfg::ETM_TASK_P0_CFG_SPEC>;
212#[doc = "Etm Configure Register to decide which GPIO been chosen"]
213pub mod etm_task_p0_cfg;
214#[doc = "ETM_TASK_P1_CFG (rw) register accessor: Etm Configure Register to decide which GPIO been chosen\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`etm_task_p1_cfg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`etm_task_p1_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@etm_task_p1_cfg`] module"]
215pub type ETM_TASK_P1_CFG = crate::Reg<etm_task_p1_cfg::ETM_TASK_P1_CFG_SPEC>;
216#[doc = "Etm Configure Register to decide which GPIO been chosen"]
217pub mod etm_task_p1_cfg;
218#[doc = "ETM_TASK_P2_CFG (rw) register accessor: Etm Configure Register to decide which GPIO been chosen\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`etm_task_p2_cfg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`etm_task_p2_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@etm_task_p2_cfg`] module"]
219pub type ETM_TASK_P2_CFG = crate::Reg<etm_task_p2_cfg::ETM_TASK_P2_CFG_SPEC>;
220#[doc = "Etm Configure Register to decide which GPIO been chosen"]
221pub mod etm_task_p2_cfg;
222#[doc = "ETM_TASK_P3_CFG (rw) register accessor: Etm Configure Register to decide which GPIO been chosen\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`etm_task_p3_cfg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`etm_task_p3_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@etm_task_p3_cfg`] module"]
223pub type ETM_TASK_P3_CFG = crate::Reg<etm_task_p3_cfg::ETM_TASK_P3_CFG_SPEC>;
224#[doc = "Etm Configure Register to decide which GPIO been chosen"]
225pub mod etm_task_p3_cfg;
226#[doc = "ETM_TASK_P4_CFG (rw) register accessor: Etm Configure Register to decide which GPIO been chosen\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`etm_task_p4_cfg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`etm_task_p4_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@etm_task_p4_cfg`] module"]
227pub type ETM_TASK_P4_CFG = crate::Reg<etm_task_p4_cfg::ETM_TASK_P4_CFG_SPEC>;
228#[doc = "Etm Configure Register to decide which GPIO been chosen"]
229pub mod etm_task_p4_cfg;
230#[doc = "ETM_TASK_P5_CFG (rw) register accessor: Etm Configure Register to decide which GPIO been chosen\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`etm_task_p5_cfg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`etm_task_p5_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@etm_task_p5_cfg`] module"]
231pub type ETM_TASK_P5_CFG = crate::Reg<etm_task_p5_cfg::ETM_TASK_P5_CFG_SPEC>;
232#[doc = "Etm Configure Register to decide which GPIO been chosen"]
233pub mod etm_task_p5_cfg;
234#[doc = "ETM_TASK_P6_CFG (rw) register accessor: Etm Configure Register to decide which GPIO been chosen\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`etm_task_p6_cfg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`etm_task_p6_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@etm_task_p6_cfg`] module"]
235pub type ETM_TASK_P6_CFG = crate::Reg<etm_task_p6_cfg::ETM_TASK_P6_CFG_SPEC>;
236#[doc = "Etm Configure Register to decide which GPIO been chosen"]
237pub mod etm_task_p6_cfg;
238#[doc = "ETM_TASK_P7_CFG (rw) register accessor: Etm Configure Register to decide which GPIO been chosen\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`etm_task_p7_cfg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`etm_task_p7_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@etm_task_p7_cfg`] module"]
239pub type ETM_TASK_P7_CFG = crate::Reg<etm_task_p7_cfg::ETM_TASK_P7_CFG_SPEC>;
240#[doc = "Etm Configure Register to decide which GPIO been chosen"]
241pub mod etm_task_p7_cfg;
242#[doc = "ETM_TASK_P8_CFG (rw) register accessor: Etm Configure Register to decide which GPIO been chosen\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`etm_task_p8_cfg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`etm_task_p8_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@etm_task_p8_cfg`] module"]
243pub type ETM_TASK_P8_CFG = crate::Reg<etm_task_p8_cfg::ETM_TASK_P8_CFG_SPEC>;
244#[doc = "Etm Configure Register to decide which GPIO been chosen"]
245pub mod etm_task_p8_cfg;
246#[doc = "ETM_TASK_P9_CFG (rw) register accessor: Etm Configure Register to decide which GPIO been chosen\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`etm_task_p9_cfg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`etm_task_p9_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@etm_task_p9_cfg`] module"]
247pub type ETM_TASK_P9_CFG = crate::Reg<etm_task_p9_cfg::ETM_TASK_P9_CFG_SPEC>;
248#[doc = "Etm Configure Register to decide which GPIO been chosen"]
249pub mod etm_task_p9_cfg;
250#[doc = "ETM_TASK_P10_CFG (rw) register accessor: Etm Configure Register to decide which GPIO been chosen\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`etm_task_p10_cfg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`etm_task_p10_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@etm_task_p10_cfg`] module"]
251pub type ETM_TASK_P10_CFG = crate::Reg<etm_task_p10_cfg::ETM_TASK_P10_CFG_SPEC>;
252#[doc = "Etm Configure Register to decide which GPIO been chosen"]
253pub mod etm_task_p10_cfg;
254#[doc = "ETM_TASK_P11_CFG (rw) register accessor: Etm Configure Register to decide which GPIO been chosen\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`etm_task_p11_cfg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`etm_task_p11_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@etm_task_p11_cfg`] module"]
255pub type ETM_TASK_P11_CFG = crate::Reg<etm_task_p11_cfg::ETM_TASK_P11_CFG_SPEC>;
256#[doc = "Etm Configure Register to decide which GPIO been chosen"]
257pub mod etm_task_p11_cfg;
258#[doc = "ETM_TASK_P12_CFG (rw) register accessor: Etm Configure Register to decide which GPIO been chosen\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`etm_task_p12_cfg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`etm_task_p12_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@etm_task_p12_cfg`] module"]
259pub type ETM_TASK_P12_CFG = crate::Reg<etm_task_p12_cfg::ETM_TASK_P12_CFG_SPEC>;
260#[doc = "Etm Configure Register to decide which GPIO been chosen"]
261pub mod etm_task_p12_cfg;
262#[doc = "ETM_TASK_P13_CFG (rw) register accessor: Etm Configure Register to decide which GPIO been chosen\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`etm_task_p13_cfg::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`etm_task_p13_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@etm_task_p13_cfg`] module"]
263pub type ETM_TASK_P13_CFG = crate::Reg<etm_task_p13_cfg::ETM_TASK_P13_CFG_SPEC>;
264#[doc = "Etm Configure Register to decide which GPIO been chosen"]
265pub mod etm_task_p13_cfg;
266#[doc = "VERSION (rw) register accessor: Version Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`version::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`version::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@version`] module"]
267pub type VERSION = crate::Reg<version::VERSION_SPEC>;
268#[doc = "Version Control Register"]
269pub mod version;
esp32p4/gpio_sd.rs

esp32p4/
gpio_sd.rs
