esp32p4/pmu/
clk_state0.rs1#[doc = "Register `CLK_STATE0` reader"]
2pub type R = crate::R<CLK_STATE0_SPEC>;
3#[doc = "Field `STABLE_XPD_PLL_STATE` reader - need_des"]
4pub type STABLE_XPD_PLL_STATE_R = crate::FieldReader;
5#[doc = "Field `STABLE_XPD_XTAL_STATE` reader - need_des"]
6pub type STABLE_XPD_XTAL_STATE_R = crate::BitReader;
7#[doc = "Field `PMU_ANA_XPD_PLL_I2C_STATE` reader - need_des"]
8pub type PMU_ANA_XPD_PLL_I2C_STATE_R = crate::FieldReader;
9#[doc = "Field `PMU_SYS_CLK_SLP_SEL_STATE` reader - need_des"]
10pub type PMU_SYS_CLK_SLP_SEL_STATE_R = crate::BitReader;
11#[doc = "Field `PMU_SYS_CLK_SEL_STATE` reader - need_des"]
12pub type PMU_SYS_CLK_SEL_STATE_R = crate::FieldReader;
13#[doc = "Field `PMU_SYS_CLK_NO_DIV_STATE` reader - need_des"]
14pub type PMU_SYS_CLK_NO_DIV_STATE_R = crate::BitReader;
15#[doc = "Field `PMU_ICG_SYS_CLK_EN_STATE` reader - need_des"]
16pub type PMU_ICG_SYS_CLK_EN_STATE_R = crate::BitReader;
17#[doc = "Field `PMU_ICG_MODEM_SWITCH_STATE` reader - need_des"]
18pub type PMU_ICG_MODEM_SWITCH_STATE_R = crate::BitReader;
19#[doc = "Field `PMU_ICG_MODEM_CODE_STATE` reader - need_des"]
20pub type PMU_ICG_MODEM_CODE_STATE_R = crate::FieldReader;
21#[doc = "Field `PMU_ICG_SLP_SEL_STATE` reader - need_des"]
22pub type PMU_ICG_SLP_SEL_STATE_R = crate::BitReader;
23#[doc = "Field `PMU_ICG_GLOBAL_XTAL_STATE` reader - need_des"]
24pub type PMU_ICG_GLOBAL_XTAL_STATE_R = crate::BitReader;
25#[doc = "Field `PMU_ICG_GLOBAL_PLL_STATE` reader - need_des"]
26pub type PMU_ICG_GLOBAL_PLL_STATE_R = crate::FieldReader;
27#[doc = "Field `PMU_ANA_I2C_ISO_EN_STATE` reader - need_des"]
28pub type PMU_ANA_I2C_ISO_EN_STATE_R = crate::BitReader;
29#[doc = "Field `PMU_ANA_I2C_RETENTION_STATE` reader - need_des"]
30pub type PMU_ANA_I2C_RETENTION_STATE_R = crate::BitReader;
31#[doc = "Field `PMU_ANA_XPD_PLL_STATE` reader - need_des"]
32pub type PMU_ANA_XPD_PLL_STATE_R = crate::FieldReader;
33#[doc = "Field `PMU_ANA_XPD_XTAL_STATE` reader - need_des"]
34pub type PMU_ANA_XPD_XTAL_STATE_R = crate::BitReader;
35impl R {
36 #[doc = "Bits 0:2 - need_des"]
37 #[inline(always)]
38 pub fn stable_xpd_pll_state(&self) -> STABLE_XPD_PLL_STATE_R {
39 STABLE_XPD_PLL_STATE_R::new((self.bits & 7) as u8)
40 }
41 #[doc = "Bit 3 - need_des"]
42 #[inline(always)]
43 pub fn stable_xpd_xtal_state(&self) -> STABLE_XPD_XTAL_STATE_R {
44 STABLE_XPD_XTAL_STATE_R::new(((self.bits >> 3) & 1) != 0)
45 }
46 #[doc = "Bits 4:6 - need_des"]
47 #[inline(always)]
48 pub fn pmu_ana_xpd_pll_i2c_state(&self) -> PMU_ANA_XPD_PLL_I2C_STATE_R {
49 PMU_ANA_XPD_PLL_I2C_STATE_R::new(((self.bits >> 4) & 7) as u8)
50 }
51 #[doc = "Bit 10 - need_des"]
52 #[inline(always)]
53 pub fn pmu_sys_clk_slp_sel_state(&self) -> PMU_SYS_CLK_SLP_SEL_STATE_R {
54 PMU_SYS_CLK_SLP_SEL_STATE_R::new(((self.bits >> 10) & 1) != 0)
55 }
56 #[doc = "Bits 11:12 - need_des"]
57 #[inline(always)]
58 pub fn pmu_sys_clk_sel_state(&self) -> PMU_SYS_CLK_SEL_STATE_R {
59 PMU_SYS_CLK_SEL_STATE_R::new(((self.bits >> 11) & 3) as u8)
60 }
61 #[doc = "Bit 13 - need_des"]
62 #[inline(always)]
63 pub fn pmu_sys_clk_no_div_state(&self) -> PMU_SYS_CLK_NO_DIV_STATE_R {
64 PMU_SYS_CLK_NO_DIV_STATE_R::new(((self.bits >> 13) & 1) != 0)
65 }
66 #[doc = "Bit 14 - need_des"]
67 #[inline(always)]
68 pub fn pmu_icg_sys_clk_en_state(&self) -> PMU_ICG_SYS_CLK_EN_STATE_R {
69 PMU_ICG_SYS_CLK_EN_STATE_R::new(((self.bits >> 14) & 1) != 0)
70 }
71 #[doc = "Bit 15 - need_des"]
72 #[inline(always)]
73 pub fn pmu_icg_modem_switch_state(&self) -> PMU_ICG_MODEM_SWITCH_STATE_R {
74 PMU_ICG_MODEM_SWITCH_STATE_R::new(((self.bits >> 15) & 1) != 0)
75 }
76 #[doc = "Bits 16:17 - need_des"]
77 #[inline(always)]
78 pub fn pmu_icg_modem_code_state(&self) -> PMU_ICG_MODEM_CODE_STATE_R {
79 PMU_ICG_MODEM_CODE_STATE_R::new(((self.bits >> 16) & 3) as u8)
80 }
81 #[doc = "Bit 18 - need_des"]
82 #[inline(always)]
83 pub fn pmu_icg_slp_sel_state(&self) -> PMU_ICG_SLP_SEL_STATE_R {
84 PMU_ICG_SLP_SEL_STATE_R::new(((self.bits >> 18) & 1) != 0)
85 }
86 #[doc = "Bit 19 - need_des"]
87 #[inline(always)]
88 pub fn pmu_icg_global_xtal_state(&self) -> PMU_ICG_GLOBAL_XTAL_STATE_R {
89 PMU_ICG_GLOBAL_XTAL_STATE_R::new(((self.bits >> 19) & 1) != 0)
90 }
91 #[doc = "Bits 20:23 - need_des"]
92 #[inline(always)]
93 pub fn pmu_icg_global_pll_state(&self) -> PMU_ICG_GLOBAL_PLL_STATE_R {
94 PMU_ICG_GLOBAL_PLL_STATE_R::new(((self.bits >> 20) & 0x0f) as u8)
95 }
96 #[doc = "Bit 24 - need_des"]
97 #[inline(always)]
98 pub fn pmu_ana_i2c_iso_en_state(&self) -> PMU_ANA_I2C_ISO_EN_STATE_R {
99 PMU_ANA_I2C_ISO_EN_STATE_R::new(((self.bits >> 24) & 1) != 0)
100 }
101 #[doc = "Bit 25 - need_des"]
102 #[inline(always)]
103 pub fn pmu_ana_i2c_retention_state(&self) -> PMU_ANA_I2C_RETENTION_STATE_R {
104 PMU_ANA_I2C_RETENTION_STATE_R::new(((self.bits >> 25) & 1) != 0)
105 }
106 #[doc = "Bits 27:30 - need_des"]
107 #[inline(always)]
108 pub fn pmu_ana_xpd_pll_state(&self) -> PMU_ANA_XPD_PLL_STATE_R {
109 PMU_ANA_XPD_PLL_STATE_R::new(((self.bits >> 27) & 0x0f) as u8)
110 }
111 #[doc = "Bit 31 - need_des"]
112 #[inline(always)]
113 pub fn pmu_ana_xpd_xtal_state(&self) -> PMU_ANA_XPD_XTAL_STATE_R {
114 PMU_ANA_XPD_XTAL_STATE_R::new(((self.bits >> 31) & 1) != 0)
115 }
116}
117#[cfg(feature = "impl-register-debug")]
118impl core::fmt::Debug for R {
119 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
120 f.debug_struct("CLK_STATE0")
121 .field(
122 "stable_xpd_pll_state",
123 &format_args!("{}", self.stable_xpd_pll_state().bits()),
124 )
125 .field(
126 "stable_xpd_xtal_state",
127 &format_args!("{}", self.stable_xpd_xtal_state().bit()),
128 )
129 .field(
130 "pmu_ana_xpd_pll_i2c_state",
131 &format_args!("{}", self.pmu_ana_xpd_pll_i2c_state().bits()),
132 )
133 .field(
134 "pmu_sys_clk_slp_sel_state",
135 &format_args!("{}", self.pmu_sys_clk_slp_sel_state().bit()),
136 )
137 .field(
138 "pmu_sys_clk_sel_state",
139 &format_args!("{}", self.pmu_sys_clk_sel_state().bits()),
140 )
141 .field(
142 "pmu_sys_clk_no_div_state",
143 &format_args!("{}", self.pmu_sys_clk_no_div_state().bit()),
144 )
145 .field(
146 "pmu_icg_sys_clk_en_state",
147 &format_args!("{}", self.pmu_icg_sys_clk_en_state().bit()),
148 )
149 .field(
150 "pmu_icg_modem_switch_state",
151 &format_args!("{}", self.pmu_icg_modem_switch_state().bit()),
152 )
153 .field(
154 "pmu_icg_modem_code_state",
155 &format_args!("{}", self.pmu_icg_modem_code_state().bits()),
156 )
157 .field(
158 "pmu_icg_slp_sel_state",
159 &format_args!("{}", self.pmu_icg_slp_sel_state().bit()),
160 )
161 .field(
162 "pmu_icg_global_xtal_state",
163 &format_args!("{}", self.pmu_icg_global_xtal_state().bit()),
164 )
165 .field(
166 "pmu_icg_global_pll_state",
167 &format_args!("{}", self.pmu_icg_global_pll_state().bits()),
168 )
169 .field(
170 "pmu_ana_i2c_iso_en_state",
171 &format_args!("{}", self.pmu_ana_i2c_iso_en_state().bit()),
172 )
173 .field(
174 "pmu_ana_i2c_retention_state",
175 &format_args!("{}", self.pmu_ana_i2c_retention_state().bit()),
176 )
177 .field(
178 "pmu_ana_xpd_pll_state",
179 &format_args!("{}", self.pmu_ana_xpd_pll_state().bits()),
180 )
181 .field(
182 "pmu_ana_xpd_xtal_state",
183 &format_args!("{}", self.pmu_ana_xpd_xtal_state().bit()),
184 )
185 .finish()
186 }
187}
188#[cfg(feature = "impl-register-debug")]
189impl core::fmt::Debug for crate::generic::Reg<CLK_STATE0_SPEC> {
190 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
191 core::fmt::Debug::fmt(&self.read(), f)
192 }
193}
194#[doc = "need_des\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clk_state0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
195pub struct CLK_STATE0_SPEC;
196impl crate::RegisterSpec for CLK_STATE0_SPEC {
197 type Ux = u32;
198}
199#[doc = "`read()` method returns [`clk_state0::R`](R) reader structure"]
200impl crate::Readable for CLK_STATE0_SPEC {}
201#[doc = "`reset()` method sets CLK_STATE0 to value 0x0f"]
202impl crate::Resettable for CLK_STATE0_SPEC {
203 const RESET_VALUE: u32 = 0x0f;
204}