esp32p4/ahb_dma/
intr_mem_end_addr.rs

1#[doc = "Register `INTR_MEM_END_ADDR` reader"]
2pub type R = crate::R<INTR_MEM_END_ADDR_SPEC>;
3#[doc = "Register `INTR_MEM_END_ADDR` writer"]
4pub type W = crate::W<INTR_MEM_END_ADDR_SPEC>;
5#[doc = "Field `ACCESS_INTR_MEM_END_ADDR` reader - The end address of accessible address space. The access address beyond this range would lead to descriptor error."]
6pub type ACCESS_INTR_MEM_END_ADDR_R = crate::FieldReader<u32>;
7#[doc = "Field `ACCESS_INTR_MEM_END_ADDR` writer - The end address of accessible address space. The access address beyond this range would lead to descriptor error."]
8pub type ACCESS_INTR_MEM_END_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
9impl R {
10    #[doc = "Bits 0:31 - The end address of accessible address space. The access address beyond this range would lead to descriptor error."]
11    #[inline(always)]
12    pub fn access_intr_mem_end_addr(&self) -> ACCESS_INTR_MEM_END_ADDR_R {
13        ACCESS_INTR_MEM_END_ADDR_R::new(self.bits)
14    }
15}
16#[cfg(feature = "impl-register-debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("INTR_MEM_END_ADDR")
20            .field(
21                "access_intr_mem_end_addr",
22                &format_args!("{}", self.access_intr_mem_end_addr().bits()),
23            )
24            .finish()
25    }
26}
27#[cfg(feature = "impl-register-debug")]
28impl core::fmt::Debug for crate::generic::Reg<INTR_MEM_END_ADDR_SPEC> {
29    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
30        core::fmt::Debug::fmt(&self.read(), f)
31    }
32}
33impl W {
34    #[doc = "Bits 0:31 - The end address of accessible address space. The access address beyond this range would lead to descriptor error."]
35    #[inline(always)]
36    #[must_use]
37    pub fn access_intr_mem_end_addr(
38        &mut self,
39    ) -> ACCESS_INTR_MEM_END_ADDR_W<INTR_MEM_END_ADDR_SPEC> {
40        ACCESS_INTR_MEM_END_ADDR_W::new(self, 0)
41    }
42}
43#[doc = "The end address of accessible address space. The access address beyond this range would lead to descriptor error.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`intr_mem_end_addr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`intr_mem_end_addr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
44pub struct INTR_MEM_END_ADDR_SPEC;
45impl crate::RegisterSpec for INTR_MEM_END_ADDR_SPEC {
46    type Ux = u32;
47}
48#[doc = "`read()` method returns [`intr_mem_end_addr::R`](R) reader structure"]
49impl crate::Readable for INTR_MEM_END_ADDR_SPEC {}
50#[doc = "`write(|w| ..)` method takes [`intr_mem_end_addr::W`](W) writer structure"]
51impl crate::Writable for INTR_MEM_END_ADDR_SPEC {
52    type Safety = crate::Unsafe;
53    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
54    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
55}
56#[doc = "`reset()` method sets INTR_MEM_END_ADDR to value 0xffff_ffff"]
57impl crate::Resettable for INTR_MEM_END_ADDR_SPEC {
58    const RESET_VALUE: u32 = 0xffff_ffff;
59}
esp32p4/ahb_dma/intr_mem_end_addr.rs

esp32p4/ahb_dma/
intr_mem_end_addr.rs
