esp32p4/cache/
lock_ctrl.rs

1#[doc = "Register `LOCK_CTRL` reader"]
2pub type R = crate::R<LOCK_CTRL_SPEC>;
3#[doc = "Register `LOCK_CTRL` writer"]
4pub type W = crate::W<LOCK_CTRL_SPEC>;
5#[doc = "Field `LOCK_ENA` reader - The bit is used to enable lock operation. It will be cleared by hardware after lock operation done. Note that (1) this bit and unlock_ena bit are mutually exclusive, that is, those bits can not be set to 1 at the same time. (2) lock operation can be applied on LL1-ICache, L1-DCache and L2-Cache."]
6pub type LOCK_ENA_R = crate::BitReader;
7#[doc = "Field `LOCK_ENA` writer - The bit is used to enable lock operation. It will be cleared by hardware after lock operation done. Note that (1) this bit and unlock_ena bit are mutually exclusive, that is, those bits can not be set to 1 at the same time. (2) lock operation can be applied on LL1-ICache, L1-DCache and L2-Cache."]
8pub type LOCK_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `UNLOCK_ENA` reader - The bit is used to enable unlock operation. It will be cleared by hardware after unlock operation done. Note that (1) this bit and lock_ena bit are mutually exclusive, that is, those bits can not be set to 1 at the same time. (2) unlock operation can be applied on L1-ICache, L1-DCache and L2-Cache."]
10pub type UNLOCK_ENA_R = crate::BitReader;
11#[doc = "Field `UNLOCK_ENA` writer - The bit is used to enable unlock operation. It will be cleared by hardware after unlock operation done. Note that (1) this bit and lock_ena bit are mutually exclusive, that is, those bits can not be set to 1 at the same time. (2) unlock operation can be applied on L1-ICache, L1-DCache and L2-Cache."]
12pub type UNLOCK_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `LOCK_DONE` reader - The bit is used to indicate whether unlock/lock operation is finished or not. 0: not finished. 1: finished."]
14pub type LOCK_DONE_R = crate::BitReader;
15#[doc = "Field `LOCK_RGID` reader - The bit is used to set the gid of cache lock/unlock."]
16pub type LOCK_RGID_R = crate::FieldReader;
17#[doc = "Field `LOCK_RGID` writer - The bit is used to set the gid of cache lock/unlock."]
18pub type LOCK_RGID_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
19impl R {
20    #[doc = "Bit 0 - The bit is used to enable lock operation. It will be cleared by hardware after lock operation done. Note that (1) this bit and unlock_ena bit are mutually exclusive, that is, those bits can not be set to 1 at the same time. (2) lock operation can be applied on LL1-ICache, L1-DCache and L2-Cache."]
21    #[inline(always)]
22    pub fn lock_ena(&self) -> LOCK_ENA_R {
23        LOCK_ENA_R::new((self.bits & 1) != 0)
24    }
25    #[doc = "Bit 1 - The bit is used to enable unlock operation. It will be cleared by hardware after unlock operation done. Note that (1) this bit and lock_ena bit are mutually exclusive, that is, those bits can not be set to 1 at the same time. (2) unlock operation can be applied on L1-ICache, L1-DCache and L2-Cache."]
26    #[inline(always)]
27    pub fn unlock_ena(&self) -> UNLOCK_ENA_R {
28        UNLOCK_ENA_R::new(((self.bits >> 1) & 1) != 0)
29    }
30    #[doc = "Bit 2 - The bit is used to indicate whether unlock/lock operation is finished or not. 0: not finished. 1: finished."]
31    #[inline(always)]
32    pub fn lock_done(&self) -> LOCK_DONE_R {
33        LOCK_DONE_R::new(((self.bits >> 2) & 1) != 0)
34    }
35    #[doc = "Bits 3:6 - The bit is used to set the gid of cache lock/unlock."]
36    #[inline(always)]
37    pub fn lock_rgid(&self) -> LOCK_RGID_R {
38        LOCK_RGID_R::new(((self.bits >> 3) & 0x0f) as u8)
39    }
40}
41#[cfg(feature = "impl-register-debug")]
42impl core::fmt::Debug for R {
43    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
44        f.debug_struct("LOCK_CTRL")
45            .field("lock_ena", &format_args!("{}", self.lock_ena().bit()))
46            .field("unlock_ena", &format_args!("{}", self.unlock_ena().bit()))
47            .field("lock_done", &format_args!("{}", self.lock_done().bit()))
48            .field("lock_rgid", &format_args!("{}", self.lock_rgid().bits()))
49            .finish()
50    }
51}
52#[cfg(feature = "impl-register-debug")]
53impl core::fmt::Debug for crate::generic::Reg<LOCK_CTRL_SPEC> {
54    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
55        core::fmt::Debug::fmt(&self.read(), f)
56    }
57}
58impl W {
59    #[doc = "Bit 0 - The bit is used to enable lock operation. It will be cleared by hardware after lock operation done. Note that (1) this bit and unlock_ena bit are mutually exclusive, that is, those bits can not be set to 1 at the same time. (2) lock operation can be applied on LL1-ICache, L1-DCache and L2-Cache."]
60    #[inline(always)]
61    #[must_use]
62    pub fn lock_ena(&mut self) -> LOCK_ENA_W<LOCK_CTRL_SPEC> {
63        LOCK_ENA_W::new(self, 0)
64    }
65    #[doc = "Bit 1 - The bit is used to enable unlock operation. It will be cleared by hardware after unlock operation done. Note that (1) this bit and lock_ena bit are mutually exclusive, that is, those bits can not be set to 1 at the same time. (2) unlock operation can be applied on L1-ICache, L1-DCache and L2-Cache."]
66    #[inline(always)]
67    #[must_use]
68    pub fn unlock_ena(&mut self) -> UNLOCK_ENA_W<LOCK_CTRL_SPEC> {
69        UNLOCK_ENA_W::new(self, 1)
70    }
71    #[doc = "Bits 3:6 - The bit is used to set the gid of cache lock/unlock."]
72    #[inline(always)]
73    #[must_use]
74    pub fn lock_rgid(&mut self) -> LOCK_RGID_W<LOCK_CTRL_SPEC> {
75        LOCK_RGID_W::new(self, 3)
76    }
77}
78#[doc = "Lock-class (manual lock) operation control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lock_ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lock_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
79pub struct LOCK_CTRL_SPEC;
80impl crate::RegisterSpec for LOCK_CTRL_SPEC {
81    type Ux = u32;
82}
83#[doc = "`read()` method returns [`lock_ctrl::R`](R) reader structure"]
84impl crate::Readable for LOCK_CTRL_SPEC {}
85#[doc = "`write(|w| ..)` method takes [`lock_ctrl::W`](W) writer structure"]
86impl crate::Writable for LOCK_CTRL_SPEC {
87    type Safety = crate::Unsafe;
88    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
89    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
90}
91#[doc = "`reset()` method sets LOCK_CTRL to value 0x04"]
92impl crate::Resettable for LOCK_CTRL_SPEC {
93    const RESET_VALUE: u32 = 0x04;
94}
esp32p4/cache/lock_ctrl.rs

esp32p4/cache/
lock_ctrl.rs
