esp32p4/twai0/
data_5.rs

1#[doc = "Register `DATA_5` reader"]
2pub type R = crate::R<DATA_5_SPEC>;
3#[doc = "Register `DATA_5` writer"]
4pub type W = crate::W<DATA_5_SPEC>;
5#[doc = "Field `DATA_5` reader - In reset mode, it is acceptance mask register 1 with R/W Permission. In operation mode, when software initiate write operation, it is tx data register 5 and when software initiate read operation, it is rx data register 5."]
6pub type DATA_5_R = crate::FieldReader;
7#[doc = "Field `DATA_5` writer - In reset mode, it is acceptance mask register 1 with R/W Permission. In operation mode, when software initiate write operation, it is tx data register 5 and when software initiate read operation, it is rx data register 5."]
8pub type DATA_5_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9impl R {
10    #[doc = "Bits 0:7 - In reset mode, it is acceptance mask register 1 with R/W Permission. In operation mode, when software initiate write operation, it is tx data register 5 and when software initiate read operation, it is rx data register 5."]
11    #[inline(always)]
12    pub fn data_5(&self) -> DATA_5_R {
13        DATA_5_R::new((self.bits & 0xff) as u8)
14    }
15}
16#[cfg(feature = "impl-register-debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("DATA_5")
20            .field("data_5", &format_args!("{}", self.data_5().bits()))
21            .finish()
22    }
23}
24#[cfg(feature = "impl-register-debug")]
25impl core::fmt::Debug for crate::generic::Reg<DATA_5_SPEC> {
26    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
27        core::fmt::Debug::fmt(&self.read(), f)
28    }
29}
30impl W {
31    #[doc = "Bits 0:7 - In reset mode, it is acceptance mask register 1 with R/W Permission. In operation mode, when software initiate write operation, it is tx data register 5 and when software initiate read operation, it is rx data register 5."]
32    #[inline(always)]
33    #[must_use]
34    pub fn data_5(&mut self) -> DATA_5_W<DATA_5_SPEC> {
35        DATA_5_W::new(self, 0)
36    }
37}
38#[doc = "Data register 5.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`data_5::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`data_5::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
39pub struct DATA_5_SPEC;
40impl crate::RegisterSpec for DATA_5_SPEC {
41    type Ux = u32;
42}
43#[doc = "`read()` method returns [`data_5::R`](R) reader structure"]
44impl crate::Readable for DATA_5_SPEC {}
45#[doc = "`write(|w| ..)` method takes [`data_5::W`](W) writer structure"]
46impl crate::Writable for DATA_5_SPEC {
47    type Safety = crate::Unsafe;
48    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
49    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
50}
51#[doc = "`reset()` method sets DATA_5 to value 0"]
52impl crate::Resettable for DATA_5_SPEC {
53    const RESET_VALUE: u32 = 0;
54}
esp32p4/twai0/data_5.rs

esp32p4/twai0/
data_5.rs
