esp32p4/pcnt/
u_status.rs

1#[doc = "Register `U%s_STATUS` reader"]
2pub type R = crate::R<U_STATUS_SPEC>;
3#[doc = "Field `CNT_THR_ZERO_MODE_U` reader - The pulse counter status of PCNT_U%s corresponding to 0. 0: pulse counter decreases from positive to 0. 1: pulse counter increases from negative to 0. 2: pulse counter is negative. 3: pulse counter is positive."]
4pub type CNT_THR_ZERO_MODE_U_R = crate::FieldReader;
5#[doc = "Field `CNT_THR_THRES1_LAT_U` reader - The latched value of thres1 event of PCNT_U%s when threshold event interrupt is valid. 1: the current pulse counter equals to thres1 and thres1 event is valid. 0: others"]
6pub type CNT_THR_THRES1_LAT_U_R = crate::BitReader;
7#[doc = "Field `CNT_THR_THRES0_LAT_U` reader - The latched value of thres0 event of PCNT_U%s when threshold event interrupt is valid. 1: the current pulse counter equals to thres0 and thres0 event is valid. 0: others"]
8pub type CNT_THR_THRES0_LAT_U_R = crate::BitReader;
9#[doc = "Field `CNT_THR_L_LIM_LAT_U` reader - The latched value of low limit event of PCNT_U%s when threshold event interrupt is valid. 1: the current pulse counter equals to thr_l_lim and low limit event is valid. 0: others"]
10pub type CNT_THR_L_LIM_LAT_U_R = crate::BitReader;
11#[doc = "Field `CNT_THR_H_LIM_LAT_U` reader - The latched value of high limit event of PCNT_U%s when threshold event interrupt is valid. 1: the current pulse counter equals to thr_h_lim and high limit event is valid. 0: others"]
12pub type CNT_THR_H_LIM_LAT_U_R = crate::BitReader;
13#[doc = "Field `CNT_THR_ZERO_LAT_U` reader - The latched value of zero threshold event of PCNT_U%s when threshold event interrupt is valid. 1: the current pulse counter equals to 0 and zero threshold event is valid. 0: others"]
14pub type CNT_THR_ZERO_LAT_U_R = crate::BitReader;
15impl R {
16    #[doc = "Bits 0:1 - The pulse counter status of PCNT_U%s corresponding to 0. 0: pulse counter decreases from positive to 0. 1: pulse counter increases from negative to 0. 2: pulse counter is negative. 3: pulse counter is positive."]
17    #[inline(always)]
18    pub fn cnt_thr_zero_mode_u(&self) -> CNT_THR_ZERO_MODE_U_R {
19        CNT_THR_ZERO_MODE_U_R::new((self.bits & 3) as u8)
20    }
21    #[doc = "Bit 2 - The latched value of thres1 event of PCNT_U%s when threshold event interrupt is valid. 1: the current pulse counter equals to thres1 and thres1 event is valid. 0: others"]
22    #[inline(always)]
23    pub fn cnt_thr_thres1_lat_u(&self) -> CNT_THR_THRES1_LAT_U_R {
24        CNT_THR_THRES1_LAT_U_R::new(((self.bits >> 2) & 1) != 0)
25    }
26    #[doc = "Bit 3 - The latched value of thres0 event of PCNT_U%s when threshold event interrupt is valid. 1: the current pulse counter equals to thres0 and thres0 event is valid. 0: others"]
27    #[inline(always)]
28    pub fn cnt_thr_thres0_lat_u(&self) -> CNT_THR_THRES0_LAT_U_R {
29        CNT_THR_THRES0_LAT_U_R::new(((self.bits >> 3) & 1) != 0)
30    }
31    #[doc = "Bit 4 - The latched value of low limit event of PCNT_U%s when threshold event interrupt is valid. 1: the current pulse counter equals to thr_l_lim and low limit event is valid. 0: others"]
32    #[inline(always)]
33    pub fn cnt_thr_l_lim_lat_u(&self) -> CNT_THR_L_LIM_LAT_U_R {
34        CNT_THR_L_LIM_LAT_U_R::new(((self.bits >> 4) & 1) != 0)
35    }
36    #[doc = "Bit 5 - The latched value of high limit event of PCNT_U%s when threshold event interrupt is valid. 1: the current pulse counter equals to thr_h_lim and high limit event is valid. 0: others"]
37    #[inline(always)]
38    pub fn cnt_thr_h_lim_lat_u(&self) -> CNT_THR_H_LIM_LAT_U_R {
39        CNT_THR_H_LIM_LAT_U_R::new(((self.bits >> 5) & 1) != 0)
40    }
41    #[doc = "Bit 6 - The latched value of zero threshold event of PCNT_U%s when threshold event interrupt is valid. 1: the current pulse counter equals to 0 and zero threshold event is valid. 0: others"]
42    #[inline(always)]
43    pub fn cnt_thr_zero_lat_u(&self) -> CNT_THR_ZERO_LAT_U_R {
44        CNT_THR_ZERO_LAT_U_R::new(((self.bits >> 6) & 1) != 0)
45    }
46}
47#[cfg(feature = "impl-register-debug")]
48impl core::fmt::Debug for R {
49    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
50        f.debug_struct("U_STATUS")
51            .field(
52                "cnt_thr_zero_mode_u",
53                &format_args!("{}", self.cnt_thr_zero_mode_u().bits()),
54            )
55            .field(
56                "cnt_thr_thres1_lat_u",
57                &format_args!("{}", self.cnt_thr_thres1_lat_u().bit()),
58            )
59            .field(
60                "cnt_thr_thres0_lat_u",
61                &format_args!("{}", self.cnt_thr_thres0_lat_u().bit()),
62            )
63            .field(
64                "cnt_thr_l_lim_lat_u",
65                &format_args!("{}", self.cnt_thr_l_lim_lat_u().bit()),
66            )
67            .field(
68                "cnt_thr_h_lim_lat_u",
69                &format_args!("{}", self.cnt_thr_h_lim_lat_u().bit()),
70            )
71            .field(
72                "cnt_thr_zero_lat_u",
73                &format_args!("{}", self.cnt_thr_zero_lat_u().bit()),
74            )
75            .finish()
76    }
77}
78#[cfg(feature = "impl-register-debug")]
79impl core::fmt::Debug for crate::generic::Reg<U_STATUS_SPEC> {
80    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
81        core::fmt::Debug::fmt(&self.read(), f)
82    }
83}
84#[doc = "PNCT UNIT%s status register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`u_status::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
85pub struct U_STATUS_SPEC;
86impl crate::RegisterSpec for U_STATUS_SPEC {
87    type Ux = u32;
88}
89#[doc = "`read()` method returns [`u_status::R`](R) reader structure"]
90impl crate::Readable for U_STATUS_SPEC {}
91#[doc = "`reset()` method sets U%s_STATUS to value 0"]
92impl crate::Resettable for U_STATUS_SPEC {
93    const RESET_VALUE: u32 = 0;
94}
esp32p4/pcnt/u_status.rs

esp32p4/pcnt/
u_status.rs
