esp32p4/pmu/
power_wait_timer1.rs

1#[doc = "Register `POWER_WAIT_TIMER1` reader"]
2pub type R = crate::R<POWER_WAIT_TIMER1_SPEC>;
3#[doc = "Register `POWER_WAIT_TIMER1` writer"]
4pub type W = crate::W<POWER_WAIT_TIMER1_SPEC>;
5#[doc = "Field `DG_LP_POWERDOWN_TIMER` reader - need_des"]
6pub type DG_LP_POWERDOWN_TIMER_R = crate::FieldReader<u16>;
7#[doc = "Field `DG_LP_POWERDOWN_TIMER` writer - need_des"]
8pub type DG_LP_POWERDOWN_TIMER_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>;
9#[doc = "Field `DG_LP_POWERUP_TIMER` reader - need_des"]
10pub type DG_LP_POWERUP_TIMER_R = crate::FieldReader<u16>;
11#[doc = "Field `DG_LP_POWERUP_TIMER` writer - need_des"]
12pub type DG_LP_POWERUP_TIMER_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>;
13#[doc = "Field `DG_LP_WAIT_TIMER` reader - need_des"]
14pub type DG_LP_WAIT_TIMER_R = crate::FieldReader<u16>;
15#[doc = "Field `DG_LP_WAIT_TIMER` writer - need_des"]
16pub type DG_LP_WAIT_TIMER_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>;
17impl R {
18    #[doc = "Bits 5:13 - need_des"]
19    #[inline(always)]
20    pub fn dg_lp_powerdown_timer(&self) -> DG_LP_POWERDOWN_TIMER_R {
21        DG_LP_POWERDOWN_TIMER_R::new(((self.bits >> 5) & 0x01ff) as u16)
22    }
23    #[doc = "Bits 14:22 - need_des"]
24    #[inline(always)]
25    pub fn dg_lp_powerup_timer(&self) -> DG_LP_POWERUP_TIMER_R {
26        DG_LP_POWERUP_TIMER_R::new(((self.bits >> 14) & 0x01ff) as u16)
27    }
28    #[doc = "Bits 23:31 - need_des"]
29    #[inline(always)]
30    pub fn dg_lp_wait_timer(&self) -> DG_LP_WAIT_TIMER_R {
31        DG_LP_WAIT_TIMER_R::new(((self.bits >> 23) & 0x01ff) as u16)
32    }
33}
34#[cfg(feature = "impl-register-debug")]
35impl core::fmt::Debug for R {
36    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
37        f.debug_struct("POWER_WAIT_TIMER1")
38            .field(
39                "dg_lp_powerdown_timer",
40                &format_args!("{}", self.dg_lp_powerdown_timer().bits()),
41            )
42            .field(
43                "dg_lp_powerup_timer",
44                &format_args!("{}", self.dg_lp_powerup_timer().bits()),
45            )
46            .field(
47                "dg_lp_wait_timer",
48                &format_args!("{}", self.dg_lp_wait_timer().bits()),
49            )
50            .finish()
51    }
52}
53#[cfg(feature = "impl-register-debug")]
54impl core::fmt::Debug for crate::generic::Reg<POWER_WAIT_TIMER1_SPEC> {
55    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
56        core::fmt::Debug::fmt(&self.read(), f)
57    }
58}
59impl W {
60    #[doc = "Bits 5:13 - need_des"]
61    #[inline(always)]
62    #[must_use]
63    pub fn dg_lp_powerdown_timer(&mut self) -> DG_LP_POWERDOWN_TIMER_W<POWER_WAIT_TIMER1_SPEC> {
64        DG_LP_POWERDOWN_TIMER_W::new(self, 5)
65    }
66    #[doc = "Bits 14:22 - need_des"]
67    #[inline(always)]
68    #[must_use]
69    pub fn dg_lp_powerup_timer(&mut self) -> DG_LP_POWERUP_TIMER_W<POWER_WAIT_TIMER1_SPEC> {
70        DG_LP_POWERUP_TIMER_W::new(self, 14)
71    }
72    #[doc = "Bits 23:31 - need_des"]
73    #[inline(always)]
74    #[must_use]
75    pub fn dg_lp_wait_timer(&mut self) -> DG_LP_WAIT_TIMER_W<POWER_WAIT_TIMER1_SPEC> {
76        DG_LP_WAIT_TIMER_W::new(self, 23)
77    }
78}
79#[doc = "need_des\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`power_wait_timer1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`power_wait_timer1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
80pub struct POWER_WAIT_TIMER1_SPEC;
81impl crate::RegisterSpec for POWER_WAIT_TIMER1_SPEC {
82    type Ux = u32;
83}
84#[doc = "`read()` method returns [`power_wait_timer1::R`](R) reader structure"]
85impl crate::Readable for POWER_WAIT_TIMER1_SPEC {}
86#[doc = "`write(|w| ..)` method takes [`power_wait_timer1::W`](W) writer structure"]
87impl crate::Writable for POWER_WAIT_TIMER1_SPEC {
88    type Safety = crate::Unsafe;
89    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
90    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
91}
92#[doc = "`reset()` method sets POWER_WAIT_TIMER1 to value 0x7fbf_dfe0"]
93impl crate::Resettable for POWER_WAIT_TIMER1_SPEC {
94    const RESET_VALUE: u32 = 0x7fbf_dfe0;
95}
esp32p4/pmu/power_wait_timer1.rs

esp32p4/pmu/
power_wait_timer1.rs
