esp32p4/cache/
l1_unallocate_buffer_clear.rs

1#[doc = "Register `L1_UNALLOCATE_BUFFER_CLEAR` reader"]
2pub type R = crate::R<L1_UNALLOCATE_BUFFER_CLEAR_SPEC>;
3#[doc = "Register `L1_UNALLOCATE_BUFFER_CLEAR` writer"]
4pub type W = crate::W<L1_UNALLOCATE_BUFFER_CLEAR_SPEC>;
5#[doc = "Field `L1_ICACHE0_UNALLOC_CLR` reader - The bit is used to clear the unallocate request buffer of l1 icache0 where the unallocate request is responsed but not completed."]
6pub type L1_ICACHE0_UNALLOC_CLR_R = crate::BitReader;
7#[doc = "Field `L1_ICACHE0_UNALLOC_CLR` writer - The bit is used to clear the unallocate request buffer of l1 icache0 where the unallocate request is responsed but not completed."]
8pub type L1_ICACHE0_UNALLOC_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `L1_ICACHE1_UNALLOC_CLR` reader - The bit is used to clear the unallocate request buffer of l1 icache1 where the unallocate request is responsed but not completed."]
10pub type L1_ICACHE1_UNALLOC_CLR_R = crate::BitReader;
11#[doc = "Field `L1_ICACHE1_UNALLOC_CLR` writer - The bit is used to clear the unallocate request buffer of l1 icache1 where the unallocate request is responsed but not completed."]
12pub type L1_ICACHE1_UNALLOC_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `L1_ICACHE2_UNALLOC_CLR` reader - Reserved"]
14pub type L1_ICACHE2_UNALLOC_CLR_R = crate::BitReader;
15#[doc = "Field `L1_ICACHE3_UNALLOC_CLR` reader - Reserved"]
16pub type L1_ICACHE3_UNALLOC_CLR_R = crate::BitReader;
17#[doc = "Field `L1_DCACHE_UNALLOC_CLR` reader - The bit is used to clear the unallocate request buffer of l1 dcache where the unallocate request is responsed but not completed."]
18pub type L1_DCACHE_UNALLOC_CLR_R = crate::BitReader;
19#[doc = "Field `L1_DCACHE_UNALLOC_CLR` writer - The bit is used to clear the unallocate request buffer of l1 dcache where the unallocate request is responsed but not completed."]
20pub type L1_DCACHE_UNALLOC_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
21impl R {
22    #[doc = "Bit 0 - The bit is used to clear the unallocate request buffer of l1 icache0 where the unallocate request is responsed but not completed."]
23    #[inline(always)]
24    pub fn l1_icache0_unalloc_clr(&self) -> L1_ICACHE0_UNALLOC_CLR_R {
25        L1_ICACHE0_UNALLOC_CLR_R::new((self.bits & 1) != 0)
26    }
27    #[doc = "Bit 1 - The bit is used to clear the unallocate request buffer of l1 icache1 where the unallocate request is responsed but not completed."]
28    #[inline(always)]
29    pub fn l1_icache1_unalloc_clr(&self) -> L1_ICACHE1_UNALLOC_CLR_R {
30        L1_ICACHE1_UNALLOC_CLR_R::new(((self.bits >> 1) & 1) != 0)
31    }
32    #[doc = "Bit 2 - Reserved"]
33    #[inline(always)]
34    pub fn l1_icache2_unalloc_clr(&self) -> L1_ICACHE2_UNALLOC_CLR_R {
35        L1_ICACHE2_UNALLOC_CLR_R::new(((self.bits >> 2) & 1) != 0)
36    }
37    #[doc = "Bit 3 - Reserved"]
38    #[inline(always)]
39    pub fn l1_icache3_unalloc_clr(&self) -> L1_ICACHE3_UNALLOC_CLR_R {
40        L1_ICACHE3_UNALLOC_CLR_R::new(((self.bits >> 3) & 1) != 0)
41    }
42    #[doc = "Bit 4 - The bit is used to clear the unallocate request buffer of l1 dcache where the unallocate request is responsed but not completed."]
43    #[inline(always)]
44    pub fn l1_dcache_unalloc_clr(&self) -> L1_DCACHE_UNALLOC_CLR_R {
45        L1_DCACHE_UNALLOC_CLR_R::new(((self.bits >> 4) & 1) != 0)
46    }
47}
48#[cfg(feature = "impl-register-debug")]
49impl core::fmt::Debug for R {
50    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
51        f.debug_struct("L1_UNALLOCATE_BUFFER_CLEAR")
52            .field(
53                "l1_icache0_unalloc_clr",
54                &format_args!("{}", self.l1_icache0_unalloc_clr().bit()),
55            )
56            .field(
57                "l1_icache1_unalloc_clr",
58                &format_args!("{}", self.l1_icache1_unalloc_clr().bit()),
59            )
60            .field(
61                "l1_icache2_unalloc_clr",
62                &format_args!("{}", self.l1_icache2_unalloc_clr().bit()),
63            )
64            .field(
65                "l1_icache3_unalloc_clr",
66                &format_args!("{}", self.l1_icache3_unalloc_clr().bit()),
67            )
68            .field(
69                "l1_dcache_unalloc_clr",
70                &format_args!("{}", self.l1_dcache_unalloc_clr().bit()),
71            )
72            .finish()
73    }
74}
75#[cfg(feature = "impl-register-debug")]
76impl core::fmt::Debug for crate::generic::Reg<L1_UNALLOCATE_BUFFER_CLEAR_SPEC> {
77    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
78        core::fmt::Debug::fmt(&self.read(), f)
79    }
80}
81impl W {
82    #[doc = "Bit 0 - The bit is used to clear the unallocate request buffer of l1 icache0 where the unallocate request is responsed but not completed."]
83    #[inline(always)]
84    #[must_use]
85    pub fn l1_icache0_unalloc_clr(
86        &mut self,
87    ) -> L1_ICACHE0_UNALLOC_CLR_W<L1_UNALLOCATE_BUFFER_CLEAR_SPEC> {
88        L1_ICACHE0_UNALLOC_CLR_W::new(self, 0)
89    }
90    #[doc = "Bit 1 - The bit is used to clear the unallocate request buffer of l1 icache1 where the unallocate request is responsed but not completed."]
91    #[inline(always)]
92    #[must_use]
93    pub fn l1_icache1_unalloc_clr(
94        &mut self,
95    ) -> L1_ICACHE1_UNALLOC_CLR_W<L1_UNALLOCATE_BUFFER_CLEAR_SPEC> {
96        L1_ICACHE1_UNALLOC_CLR_W::new(self, 1)
97    }
98    #[doc = "Bit 4 - The bit is used to clear the unallocate request buffer of l1 dcache where the unallocate request is responsed but not completed."]
99    #[inline(always)]
100    #[must_use]
101    pub fn l1_dcache_unalloc_clr(
102        &mut self,
103    ) -> L1_DCACHE_UNALLOC_CLR_W<L1_UNALLOCATE_BUFFER_CLEAR_SPEC> {
104        L1_DCACHE_UNALLOC_CLR_W::new(self, 4)
105    }
106}
107#[doc = "Unallocate request buffer clear registers\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`l1_unallocate_buffer_clear::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`l1_unallocate_buffer_clear::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
108pub struct L1_UNALLOCATE_BUFFER_CLEAR_SPEC;
109impl crate::RegisterSpec for L1_UNALLOCATE_BUFFER_CLEAR_SPEC {
110    type Ux = u32;
111}
112#[doc = "`read()` method returns [`l1_unallocate_buffer_clear::R`](R) reader structure"]
113impl crate::Readable for L1_UNALLOCATE_BUFFER_CLEAR_SPEC {}
114#[doc = "`write(|w| ..)` method takes [`l1_unallocate_buffer_clear::W`](W) writer structure"]
115impl crate::Writable for L1_UNALLOCATE_BUFFER_CLEAR_SPEC {
116    type Safety = crate::Unsafe;
117    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
118    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
119}
120#[doc = "`reset()` method sets L1_UNALLOCATE_BUFFER_CLEAR to value 0"]
121impl crate::Resettable for L1_UNALLOCATE_BUFFER_CLEAR_SPEC {
122    const RESET_VALUE: u32 = 0;
123}
esp32p4/cache/l1_unallocate_buffer_clear.rs

esp32p4/cache/
l1_unallocate_buffer_clear.rs
