1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5 mode: MODE,
6 t_string: T_STRING,
7 t_length: T_LENGTH,
8 dma_block_num: DMA_BLOCK_NUM,
9 start: START,
10 continue_: CONTINUE,
11 busy: BUSY,
12 dma_start: DMA_START,
13 dma_continue: DMA_CONTINUE,
14 clear_irq: CLEAR_IRQ,
15 irq_ena: IRQ_ENA,
16 date: DATE,
17 _reserved12: [u8; 0x10],
18 h_mem: [H_MEM; 16],
19 m_mem: [M_MEM; 16],
20}
21impl RegisterBlock {
22 #[doc = "0x00 - Initial configuration register."]
23 #[inline(always)]
24 pub const fn mode(&self) -> &MODE {
25 &self.mode
26 }
27 #[doc = "0x04 - SHA 512/t configuration register 0."]
28 #[inline(always)]
29 pub const fn t_string(&self) -> &T_STRING {
30 &self.t_string
31 }
32 #[doc = "0x08 - SHA 512/t configuration register 1."]
33 #[inline(always)]
34 pub const fn t_length(&self) -> &T_LENGTH {
35 &self.t_length
36 }
37 #[doc = "0x0c - DMA configuration register 0."]
38 #[inline(always)]
39 pub const fn dma_block_num(&self) -> &DMA_BLOCK_NUM {
40 &self.dma_block_num
41 }
42 #[doc = "0x10 - Typical SHA configuration register 0."]
43 #[inline(always)]
44 pub const fn start(&self) -> &START {
45 &self.start
46 }
47 #[doc = "0x14 - Typical SHA configuration register 1."]
48 #[inline(always)]
49 pub const fn continue_(&self) -> &CONTINUE {
50 &self.continue_
51 }
52 #[doc = "0x18 - Busy register."]
53 #[inline(always)]
54 pub const fn busy(&self) -> &BUSY {
55 &self.busy
56 }
57 #[doc = "0x1c - DMA configuration register 1."]
58 #[inline(always)]
59 pub const fn dma_start(&self) -> &DMA_START {
60 &self.dma_start
61 }
62 #[doc = "0x20 - DMA configuration register 2."]
63 #[inline(always)]
64 pub const fn dma_continue(&self) -> &DMA_CONTINUE {
65 &self.dma_continue
66 }
67 #[doc = "0x24 - Interrupt clear register."]
68 #[inline(always)]
69 pub const fn clear_irq(&self) -> &CLEAR_IRQ {
70 &self.clear_irq
71 }
72 #[doc = "0x28 - Interrupt enable register."]
73 #[inline(always)]
74 pub const fn irq_ena(&self) -> &IRQ_ENA {
75 &self.irq_ena
76 }
77 #[doc = "0x2c - Date register."]
78 #[inline(always)]
79 pub const fn date(&self) -> &DATE {
80 &self.date
81 }
82 #[doc = "0x40..0x80 - Sha H memory which contains intermediate hash or finial hash."]
83 #[inline(always)]
84 pub const fn h_mem(&self, n: usize) -> &H_MEM {
85 &self.h_mem[n]
86 }
87 #[doc = "Iterator for array of:"]
88 #[doc = "0x40..0x80 - Sha H memory which contains intermediate hash or finial hash."]
89 #[inline(always)]
90 pub fn h_mem_iter(&self) -> impl Iterator<Item = &H_MEM> {
91 self.h_mem.iter()
92 }
93 #[doc = "0x80..0xc0 - Sha M memory which contains message."]
94 #[inline(always)]
95 pub const fn m_mem(&self, n: usize) -> &M_MEM {
96 &self.m_mem[n]
97 }
98 #[doc = "Iterator for array of:"]
99 #[doc = "0x80..0xc0 - Sha M memory which contains message."]
100 #[inline(always)]
101 pub fn m_mem_iter(&self) -> impl Iterator<Item = &M_MEM> {
102 self.m_mem.iter()
103 }
104}
105#[doc = "MODE (rw) register accessor: Initial configuration register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mode`] module"]
106pub type MODE = crate::Reg<mode::MODE_SPEC>;
107#[doc = "Initial configuration register."]
108pub mod mode;
109#[doc = "T_STRING (rw) register accessor: SHA 512/t configuration register 0.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`t_string::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`t_string::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@t_string`] module"]
110pub type T_STRING = crate::Reg<t_string::T_STRING_SPEC>;
111#[doc = "SHA 512/t configuration register 0."]
112pub mod t_string;
113#[doc = "T_LENGTH (rw) register accessor: SHA 512/t configuration register 1.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`t_length::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`t_length::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@t_length`] module"]
114pub type T_LENGTH = crate::Reg<t_length::T_LENGTH_SPEC>;
115#[doc = "SHA 512/t configuration register 1."]
116pub mod t_length;
117#[doc = "DMA_BLOCK_NUM (rw) register accessor: DMA configuration register 0.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_block_num::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_block_num::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_block_num`] module"]
118pub type DMA_BLOCK_NUM = crate::Reg<dma_block_num::DMA_BLOCK_NUM_SPEC>;
119#[doc = "DMA configuration register 0."]
120pub mod dma_block_num;
121#[doc = "START (r) register accessor: Typical SHA configuration register 0.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`start::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@start`] module"]
122pub type START = crate::Reg<start::START_SPEC>;
123#[doc = "Typical SHA configuration register 0."]
124pub mod start;
125#[doc = "CONTINUE (r) register accessor: Typical SHA configuration register 1.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`continue_::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@continue_`] module"]
126pub type CONTINUE = crate::Reg<continue_::CONTINUE_SPEC>;
127#[doc = "Typical SHA configuration register 1."]
128pub mod continue_;
129#[doc = "BUSY (r) register accessor: Busy register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`busy::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@busy`] module"]
130pub type BUSY = crate::Reg<busy::BUSY_SPEC>;
131#[doc = "Busy register."]
132pub mod busy;
133#[doc = "DMA_START (w) register accessor: DMA configuration register 1.\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_start::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_start`] module"]
134pub type DMA_START = crate::Reg<dma_start::DMA_START_SPEC>;
135#[doc = "DMA configuration register 1."]
136pub mod dma_start;
137#[doc = "DMA_CONTINUE (w) register accessor: DMA configuration register 2.\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_continue::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_continue`] module"]
138pub type DMA_CONTINUE = crate::Reg<dma_continue::DMA_CONTINUE_SPEC>;
139#[doc = "DMA configuration register 2."]
140pub mod dma_continue;
141#[doc = "CLEAR_IRQ (w) register accessor: Interrupt clear register.\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clear_irq::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clear_irq`] module"]
142pub type CLEAR_IRQ = crate::Reg<clear_irq::CLEAR_IRQ_SPEC>;
143#[doc = "Interrupt clear register."]
144pub mod clear_irq;
145#[doc = "IRQ_ENA (rw) register accessor: Interrupt enable register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_ena::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_ena::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@irq_ena`] module"]
146pub type IRQ_ENA = crate::Reg<irq_ena::IRQ_ENA_SPEC>;
147#[doc = "Interrupt enable register."]
148pub mod irq_ena;
149#[doc = "DATE (rw) register accessor: Date register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`date::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`date::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@date`] module"]
150pub type DATE = crate::Reg<date::DATE_SPEC>;
151#[doc = "Date register."]
152pub mod date;
153#[doc = "H_MEM (rw) register accessor: Sha H memory which contains intermediate hash or finial hash.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`h_mem::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`h_mem::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@h_mem`] module"]
154pub type H_MEM = crate::Reg<h_mem::H_MEM_SPEC>;
155#[doc = "Sha H memory which contains intermediate hash or finial hash."]
156pub mod h_mem;
157#[doc = "M_MEM (rw) register accessor: Sha M memory which contains message.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`m_mem::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`m_mem::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@m_mem`] module"]
158pub type M_MEM = crate::Reg<m_mem::M_MEM_SPEC>;
159#[doc = "Sha M memory which contains message."]
160pub mod m_mem;