esp32p4/dma/ch/
intstatus_enable1.rs

1#[doc = "Register `INTSTATUS_ENABLE1` reader"]
2pub type R = crate::R<INTSTATUS_ENABLE1_SPEC>;
3#[doc = "Field `CH1_ENABLE_ECC_PROT_CHMEM_CORRERR_INTSTAT` reader - NA"]
4pub type CH1_ENABLE_ECC_PROT_CHMEM_CORRERR_INTSTAT_R = crate::BitReader;
5#[doc = "Field `CH1_ENABLE_ECC_PROT_CHMEM_UNCORRERR_INTSTAT` reader - NA"]
6pub type CH1_ENABLE_ECC_PROT_CHMEM_UNCORRERR_INTSTAT_R = crate::BitReader;
7#[doc = "Field `CH1_ENABLE_ECC_PROT_UIDMEM_CORRERR_INTSTAT` reader - NA"]
8pub type CH1_ENABLE_ECC_PROT_UIDMEM_CORRERR_INTSTAT_R = crate::BitReader;
9#[doc = "Field `CH1_ENABLE_ECC_PROT_UIDMEM_UNCORRERR_INTSTAT` reader - NA"]
10pub type CH1_ENABLE_ECC_PROT_UIDMEM_UNCORRERR_INTSTAT_R = crate::BitReader;
11impl R {
12    #[doc = "Bit 0 - NA"]
13    #[inline(always)]
14    pub fn ch1_enable_ecc_prot_chmem_correrr_intstat(
15        &self,
16    ) -> CH1_ENABLE_ECC_PROT_CHMEM_CORRERR_INTSTAT_R {
17        CH1_ENABLE_ECC_PROT_CHMEM_CORRERR_INTSTAT_R::new((self.bits & 1) != 0)
18    }
19    #[doc = "Bit 1 - NA"]
20    #[inline(always)]
21    pub fn ch1_enable_ecc_prot_chmem_uncorrerr_intstat(
22        &self,
23    ) -> CH1_ENABLE_ECC_PROT_CHMEM_UNCORRERR_INTSTAT_R {
24        CH1_ENABLE_ECC_PROT_CHMEM_UNCORRERR_INTSTAT_R::new(((self.bits >> 1) & 1) != 0)
25    }
26    #[doc = "Bit 2 - NA"]
27    #[inline(always)]
28    pub fn ch1_enable_ecc_prot_uidmem_correrr_intstat(
29        &self,
30    ) -> CH1_ENABLE_ECC_PROT_UIDMEM_CORRERR_INTSTAT_R {
31        CH1_ENABLE_ECC_PROT_UIDMEM_CORRERR_INTSTAT_R::new(((self.bits >> 2) & 1) != 0)
32    }
33    #[doc = "Bit 3 - NA"]
34    #[inline(always)]
35    pub fn ch1_enable_ecc_prot_uidmem_uncorrerr_intstat(
36        &self,
37    ) -> CH1_ENABLE_ECC_PROT_UIDMEM_UNCORRERR_INTSTAT_R {
38        CH1_ENABLE_ECC_PROT_UIDMEM_UNCORRERR_INTSTAT_R::new(((self.bits >> 3) & 1) != 0)
39    }
40}
41#[cfg(feature = "impl-register-debug")]
42impl core::fmt::Debug for R {
43    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
44        f.debug_struct("INTSTATUS_ENABLE1")
45            .field(
46                "ch1_enable_ecc_prot_chmem_correrr_intstat",
47                &format_args!("{}", self.ch1_enable_ecc_prot_chmem_correrr_intstat().bit()),
48            )
49            .field(
50                "ch1_enable_ecc_prot_chmem_uncorrerr_intstat",
51                &format_args!(
52                    "{}",
53                    self.ch1_enable_ecc_prot_chmem_uncorrerr_intstat().bit()
54                ),
55            )
56            .field(
57                "ch1_enable_ecc_prot_uidmem_correrr_intstat",
58                &format_args!(
59                    "{}",
60                    self.ch1_enable_ecc_prot_uidmem_correrr_intstat().bit()
61                ),
62            )
63            .field(
64                "ch1_enable_ecc_prot_uidmem_uncorrerr_intstat",
65                &format_args!(
66                    "{}",
67                    self.ch1_enable_ecc_prot_uidmem_uncorrerr_intstat().bit()
68                ),
69            )
70            .finish()
71    }
72}
73#[cfg(feature = "impl-register-debug")]
74impl core::fmt::Debug for crate::generic::Reg<INTSTATUS_ENABLE1_SPEC> {
75    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
76        core::fmt::Debug::fmt(&self.read(), f)
77    }
78}
79#[doc = "NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`intstatus_enable1::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
80pub struct INTSTATUS_ENABLE1_SPEC;
81impl crate::RegisterSpec for INTSTATUS_ENABLE1_SPEC {
82    type Ux = u32;
83}
84#[doc = "`read()` method returns [`intstatus_enable1::R`](R) reader structure"]
85impl crate::Readable for INTSTATUS_ENABLE1_SPEC {}
86#[doc = "`reset()` method sets INTSTATUS_ENABLE1 to value 0x0f"]
87impl crate::Resettable for INTSTATUS_ENABLE1_SPEC {
88    const RESET_VALUE: u32 = 0x0f;
89}
esp32p4/dma/ch/intstatus_enable1.rs

esp32p4/dma/ch/
intstatus_enable1.rs
