esp32p4/uart0/
tout_conf.rs

1#[doc = "Register `TOUT_CONF` reader"]
2pub type R = crate::R<TOUT_CONF_SPEC>;
3#[doc = "Register `TOUT_CONF` writer"]
4pub type W = crate::W<TOUT_CONF_SPEC>;
5#[doc = "Field `RX_TOUT_EN` reader - This is the enble bit for uart receiver's timeout function."]
6pub type RX_TOUT_EN_R = crate::BitReader;
7#[doc = "Field `RX_TOUT_EN` writer - This is the enble bit for uart receiver's timeout function."]
8pub type RX_TOUT_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `RX_TOUT_FLOW_DIS` reader - Set this bit to stop accumulating idle_cnt when hardware flow control works."]
10pub type RX_TOUT_FLOW_DIS_R = crate::BitReader;
11#[doc = "Field `RX_TOUT_FLOW_DIS` writer - Set this bit to stop accumulating idle_cnt when hardware flow control works."]
12pub type RX_TOUT_FLOW_DIS_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `RX_TOUT_THRHD` reader - This register is used to configure the threshold time that receiver takes to receive one byte. The rxfifo_tout_int interrupt will be trigger when the receiver takes more time to receive one byte with rx_tout_en set to 1."]
14pub type RX_TOUT_THRHD_R = crate::FieldReader<u16>;
15#[doc = "Field `RX_TOUT_THRHD` writer - This register is used to configure the threshold time that receiver takes to receive one byte. The rxfifo_tout_int interrupt will be trigger when the receiver takes more time to receive one byte with rx_tout_en set to 1."]
16pub type RX_TOUT_THRHD_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>;
17impl R {
18    #[doc = "Bit 0 - This is the enble bit for uart receiver's timeout function."]
19    #[inline(always)]
20    pub fn rx_tout_en(&self) -> RX_TOUT_EN_R {
21        RX_TOUT_EN_R::new((self.bits & 1) != 0)
22    }
23    #[doc = "Bit 1 - Set this bit to stop accumulating idle_cnt when hardware flow control works."]
24    #[inline(always)]
25    pub fn rx_tout_flow_dis(&self) -> RX_TOUT_FLOW_DIS_R {
26        RX_TOUT_FLOW_DIS_R::new(((self.bits >> 1) & 1) != 0)
27    }
28    #[doc = "Bits 2:11 - This register is used to configure the threshold time that receiver takes to receive one byte. The rxfifo_tout_int interrupt will be trigger when the receiver takes more time to receive one byte with rx_tout_en set to 1."]
29    #[inline(always)]
30    pub fn rx_tout_thrhd(&self) -> RX_TOUT_THRHD_R {
31        RX_TOUT_THRHD_R::new(((self.bits >> 2) & 0x03ff) as u16)
32    }
33}
34#[cfg(feature = "impl-register-debug")]
35impl core::fmt::Debug for R {
36    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
37        f.debug_struct("TOUT_CONF")
38            .field("rx_tout_en", &format_args!("{}", self.rx_tout_en().bit()))
39            .field(
40                "rx_tout_flow_dis",
41                &format_args!("{}", self.rx_tout_flow_dis().bit()),
42            )
43            .field(
44                "rx_tout_thrhd",
45                &format_args!("{}", self.rx_tout_thrhd().bits()),
46            )
47            .finish()
48    }
49}
50#[cfg(feature = "impl-register-debug")]
51impl core::fmt::Debug for crate::generic::Reg<TOUT_CONF_SPEC> {
52    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
53        core::fmt::Debug::fmt(&self.read(), f)
54    }
55}
56impl W {
57    #[doc = "Bit 0 - This is the enble bit for uart receiver's timeout function."]
58    #[inline(always)]
59    #[must_use]
60    pub fn rx_tout_en(&mut self) -> RX_TOUT_EN_W<TOUT_CONF_SPEC> {
61        RX_TOUT_EN_W::new(self, 0)
62    }
63    #[doc = "Bit 1 - Set this bit to stop accumulating idle_cnt when hardware flow control works."]
64    #[inline(always)]
65    #[must_use]
66    pub fn rx_tout_flow_dis(&mut self) -> RX_TOUT_FLOW_DIS_W<TOUT_CONF_SPEC> {
67        RX_TOUT_FLOW_DIS_W::new(self, 1)
68    }
69    #[doc = "Bits 2:11 - This register is used to configure the threshold time that receiver takes to receive one byte. The rxfifo_tout_int interrupt will be trigger when the receiver takes more time to receive one byte with rx_tout_en set to 1."]
70    #[inline(always)]
71    #[must_use]
72    pub fn rx_tout_thrhd(&mut self) -> RX_TOUT_THRHD_W<TOUT_CONF_SPEC> {
73        RX_TOUT_THRHD_W::new(self, 2)
74    }
75}
76#[doc = "UART threshold and allocation configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tout_conf::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tout_conf::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
77pub struct TOUT_CONF_SPEC;
78impl crate::RegisterSpec for TOUT_CONF_SPEC {
79    type Ux = u32;
80}
81#[doc = "`read()` method returns [`tout_conf::R`](R) reader structure"]
82impl crate::Readable for TOUT_CONF_SPEC {}
83#[doc = "`write(|w| ..)` method takes [`tout_conf::W`](W) writer structure"]
84impl crate::Writable for TOUT_CONF_SPEC {
85    type Safety = crate::Unsafe;
86    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
87    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
88}
89#[doc = "`reset()` method sets TOUT_CONF to value 0x28"]
90impl crate::Resettable for TOUT_CONF_SPEC {
91    const RESET_VALUE: u32 = 0x28;
92}
esp32p4/uart0/tout_conf.rs

esp32p4/uart0/
tout_conf.rs
