esp32p4/spi2/
dma_int_set.rs1#[doc = "Register `DMA_INT_SET` writer"]
2pub type W = crate::W<DMA_INT_SET_SPEC>;
3#[doc = "Field `DMA_INFIFO_FULL_ERR_INT_SET` writer - The software set bit for SPI_DMA_INFIFO_FULL_ERR_INT interrupt."]
4pub type DMA_INFIFO_FULL_ERR_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
5#[doc = "Field `DMA_OUTFIFO_EMPTY_ERR_INT_SET` writer - The software set bit for SPI_DMA_OUTFIFO_EMPTY_ERR_INT interrupt."]
6pub type DMA_OUTFIFO_EMPTY_ERR_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
7#[doc = "Field `SLV_EX_QPI_INT_SET` writer - The software set bit for SPI slave Ex_QPI interrupt."]
8pub type SLV_EX_QPI_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `SLV_EN_QPI_INT_SET` writer - The software set bit for SPI slave En_QPI interrupt."]
10pub type SLV_EN_QPI_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
11#[doc = "Field `SLV_CMD7_INT_SET` writer - The software set bit for SPI slave CMD7 interrupt."]
12pub type SLV_CMD7_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `SLV_CMD8_INT_SET` writer - The software set bit for SPI slave CMD8 interrupt."]
14pub type SLV_CMD8_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
15#[doc = "Field `SLV_CMD9_INT_SET` writer - The software set bit for SPI slave CMD9 interrupt."]
16pub type SLV_CMD9_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `SLV_CMDA_INT_SET` writer - The software set bit for SPI slave CMDA interrupt."]
18pub type SLV_CMDA_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
19#[doc = "Field `SLV_RD_DMA_DONE_INT_SET` writer - The software set bit for SPI_SLV_RD_DMA_DONE_INT interrupt."]
20pub type SLV_RD_DMA_DONE_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `SLV_WR_DMA_DONE_INT_SET` writer - The software set bit for SPI_SLV_WR_DMA_DONE_INT interrupt."]
22pub type SLV_WR_DMA_DONE_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
23#[doc = "Field `SLV_RD_BUF_DONE_INT_SET` writer - The software set bit for SPI_SLV_RD_BUF_DONE_INT interrupt."]
24pub type SLV_RD_BUF_DONE_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `SLV_WR_BUF_DONE_INT_SET` writer - The software set bit for SPI_SLV_WR_BUF_DONE_INT interrupt."]
26pub type SLV_WR_BUF_DONE_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
27#[doc = "Field `TRANS_DONE_INT_SET` writer - The software set bit for SPI_TRANS_DONE_INT interrupt."]
28pub type TRANS_DONE_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `DMA_SEG_TRANS_DONE_INT_SET` writer - The software set bit for SPI_DMA_SEG_TRANS_DONE_INT interrupt."]
30pub type DMA_SEG_TRANS_DONE_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
31#[doc = "Field `SEG_MAGIC_ERR_INT_SET` writer - The software set bit for SPI_SEG_MAGIC_ERR_INT interrupt."]
32pub type SEG_MAGIC_ERR_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `SLV_BUF_ADDR_ERR_INT_SET` writer - The software set bit for SPI_SLV_BUF_ADDR_ERR_INT interrupt."]
34pub type SLV_BUF_ADDR_ERR_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
35#[doc = "Field `SLV_CMD_ERR_INT_SET` writer - The software set bit for SPI_SLV_CMD_ERR_INT interrupt."]
36pub type SLV_CMD_ERR_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `MST_RX_AFIFO_WFULL_ERR_INT_SET` writer - The software set bit for SPI_MST_RX_AFIFO_WFULL_ERR_INT interrupt."]
38pub type MST_RX_AFIFO_WFULL_ERR_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
39#[doc = "Field `MST_TX_AFIFO_REMPTY_ERR_INT_SET` writer - The software set bit for SPI_MST_TX_AFIFO_REMPTY_ERR_INT interrupt."]
40pub type MST_TX_AFIFO_REMPTY_ERR_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `APP2_INT_SET` writer - The software set bit for SPI_APP2_INT interrupt."]
42pub type APP2_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
43#[doc = "Field `APP1_INT_SET` writer - The software set bit for SPI_APP1_INT interrupt."]
44pub type APP1_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[cfg(feature = "impl-register-debug")]
46impl core::fmt::Debug for crate::generic::Reg<DMA_INT_SET_SPEC> {
47 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
48 write!(f, "(not readable)")
49 }
50}
51impl W {
52 #[doc = "Bit 0 - The software set bit for SPI_DMA_INFIFO_FULL_ERR_INT interrupt."]
53 #[inline(always)]
54 #[must_use]
55 pub fn dma_infifo_full_err_int_set(
56 &mut self,
57 ) -> DMA_INFIFO_FULL_ERR_INT_SET_W<DMA_INT_SET_SPEC> {
58 DMA_INFIFO_FULL_ERR_INT_SET_W::new(self, 0)
59 }
60 #[doc = "Bit 1 - The software set bit for SPI_DMA_OUTFIFO_EMPTY_ERR_INT interrupt."]
61 #[inline(always)]
62 #[must_use]
63 pub fn dma_outfifo_empty_err_int_set(
64 &mut self,
65 ) -> DMA_OUTFIFO_EMPTY_ERR_INT_SET_W<DMA_INT_SET_SPEC> {
66 DMA_OUTFIFO_EMPTY_ERR_INT_SET_W::new(self, 1)
67 }
68 #[doc = "Bit 2 - The software set bit for SPI slave Ex_QPI interrupt."]
69 #[inline(always)]
70 #[must_use]
71 pub fn slv_ex_qpi_int_set(&mut self) -> SLV_EX_QPI_INT_SET_W<DMA_INT_SET_SPEC> {
72 SLV_EX_QPI_INT_SET_W::new(self, 2)
73 }
74 #[doc = "Bit 3 - The software set bit for SPI slave En_QPI interrupt."]
75 #[inline(always)]
76 #[must_use]
77 pub fn slv_en_qpi_int_set(&mut self) -> SLV_EN_QPI_INT_SET_W<DMA_INT_SET_SPEC> {
78 SLV_EN_QPI_INT_SET_W::new(self, 3)
79 }
80 #[doc = "Bit 4 - The software set bit for SPI slave CMD7 interrupt."]
81 #[inline(always)]
82 #[must_use]
83 pub fn slv_cmd7_int_set(&mut self) -> SLV_CMD7_INT_SET_W<DMA_INT_SET_SPEC> {
84 SLV_CMD7_INT_SET_W::new(self, 4)
85 }
86 #[doc = "Bit 5 - The software set bit for SPI slave CMD8 interrupt."]
87 #[inline(always)]
88 #[must_use]
89 pub fn slv_cmd8_int_set(&mut self) -> SLV_CMD8_INT_SET_W<DMA_INT_SET_SPEC> {
90 SLV_CMD8_INT_SET_W::new(self, 5)
91 }
92 #[doc = "Bit 6 - The software set bit for SPI slave CMD9 interrupt."]
93 #[inline(always)]
94 #[must_use]
95 pub fn slv_cmd9_int_set(&mut self) -> SLV_CMD9_INT_SET_W<DMA_INT_SET_SPEC> {
96 SLV_CMD9_INT_SET_W::new(self, 6)
97 }
98 #[doc = "Bit 7 - The software set bit for SPI slave CMDA interrupt."]
99 #[inline(always)]
100 #[must_use]
101 pub fn slv_cmda_int_set(&mut self) -> SLV_CMDA_INT_SET_W<DMA_INT_SET_SPEC> {
102 SLV_CMDA_INT_SET_W::new(self, 7)
103 }
104 #[doc = "Bit 8 - The software set bit for SPI_SLV_RD_DMA_DONE_INT interrupt."]
105 #[inline(always)]
106 #[must_use]
107 pub fn slv_rd_dma_done_int_set(&mut self) -> SLV_RD_DMA_DONE_INT_SET_W<DMA_INT_SET_SPEC> {
108 SLV_RD_DMA_DONE_INT_SET_W::new(self, 8)
109 }
110 #[doc = "Bit 9 - The software set bit for SPI_SLV_WR_DMA_DONE_INT interrupt."]
111 #[inline(always)]
112 #[must_use]
113 pub fn slv_wr_dma_done_int_set(&mut self) -> SLV_WR_DMA_DONE_INT_SET_W<DMA_INT_SET_SPEC> {
114 SLV_WR_DMA_DONE_INT_SET_W::new(self, 9)
115 }
116 #[doc = "Bit 10 - The software set bit for SPI_SLV_RD_BUF_DONE_INT interrupt."]
117 #[inline(always)]
118 #[must_use]
119 pub fn slv_rd_buf_done_int_set(&mut self) -> SLV_RD_BUF_DONE_INT_SET_W<DMA_INT_SET_SPEC> {
120 SLV_RD_BUF_DONE_INT_SET_W::new(self, 10)
121 }
122 #[doc = "Bit 11 - The software set bit for SPI_SLV_WR_BUF_DONE_INT interrupt."]
123 #[inline(always)]
124 #[must_use]
125 pub fn slv_wr_buf_done_int_set(&mut self) -> SLV_WR_BUF_DONE_INT_SET_W<DMA_INT_SET_SPEC> {
126 SLV_WR_BUF_DONE_INT_SET_W::new(self, 11)
127 }
128 #[doc = "Bit 12 - The software set bit for SPI_TRANS_DONE_INT interrupt."]
129 #[inline(always)]
130 #[must_use]
131 pub fn trans_done_int_set(&mut self) -> TRANS_DONE_INT_SET_W<DMA_INT_SET_SPEC> {
132 TRANS_DONE_INT_SET_W::new(self, 12)
133 }
134 #[doc = "Bit 13 - The software set bit for SPI_DMA_SEG_TRANS_DONE_INT interrupt."]
135 #[inline(always)]
136 #[must_use]
137 pub fn dma_seg_trans_done_int_set(&mut self) -> DMA_SEG_TRANS_DONE_INT_SET_W<DMA_INT_SET_SPEC> {
138 DMA_SEG_TRANS_DONE_INT_SET_W::new(self, 13)
139 }
140 #[doc = "Bit 14 - The software set bit for SPI_SEG_MAGIC_ERR_INT interrupt."]
141 #[inline(always)]
142 #[must_use]
143 pub fn seg_magic_err_int_set(&mut self) -> SEG_MAGIC_ERR_INT_SET_W<DMA_INT_SET_SPEC> {
144 SEG_MAGIC_ERR_INT_SET_W::new(self, 14)
145 }
146 #[doc = "Bit 15 - The software set bit for SPI_SLV_BUF_ADDR_ERR_INT interrupt."]
147 #[inline(always)]
148 #[must_use]
149 pub fn slv_buf_addr_err_int_set(&mut self) -> SLV_BUF_ADDR_ERR_INT_SET_W<DMA_INT_SET_SPEC> {
150 SLV_BUF_ADDR_ERR_INT_SET_W::new(self, 15)
151 }
152 #[doc = "Bit 16 - The software set bit for SPI_SLV_CMD_ERR_INT interrupt."]
153 #[inline(always)]
154 #[must_use]
155 pub fn slv_cmd_err_int_set(&mut self) -> SLV_CMD_ERR_INT_SET_W<DMA_INT_SET_SPEC> {
156 SLV_CMD_ERR_INT_SET_W::new(self, 16)
157 }
158 #[doc = "Bit 17 - The software set bit for SPI_MST_RX_AFIFO_WFULL_ERR_INT interrupt."]
159 #[inline(always)]
160 #[must_use]
161 pub fn mst_rx_afifo_wfull_err_int_set(
162 &mut self,
163 ) -> MST_RX_AFIFO_WFULL_ERR_INT_SET_W<DMA_INT_SET_SPEC> {
164 MST_RX_AFIFO_WFULL_ERR_INT_SET_W::new(self, 17)
165 }
166 #[doc = "Bit 18 - The software set bit for SPI_MST_TX_AFIFO_REMPTY_ERR_INT interrupt."]
167 #[inline(always)]
168 #[must_use]
169 pub fn mst_tx_afifo_rempty_err_int_set(
170 &mut self,
171 ) -> MST_TX_AFIFO_REMPTY_ERR_INT_SET_W<DMA_INT_SET_SPEC> {
172 MST_TX_AFIFO_REMPTY_ERR_INT_SET_W::new(self, 18)
173 }
174 #[doc = "Bit 19 - The software set bit for SPI_APP2_INT interrupt."]
175 #[inline(always)]
176 #[must_use]
177 pub fn app2_int_set(&mut self) -> APP2_INT_SET_W<DMA_INT_SET_SPEC> {
178 APP2_INT_SET_W::new(self, 19)
179 }
180 #[doc = "Bit 20 - The software set bit for SPI_APP1_INT interrupt."]
181 #[inline(always)]
182 #[must_use]
183 pub fn app1_int_set(&mut self) -> APP1_INT_SET_W<DMA_INT_SET_SPEC> {
184 APP1_INT_SET_W::new(self, 20)
185 }
186}
187#[doc = "SPI interrupt software set register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_int_set::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
188pub struct DMA_INT_SET_SPEC;
189impl crate::RegisterSpec for DMA_INT_SET_SPEC {
190 type Ux = u32;
191}
192#[doc = "`write(|w| ..)` method takes [`dma_int_set::W`](W) writer structure"]
193impl crate::Writable for DMA_INT_SET_SPEC {
194 type Safety = crate::Unsafe;
195 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
196 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
197}
198#[doc = "`reset()` method sets DMA_INT_SET to value 0"]
199impl crate::Resettable for DMA_INT_SET_SPEC {
200 const RESET_VALUE: u32 = 0;
201}