esp32p4/lp_io_mux/
pad10.rs

1#[doc = "Register `PAD10` reader"]
2pub type R = crate::R<PAD10_SPEC>;
3#[doc = "Register `PAD10` writer"]
4pub type W = crate::W<PAD10_SPEC>;
5#[doc = "Field `REG_PAD10_DRV` reader - Reserved"]
6pub type REG_PAD10_DRV_R = crate::FieldReader;
7#[doc = "Field `REG_PAD10_DRV` writer - Reserved"]
8pub type REG_PAD10_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
9#[doc = "Field `REG_PAD10_RDE` reader - Reserved"]
10pub type REG_PAD10_RDE_R = crate::BitReader;
11#[doc = "Field `REG_PAD10_RDE` writer - Reserved"]
12pub type REG_PAD10_RDE_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `REG_PAD10_RUE` reader - Reserved"]
14pub type REG_PAD10_RUE_R = crate::BitReader;
15#[doc = "Field `REG_PAD10_RUE` writer - Reserved"]
16pub type REG_PAD10_RUE_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `REG_PAD10_MUX_SEL` reader - 1:use LP GPIO,0: use digital GPIO"]
18pub type REG_PAD10_MUX_SEL_R = crate::BitReader;
19#[doc = "Field `REG_PAD10_MUX_SEL` writer - 1:use LP GPIO,0: use digital GPIO"]
20pub type REG_PAD10_MUX_SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `REG_PAD10_FUN_SEL` reader - function sel"]
22pub type REG_PAD10_FUN_SEL_R = crate::FieldReader;
23#[doc = "Field `REG_PAD10_FUN_SEL` writer - function sel"]
24pub type REG_PAD10_FUN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
25#[doc = "Field `REG_PAD10_SLP_SEL` reader - 1: enable sleep mode during sleep,0: no sleep mode"]
26pub type REG_PAD10_SLP_SEL_R = crate::BitReader;
27#[doc = "Field `REG_PAD10_SLP_SEL` writer - 1: enable sleep mode during sleep,0: no sleep mode"]
28pub type REG_PAD10_SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `REG_PAD10_SLP_IE` reader - input enable in sleep mode"]
30pub type REG_PAD10_SLP_IE_R = crate::BitReader;
31#[doc = "Field `REG_PAD10_SLP_IE` writer - input enable in sleep mode"]
32pub type REG_PAD10_SLP_IE_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `REG_PAD10_SLP_OE` reader - output enable in sleep mode"]
34pub type REG_PAD10_SLP_OE_R = crate::BitReader;
35#[doc = "Field `REG_PAD10_SLP_OE` writer - output enable in sleep mode"]
36pub type REG_PAD10_SLP_OE_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `REG_PAD10_FUN_IE` reader - input enable in work mode"]
38pub type REG_PAD10_FUN_IE_R = crate::BitReader;
39#[doc = "Field `REG_PAD10_FUN_IE` writer - input enable in work mode"]
40pub type REG_PAD10_FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `REG_PAD10_FILTER_EN` reader - need des"]
42pub type REG_PAD10_FILTER_EN_R = crate::BitReader;
43#[doc = "Field `REG_PAD10_FILTER_EN` writer - need des"]
44pub type REG_PAD10_FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
45impl R {
46    #[doc = "Bits 0:1 - Reserved"]
47    #[inline(always)]
48    pub fn reg_pad10_drv(&self) -> REG_PAD10_DRV_R {
49        REG_PAD10_DRV_R::new((self.bits & 3) as u8)
50    }
51    #[doc = "Bit 2 - Reserved"]
52    #[inline(always)]
53    pub fn reg_pad10_rde(&self) -> REG_PAD10_RDE_R {
54        REG_PAD10_RDE_R::new(((self.bits >> 2) & 1) != 0)
55    }
56    #[doc = "Bit 3 - Reserved"]
57    #[inline(always)]
58    pub fn reg_pad10_rue(&self) -> REG_PAD10_RUE_R {
59        REG_PAD10_RUE_R::new(((self.bits >> 3) & 1) != 0)
60    }
61    #[doc = "Bit 4 - 1:use LP GPIO,0: use digital GPIO"]
62    #[inline(always)]
63    pub fn reg_pad10_mux_sel(&self) -> REG_PAD10_MUX_SEL_R {
64        REG_PAD10_MUX_SEL_R::new(((self.bits >> 4) & 1) != 0)
65    }
66    #[doc = "Bits 5:6 - function sel"]
67    #[inline(always)]
68    pub fn reg_pad10_fun_sel(&self) -> REG_PAD10_FUN_SEL_R {
69        REG_PAD10_FUN_SEL_R::new(((self.bits >> 5) & 3) as u8)
70    }
71    #[doc = "Bit 7 - 1: enable sleep mode during sleep,0: no sleep mode"]
72    #[inline(always)]
73    pub fn reg_pad10_slp_sel(&self) -> REG_PAD10_SLP_SEL_R {
74        REG_PAD10_SLP_SEL_R::new(((self.bits >> 7) & 1) != 0)
75    }
76    #[doc = "Bit 8 - input enable in sleep mode"]
77    #[inline(always)]
78    pub fn reg_pad10_slp_ie(&self) -> REG_PAD10_SLP_IE_R {
79        REG_PAD10_SLP_IE_R::new(((self.bits >> 8) & 1) != 0)
80    }
81    #[doc = "Bit 9 - output enable in sleep mode"]
82    #[inline(always)]
83    pub fn reg_pad10_slp_oe(&self) -> REG_PAD10_SLP_OE_R {
84        REG_PAD10_SLP_OE_R::new(((self.bits >> 9) & 1) != 0)
85    }
86    #[doc = "Bit 10 - input enable in work mode"]
87    #[inline(always)]
88    pub fn reg_pad10_fun_ie(&self) -> REG_PAD10_FUN_IE_R {
89        REG_PAD10_FUN_IE_R::new(((self.bits >> 10) & 1) != 0)
90    }
91    #[doc = "Bit 11 - need des"]
92    #[inline(always)]
93    pub fn reg_pad10_filter_en(&self) -> REG_PAD10_FILTER_EN_R {
94        REG_PAD10_FILTER_EN_R::new(((self.bits >> 11) & 1) != 0)
95    }
96}
97#[cfg(feature = "impl-register-debug")]
98impl core::fmt::Debug for R {
99    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
100        f.debug_struct("PAD10")
101            .field(
102                "reg_pad10_drv",
103                &format_args!("{}", self.reg_pad10_drv().bits()),
104            )
105            .field(
106                "reg_pad10_rde",
107                &format_args!("{}", self.reg_pad10_rde().bit()),
108            )
109            .field(
110                "reg_pad10_rue",
111                &format_args!("{}", self.reg_pad10_rue().bit()),
112            )
113            .field(
114                "reg_pad10_mux_sel",
115                &format_args!("{}", self.reg_pad10_mux_sel().bit()),
116            )
117            .field(
118                "reg_pad10_fun_sel",
119                &format_args!("{}", self.reg_pad10_fun_sel().bits()),
120            )
121            .field(
122                "reg_pad10_slp_sel",
123                &format_args!("{}", self.reg_pad10_slp_sel().bit()),
124            )
125            .field(
126                "reg_pad10_slp_ie",
127                &format_args!("{}", self.reg_pad10_slp_ie().bit()),
128            )
129            .field(
130                "reg_pad10_slp_oe",
131                &format_args!("{}", self.reg_pad10_slp_oe().bit()),
132            )
133            .field(
134                "reg_pad10_fun_ie",
135                &format_args!("{}", self.reg_pad10_fun_ie().bit()),
136            )
137            .field(
138                "reg_pad10_filter_en",
139                &format_args!("{}", self.reg_pad10_filter_en().bit()),
140            )
141            .finish()
142    }
143}
144#[cfg(feature = "impl-register-debug")]
145impl core::fmt::Debug for crate::generic::Reg<PAD10_SPEC> {
146    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
147        core::fmt::Debug::fmt(&self.read(), f)
148    }
149}
150impl W {
151    #[doc = "Bits 0:1 - Reserved"]
152    #[inline(always)]
153    #[must_use]
154    pub fn reg_pad10_drv(&mut self) -> REG_PAD10_DRV_W<PAD10_SPEC> {
155        REG_PAD10_DRV_W::new(self, 0)
156    }
157    #[doc = "Bit 2 - Reserved"]
158    #[inline(always)]
159    #[must_use]
160    pub fn reg_pad10_rde(&mut self) -> REG_PAD10_RDE_W<PAD10_SPEC> {
161        REG_PAD10_RDE_W::new(self, 2)
162    }
163    #[doc = "Bit 3 - Reserved"]
164    #[inline(always)]
165    #[must_use]
166    pub fn reg_pad10_rue(&mut self) -> REG_PAD10_RUE_W<PAD10_SPEC> {
167        REG_PAD10_RUE_W::new(self, 3)
168    }
169    #[doc = "Bit 4 - 1:use LP GPIO,0: use digital GPIO"]
170    #[inline(always)]
171    #[must_use]
172    pub fn reg_pad10_mux_sel(&mut self) -> REG_PAD10_MUX_SEL_W<PAD10_SPEC> {
173        REG_PAD10_MUX_SEL_W::new(self, 4)
174    }
175    #[doc = "Bits 5:6 - function sel"]
176    #[inline(always)]
177    #[must_use]
178    pub fn reg_pad10_fun_sel(&mut self) -> REG_PAD10_FUN_SEL_W<PAD10_SPEC> {
179        REG_PAD10_FUN_SEL_W::new(self, 5)
180    }
181    #[doc = "Bit 7 - 1: enable sleep mode during sleep,0: no sleep mode"]
182    #[inline(always)]
183    #[must_use]
184    pub fn reg_pad10_slp_sel(&mut self) -> REG_PAD10_SLP_SEL_W<PAD10_SPEC> {
185        REG_PAD10_SLP_SEL_W::new(self, 7)
186    }
187    #[doc = "Bit 8 - input enable in sleep mode"]
188    #[inline(always)]
189    #[must_use]
190    pub fn reg_pad10_slp_ie(&mut self) -> REG_PAD10_SLP_IE_W<PAD10_SPEC> {
191        REG_PAD10_SLP_IE_W::new(self, 8)
192    }
193    #[doc = "Bit 9 - output enable in sleep mode"]
194    #[inline(always)]
195    #[must_use]
196    pub fn reg_pad10_slp_oe(&mut self) -> REG_PAD10_SLP_OE_W<PAD10_SPEC> {
197        REG_PAD10_SLP_OE_W::new(self, 9)
198    }
199    #[doc = "Bit 10 - input enable in work mode"]
200    #[inline(always)]
201    #[must_use]
202    pub fn reg_pad10_fun_ie(&mut self) -> REG_PAD10_FUN_IE_W<PAD10_SPEC> {
203        REG_PAD10_FUN_IE_W::new(self, 10)
204    }
205    #[doc = "Bit 11 - need des"]
206    #[inline(always)]
207    #[must_use]
208    pub fn reg_pad10_filter_en(&mut self) -> REG_PAD10_FILTER_EN_W<PAD10_SPEC> {
209        REG_PAD10_FILTER_EN_W::new(self, 11)
210    }
211}
212#[doc = "Reserved\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pad10::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pad10::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
213pub struct PAD10_SPEC;
214impl crate::RegisterSpec for PAD10_SPEC {
215    type Ux = u32;
216}
217#[doc = "`read()` method returns [`pad10::R`](R) reader structure"]
218impl crate::Readable for PAD10_SPEC {}
219#[doc = "`write(|w| ..)` method takes [`pad10::W`](W) writer structure"]
220impl crate::Writable for PAD10_SPEC {
221    type Safety = crate::Unsafe;
222    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
223    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
224}
225#[doc = "`reset()` method sets PAD10 to value 0x02"]
226impl crate::Resettable for PAD10_SPEC {
227    const RESET_VALUE: u32 = 0x02;
228}
esp32p4/lp_io_mux/pad10.rs

esp32p4/lp_io_mux/
pad10.rs
