esp32p4/hp_sys/
tcm_ram_pwr_ctrl0.rs

1#[doc = "Register `TCM_RAM_PWR_CTRL0` reader"]
2pub type R = crate::R<TCM_RAM_PWR_CTRL0_SPEC>;
3#[doc = "Register `TCM_RAM_PWR_CTRL0` writer"]
4pub type W = crate::W<TCM_RAM_PWR_CTRL0_SPEC>;
5#[doc = "Field `REG_HP_TCM_CLK_FORCE_ON` reader - hp_tcm clk gatig force on"]
6pub type REG_HP_TCM_CLK_FORCE_ON_R = crate::BitReader;
7#[doc = "Field `REG_HP_TCM_CLK_FORCE_ON` writer - hp_tcm clk gatig force on"]
8pub type REG_HP_TCM_CLK_FORCE_ON_W<'a, REG> = crate::BitWriter<'a, REG>;
9impl R {
10    #[doc = "Bit 0 - hp_tcm clk gatig force on"]
11    #[inline(always)]
12    pub fn reg_hp_tcm_clk_force_on(&self) -> REG_HP_TCM_CLK_FORCE_ON_R {
13        REG_HP_TCM_CLK_FORCE_ON_R::new((self.bits & 1) != 0)
14    }
15}
16#[cfg(feature = "impl-register-debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("TCM_RAM_PWR_CTRL0")
20            .field(
21                "reg_hp_tcm_clk_force_on",
22                &format_args!("{}", self.reg_hp_tcm_clk_force_on().bit()),
23            )
24            .finish()
25    }
26}
27#[cfg(feature = "impl-register-debug")]
28impl core::fmt::Debug for crate::generic::Reg<TCM_RAM_PWR_CTRL0_SPEC> {
29    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
30        core::fmt::Debug::fmt(&self.read(), f)
31    }
32}
33impl W {
34    #[doc = "Bit 0 - hp_tcm clk gatig force on"]
35    #[inline(always)]
36    #[must_use]
37    pub fn reg_hp_tcm_clk_force_on(&mut self) -> REG_HP_TCM_CLK_FORCE_ON_W<TCM_RAM_PWR_CTRL0_SPEC> {
38        REG_HP_TCM_CLK_FORCE_ON_W::new(self, 0)
39    }
40}
41#[doc = "NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcm_ram_pwr_ctrl0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcm_ram_pwr_ctrl0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
42pub struct TCM_RAM_PWR_CTRL0_SPEC;
43impl crate::RegisterSpec for TCM_RAM_PWR_CTRL0_SPEC {
44    type Ux = u32;
45}
46#[doc = "`read()` method returns [`tcm_ram_pwr_ctrl0::R`](R) reader structure"]
47impl crate::Readable for TCM_RAM_PWR_CTRL0_SPEC {}
48#[doc = "`write(|w| ..)` method takes [`tcm_ram_pwr_ctrl0::W`](W) writer structure"]
49impl crate::Writable for TCM_RAM_PWR_CTRL0_SPEC {
50    type Safety = crate::Unsafe;
51    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
52    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
53}
54#[doc = "`reset()` method sets TCM_RAM_PWR_CTRL0 to value 0"]
55impl crate::Resettable for TCM_RAM_PWR_CTRL0_SPEC {
56    const RESET_VALUE: u32 = 0;
57}
esp32p4/hp_sys/tcm_ram_pwr_ctrl0.rs

esp32p4/hp_sys/
tcm_ram_pwr_ctrl0.rs
