esp32p4/lp_i2c0/
scl_main_st_time_out.rs1#[doc = "Register `SCL_MAIN_ST_TIME_OUT` reader"]
2pub type R = crate::R<SCL_MAIN_ST_TIME_OUT_SPEC>;
3#[doc = "Register `SCL_MAIN_ST_TIME_OUT` writer"]
4pub type W = crate::W<SCL_MAIN_ST_TIME_OUT_SPEC>;
5#[doc = "Field `SCL_MAIN_ST_TO_I2C` reader - Configures the threshold value of SCL_MAIN_FSM state unchanged period.nIt should be no more than 23. Measurement unit: i2c_sclk"]
6pub type SCL_MAIN_ST_TO_I2C_R = crate::FieldReader;
7#[doc = "Field `SCL_MAIN_ST_TO_I2C` writer - Configures the threshold value of SCL_MAIN_FSM state unchanged period.nIt should be no more than 23. Measurement unit: i2c_sclk"]
8pub type SCL_MAIN_ST_TO_I2C_W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
9impl R {
10 #[doc = "Bits 0:4 - Configures the threshold value of SCL_MAIN_FSM state unchanged period.nIt should be no more than 23. Measurement unit: i2c_sclk"]
11 #[inline(always)]
12 pub fn scl_main_st_to_i2c(&self) -> SCL_MAIN_ST_TO_I2C_R {
13 SCL_MAIN_ST_TO_I2C_R::new((self.bits & 0x1f) as u8)
14 }
15}
16#[cfg(feature = "impl-register-debug")]
17impl core::fmt::Debug for R {
18 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19 f.debug_struct("SCL_MAIN_ST_TIME_OUT")
20 .field(
21 "scl_main_st_to_i2c",
22 &format_args!("{}", self.scl_main_st_to_i2c().bits()),
23 )
24 .finish()
25 }
26}
27#[cfg(feature = "impl-register-debug")]
28impl core::fmt::Debug for crate::generic::Reg<SCL_MAIN_ST_TIME_OUT_SPEC> {
29 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
30 core::fmt::Debug::fmt(&self.read(), f)
31 }
32}
33impl W {
34 #[doc = "Bits 0:4 - Configures the threshold value of SCL_MAIN_FSM state unchanged period.nIt should be no more than 23. Measurement unit: i2c_sclk"]
35 #[inline(always)]
36 #[must_use]
37 pub fn scl_main_st_to_i2c(&mut self) -> SCL_MAIN_ST_TO_I2C_W<SCL_MAIN_ST_TIME_OUT_SPEC> {
38 SCL_MAIN_ST_TO_I2C_W::new(self, 0)
39 }
40}
41#[doc = "SCL main status time out register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`scl_main_st_time_out::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`scl_main_st_time_out::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
42pub struct SCL_MAIN_ST_TIME_OUT_SPEC;
43impl crate::RegisterSpec for SCL_MAIN_ST_TIME_OUT_SPEC {
44 type Ux = u32;
45}
46#[doc = "`read()` method returns [`scl_main_st_time_out::R`](R) reader structure"]
47impl crate::Readable for SCL_MAIN_ST_TIME_OUT_SPEC {}
48#[doc = "`write(|w| ..)` method takes [`scl_main_st_time_out::W`](W) writer structure"]
49impl crate::Writable for SCL_MAIN_ST_TIME_OUT_SPEC {
50 type Safety = crate::Unsafe;
51 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
52 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
53}
54#[doc = "`reset()` method sets SCL_MAIN_ST_TIME_OUT to value 0x10"]
55impl crate::Resettable for SCL_MAIN_ST_TIME_OUT_SPEC {
56 const RESET_VALUE: u32 = 0x10;
57}