esp32p4/i2c0/
scl_rstart_setup.rs

1#[doc = "Register `SCL_RSTART_SETUP` reader"]
2pub type R = crate::R<SCL_RSTART_SETUP_SPEC>;
3#[doc = "Register `SCL_RSTART_SETUP` writer"]
4pub type W = crate::W<SCL_RSTART_SETUP_SPEC>;
5#[doc = "Field `TIME` reader - Configures the time between the positive edge of SCL and the negative edge of SDA for a RESTART condition. Measurement unit: i2c_sclk"]
6pub type TIME_R = crate::FieldReader<u16>;
7#[doc = "Field `TIME` writer - Configures the time between the positive edge of SCL and the negative edge of SDA for a RESTART condition. Measurement unit: i2c_sclk"]
8pub type TIME_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>;
9impl R {
10    #[doc = "Bits 0:8 - Configures the time between the positive edge of SCL and the negative edge of SDA for a RESTART condition. Measurement unit: i2c_sclk"]
11    #[inline(always)]
12    pub fn time(&self) -> TIME_R {
13        TIME_R::new((self.bits & 0x01ff) as u16)
14    }
15}
16#[cfg(feature = "impl-register-debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("SCL_RSTART_SETUP")
20            .field("time", &format_args!("{}", self.time().bits()))
21            .finish()
22    }
23}
24#[cfg(feature = "impl-register-debug")]
25impl core::fmt::Debug for crate::generic::Reg<SCL_RSTART_SETUP_SPEC> {
26    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
27        core::fmt::Debug::fmt(&self.read(), f)
28    }
29}
30impl W {
31    #[doc = "Bits 0:8 - Configures the time between the positive edge of SCL and the negative edge of SDA for a RESTART condition. Measurement unit: i2c_sclk"]
32    #[inline(always)]
33    #[must_use]
34    pub fn time(&mut self) -> TIME_W<SCL_RSTART_SETUP_SPEC> {
35        TIME_W::new(self, 0)
36    }
37}
38#[doc = "Configures the delay between the positive edge of SCL and the negative edge of SDA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`scl_rstart_setup::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`scl_rstart_setup::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
39pub struct SCL_RSTART_SETUP_SPEC;
40impl crate::RegisterSpec for SCL_RSTART_SETUP_SPEC {
41    type Ux = u32;
42}
43#[doc = "`read()` method returns [`scl_rstart_setup::R`](R) reader structure"]
44impl crate::Readable for SCL_RSTART_SETUP_SPEC {}
45#[doc = "`write(|w| ..)` method takes [`scl_rstart_setup::W`](W) writer structure"]
46impl crate::Writable for SCL_RSTART_SETUP_SPEC {
47    type Safety = crate::Unsafe;
48    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
49    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
50}
51#[doc = "`reset()` method sets SCL_RSTART_SETUP to value 0x08"]
52impl crate::Resettable for SCL_RSTART_SETUP_SPEC {
53    const RESET_VALUE: u32 = 0x08;
54}