esp32p4/spi0/
axi_err_resp_en.rs

1#[doc = "Register `AXI_ERR_RESP_EN` reader"]
2pub type R = crate::R<AXI_ERR_RESP_EN_SPEC>;
3#[doc = "Register `AXI_ERR_RESP_EN` writer"]
4pub type W = crate::W<AXI_ERR_RESP_EN_SPEC>;
5#[doc = "Field `AW_RESP_EN_MMU_VLD` reader - Set this bit to enable AXI response function for mmu valid err in axi write trans."]
6pub type AW_RESP_EN_MMU_VLD_R = crate::BitReader;
7#[doc = "Field `AW_RESP_EN_MMU_VLD` writer - Set this bit to enable AXI response function for mmu valid err in axi write trans."]
8pub type AW_RESP_EN_MMU_VLD_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `AW_RESP_EN_MMU_GID` reader - Set this bit to enable AXI response function for mmu gid err in axi write trans."]
10pub type AW_RESP_EN_MMU_GID_R = crate::BitReader;
11#[doc = "Field `AW_RESP_EN_MMU_GID` writer - Set this bit to enable AXI response function for mmu gid err in axi write trans."]
12pub type AW_RESP_EN_MMU_GID_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `AW_RESP_EN_AXI_SIZE` reader - Set this bit to enable AXI response function for axi size err in axi write trans."]
14pub type AW_RESP_EN_AXI_SIZE_R = crate::BitReader;
15#[doc = "Field `AW_RESP_EN_AXI_SIZE` writer - Set this bit to enable AXI response function for axi size err in axi write trans."]
16pub type AW_RESP_EN_AXI_SIZE_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `AW_RESP_EN_AXI_FLASH` reader - Set this bit to enable AXI response function for axi flash err in axi write trans."]
18pub type AW_RESP_EN_AXI_FLASH_R = crate::BitReader;
19#[doc = "Field `AW_RESP_EN_AXI_FLASH` writer - Set this bit to enable AXI response function for axi flash err in axi write trans."]
20pub type AW_RESP_EN_AXI_FLASH_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `AW_RESP_EN_MMU_ECC` reader - Set this bit to enable AXI response function for mmu ecc err in axi write trans."]
22pub type AW_RESP_EN_MMU_ECC_R = crate::BitReader;
23#[doc = "Field `AW_RESP_EN_MMU_ECC` writer - Set this bit to enable AXI response function for mmu ecc err in axi write trans."]
24pub type AW_RESP_EN_MMU_ECC_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `AW_RESP_EN_MMU_SENS` reader - Set this bit to enable AXI response function for mmu sens in err axi write trans."]
26pub type AW_RESP_EN_MMU_SENS_R = crate::BitReader;
27#[doc = "Field `AW_RESP_EN_MMU_SENS` writer - Set this bit to enable AXI response function for mmu sens in err axi write trans."]
28pub type AW_RESP_EN_MMU_SENS_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `AW_RESP_EN_AXI_WSTRB` reader - Set this bit to enable AXI response function for axi wstrb err in axi write trans."]
30pub type AW_RESP_EN_AXI_WSTRB_R = crate::BitReader;
31#[doc = "Field `AW_RESP_EN_AXI_WSTRB` writer - Set this bit to enable AXI response function for axi wstrb err in axi write trans."]
32pub type AW_RESP_EN_AXI_WSTRB_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `AR_RESP_EN_MMU_VLD` reader - Set this bit to enable AXI response function for mmu valid err in axi read trans."]
34pub type AR_RESP_EN_MMU_VLD_R = crate::BitReader;
35#[doc = "Field `AR_RESP_EN_MMU_VLD` writer - Set this bit to enable AXI response function for mmu valid err in axi read trans."]
36pub type AR_RESP_EN_MMU_VLD_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `AR_RESP_EN_MMU_GID` reader - Set this bit to enable AXI response function for mmu gid err in axi read trans."]
38pub type AR_RESP_EN_MMU_GID_R = crate::BitReader;
39#[doc = "Field `AR_RESP_EN_MMU_GID` writer - Set this bit to enable AXI response function for mmu gid err in axi read trans."]
40pub type AR_RESP_EN_MMU_GID_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `AR_RESP_EN_MMU_ECC` reader - Set this bit to enable AXI response function for mmu ecc err in axi read trans."]
42pub type AR_RESP_EN_MMU_ECC_R = crate::BitReader;
43#[doc = "Field `AR_RESP_EN_MMU_ECC` writer - Set this bit to enable AXI response function for mmu ecc err in axi read trans."]
44pub type AR_RESP_EN_MMU_ECC_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `AR_RESP_EN_MMU_SENS` reader - Set this bit to enable AXI response function for mmu sensitive err in axi read trans."]
46pub type AR_RESP_EN_MMU_SENS_R = crate::BitReader;
47#[doc = "Field `AR_RESP_EN_MMU_SENS` writer - Set this bit to enable AXI response function for mmu sensitive err in axi read trans."]
48pub type AR_RESP_EN_MMU_SENS_W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `AR_RESP_EN_AXI_SIZE` reader - Set this bit to enable AXI response function for axi size err in axi read trans."]
50pub type AR_RESP_EN_AXI_SIZE_R = crate::BitReader;
51#[doc = "Field `AR_RESP_EN_AXI_SIZE` writer - Set this bit to enable AXI response function for axi size err in axi read trans."]
52pub type AR_RESP_EN_AXI_SIZE_W<'a, REG> = crate::BitWriter<'a, REG>;
53impl R {
54    #[doc = "Bit 0 - Set this bit to enable AXI response function for mmu valid err in axi write trans."]
55    #[inline(always)]
56    pub fn aw_resp_en_mmu_vld(&self) -> AW_RESP_EN_MMU_VLD_R {
57        AW_RESP_EN_MMU_VLD_R::new((self.bits & 1) != 0)
58    }
59    #[doc = "Bit 1 - Set this bit to enable AXI response function for mmu gid err in axi write trans."]
60    #[inline(always)]
61    pub fn aw_resp_en_mmu_gid(&self) -> AW_RESP_EN_MMU_GID_R {
62        AW_RESP_EN_MMU_GID_R::new(((self.bits >> 1) & 1) != 0)
63    }
64    #[doc = "Bit 2 - Set this bit to enable AXI response function for axi size err in axi write trans."]
65    #[inline(always)]
66    pub fn aw_resp_en_axi_size(&self) -> AW_RESP_EN_AXI_SIZE_R {
67        AW_RESP_EN_AXI_SIZE_R::new(((self.bits >> 2) & 1) != 0)
68    }
69    #[doc = "Bit 3 - Set this bit to enable AXI response function for axi flash err in axi write trans."]
70    #[inline(always)]
71    pub fn aw_resp_en_axi_flash(&self) -> AW_RESP_EN_AXI_FLASH_R {
72        AW_RESP_EN_AXI_FLASH_R::new(((self.bits >> 3) & 1) != 0)
73    }
74    #[doc = "Bit 4 - Set this bit to enable AXI response function for mmu ecc err in axi write trans."]
75    #[inline(always)]
76    pub fn aw_resp_en_mmu_ecc(&self) -> AW_RESP_EN_MMU_ECC_R {
77        AW_RESP_EN_MMU_ECC_R::new(((self.bits >> 4) & 1) != 0)
78    }
79    #[doc = "Bit 5 - Set this bit to enable AXI response function for mmu sens in err axi write trans."]
80    #[inline(always)]
81    pub fn aw_resp_en_mmu_sens(&self) -> AW_RESP_EN_MMU_SENS_R {
82        AW_RESP_EN_MMU_SENS_R::new(((self.bits >> 5) & 1) != 0)
83    }
84    #[doc = "Bit 6 - Set this bit to enable AXI response function for axi wstrb err in axi write trans."]
85    #[inline(always)]
86    pub fn aw_resp_en_axi_wstrb(&self) -> AW_RESP_EN_AXI_WSTRB_R {
87        AW_RESP_EN_AXI_WSTRB_R::new(((self.bits >> 6) & 1) != 0)
88    }
89    #[doc = "Bit 7 - Set this bit to enable AXI response function for mmu valid err in axi read trans."]
90    #[inline(always)]
91    pub fn ar_resp_en_mmu_vld(&self) -> AR_RESP_EN_MMU_VLD_R {
92        AR_RESP_EN_MMU_VLD_R::new(((self.bits >> 7) & 1) != 0)
93    }
94    #[doc = "Bit 8 - Set this bit to enable AXI response function for mmu gid err in axi read trans."]
95    #[inline(always)]
96    pub fn ar_resp_en_mmu_gid(&self) -> AR_RESP_EN_MMU_GID_R {
97        AR_RESP_EN_MMU_GID_R::new(((self.bits >> 8) & 1) != 0)
98    }
99    #[doc = "Bit 9 - Set this bit to enable AXI response function for mmu ecc err in axi read trans."]
100    #[inline(always)]
101    pub fn ar_resp_en_mmu_ecc(&self) -> AR_RESP_EN_MMU_ECC_R {
102        AR_RESP_EN_MMU_ECC_R::new(((self.bits >> 9) & 1) != 0)
103    }
104    #[doc = "Bit 10 - Set this bit to enable AXI response function for mmu sensitive err in axi read trans."]
105    #[inline(always)]
106    pub fn ar_resp_en_mmu_sens(&self) -> AR_RESP_EN_MMU_SENS_R {
107        AR_RESP_EN_MMU_SENS_R::new(((self.bits >> 10) & 1) != 0)
108    }
109    #[doc = "Bit 11 - Set this bit to enable AXI response function for axi size err in axi read trans."]
110    #[inline(always)]
111    pub fn ar_resp_en_axi_size(&self) -> AR_RESP_EN_AXI_SIZE_R {
112        AR_RESP_EN_AXI_SIZE_R::new(((self.bits >> 11) & 1) != 0)
113    }
114}
115#[cfg(feature = "impl-register-debug")]
116impl core::fmt::Debug for R {
117    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
118        f.debug_struct("AXI_ERR_RESP_EN")
119            .field(
120                "aw_resp_en_mmu_vld",
121                &format_args!("{}", self.aw_resp_en_mmu_vld().bit()),
122            )
123            .field(
124                "aw_resp_en_mmu_gid",
125                &format_args!("{}", self.aw_resp_en_mmu_gid().bit()),
126            )
127            .field(
128                "aw_resp_en_axi_size",
129                &format_args!("{}", self.aw_resp_en_axi_size().bit()),
130            )
131            .field(
132                "aw_resp_en_axi_flash",
133                &format_args!("{}", self.aw_resp_en_axi_flash().bit()),
134            )
135            .field(
136                "aw_resp_en_mmu_ecc",
137                &format_args!("{}", self.aw_resp_en_mmu_ecc().bit()),
138            )
139            .field(
140                "aw_resp_en_mmu_sens",
141                &format_args!("{}", self.aw_resp_en_mmu_sens().bit()),
142            )
143            .field(
144                "aw_resp_en_axi_wstrb",
145                &format_args!("{}", self.aw_resp_en_axi_wstrb().bit()),
146            )
147            .field(
148                "ar_resp_en_mmu_vld",
149                &format_args!("{}", self.ar_resp_en_mmu_vld().bit()),
150            )
151            .field(
152                "ar_resp_en_mmu_gid",
153                &format_args!("{}", self.ar_resp_en_mmu_gid().bit()),
154            )
155            .field(
156                "ar_resp_en_mmu_ecc",
157                &format_args!("{}", self.ar_resp_en_mmu_ecc().bit()),
158            )
159            .field(
160                "ar_resp_en_mmu_sens",
161                &format_args!("{}", self.ar_resp_en_mmu_sens().bit()),
162            )
163            .field(
164                "ar_resp_en_axi_size",
165                &format_args!("{}", self.ar_resp_en_axi_size().bit()),
166            )
167            .finish()
168    }
169}
170#[cfg(feature = "impl-register-debug")]
171impl core::fmt::Debug for crate::generic::Reg<AXI_ERR_RESP_EN_SPEC> {
172    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
173        core::fmt::Debug::fmt(&self.read(), f)
174    }
175}
176impl W {
177    #[doc = "Bit 0 - Set this bit to enable AXI response function for mmu valid err in axi write trans."]
178    #[inline(always)]
179    #[must_use]
180    pub fn aw_resp_en_mmu_vld(&mut self) -> AW_RESP_EN_MMU_VLD_W<AXI_ERR_RESP_EN_SPEC> {
181        AW_RESP_EN_MMU_VLD_W::new(self, 0)
182    }
183    #[doc = "Bit 1 - Set this bit to enable AXI response function for mmu gid err in axi write trans."]
184    #[inline(always)]
185    #[must_use]
186    pub fn aw_resp_en_mmu_gid(&mut self) -> AW_RESP_EN_MMU_GID_W<AXI_ERR_RESP_EN_SPEC> {
187        AW_RESP_EN_MMU_GID_W::new(self, 1)
188    }
189    #[doc = "Bit 2 - Set this bit to enable AXI response function for axi size err in axi write trans."]
190    #[inline(always)]
191    #[must_use]
192    pub fn aw_resp_en_axi_size(&mut self) -> AW_RESP_EN_AXI_SIZE_W<AXI_ERR_RESP_EN_SPEC> {
193        AW_RESP_EN_AXI_SIZE_W::new(self, 2)
194    }
195    #[doc = "Bit 3 - Set this bit to enable AXI response function for axi flash err in axi write trans."]
196    #[inline(always)]
197    #[must_use]
198    pub fn aw_resp_en_axi_flash(&mut self) -> AW_RESP_EN_AXI_FLASH_W<AXI_ERR_RESP_EN_SPEC> {
199        AW_RESP_EN_AXI_FLASH_W::new(self, 3)
200    }
201    #[doc = "Bit 4 - Set this bit to enable AXI response function for mmu ecc err in axi write trans."]
202    #[inline(always)]
203    #[must_use]
204    pub fn aw_resp_en_mmu_ecc(&mut self) -> AW_RESP_EN_MMU_ECC_W<AXI_ERR_RESP_EN_SPEC> {
205        AW_RESP_EN_MMU_ECC_W::new(self, 4)
206    }
207    #[doc = "Bit 5 - Set this bit to enable AXI response function for mmu sens in err axi write trans."]
208    #[inline(always)]
209    #[must_use]
210    pub fn aw_resp_en_mmu_sens(&mut self) -> AW_RESP_EN_MMU_SENS_W<AXI_ERR_RESP_EN_SPEC> {
211        AW_RESP_EN_MMU_SENS_W::new(self, 5)
212    }
213    #[doc = "Bit 6 - Set this bit to enable AXI response function for axi wstrb err in axi write trans."]
214    #[inline(always)]
215    #[must_use]
216    pub fn aw_resp_en_axi_wstrb(&mut self) -> AW_RESP_EN_AXI_WSTRB_W<AXI_ERR_RESP_EN_SPEC> {
217        AW_RESP_EN_AXI_WSTRB_W::new(self, 6)
218    }
219    #[doc = "Bit 7 - Set this bit to enable AXI response function for mmu valid err in axi read trans."]
220    #[inline(always)]
221    #[must_use]
222    pub fn ar_resp_en_mmu_vld(&mut self) -> AR_RESP_EN_MMU_VLD_W<AXI_ERR_RESP_EN_SPEC> {
223        AR_RESP_EN_MMU_VLD_W::new(self, 7)
224    }
225    #[doc = "Bit 8 - Set this bit to enable AXI response function for mmu gid err in axi read trans."]
226    #[inline(always)]
227    #[must_use]
228    pub fn ar_resp_en_mmu_gid(&mut self) -> AR_RESP_EN_MMU_GID_W<AXI_ERR_RESP_EN_SPEC> {
229        AR_RESP_EN_MMU_GID_W::new(self, 8)
230    }
231    #[doc = "Bit 9 - Set this bit to enable AXI response function for mmu ecc err in axi read trans."]
232    #[inline(always)]
233    #[must_use]
234    pub fn ar_resp_en_mmu_ecc(&mut self) -> AR_RESP_EN_MMU_ECC_W<AXI_ERR_RESP_EN_SPEC> {
235        AR_RESP_EN_MMU_ECC_W::new(self, 9)
236    }
237    #[doc = "Bit 10 - Set this bit to enable AXI response function for mmu sensitive err in axi read trans."]
238    #[inline(always)]
239    #[must_use]
240    pub fn ar_resp_en_mmu_sens(&mut self) -> AR_RESP_EN_MMU_SENS_W<AXI_ERR_RESP_EN_SPEC> {
241        AR_RESP_EN_MMU_SENS_W::new(self, 10)
242    }
243    #[doc = "Bit 11 - Set this bit to enable AXI response function for axi size err in axi read trans."]
244    #[inline(always)]
245    #[must_use]
246    pub fn ar_resp_en_axi_size(&mut self) -> AR_RESP_EN_AXI_SIZE_W<AXI_ERR_RESP_EN_SPEC> {
247        AR_RESP_EN_AXI_SIZE_W::new(self, 11)
248    }
249}
250#[doc = "SPI0 AXI error response enable register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`axi_err_resp_en::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`axi_err_resp_en::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
251pub struct AXI_ERR_RESP_EN_SPEC;
252impl crate::RegisterSpec for AXI_ERR_RESP_EN_SPEC {
253    type Ux = u32;
254}
255#[doc = "`read()` method returns [`axi_err_resp_en::R`](R) reader structure"]
256impl crate::Readable for AXI_ERR_RESP_EN_SPEC {}
257#[doc = "`write(|w| ..)` method takes [`axi_err_resp_en::W`](W) writer structure"]
258impl crate::Writable for AXI_ERR_RESP_EN_SPEC {
259    type Safety = crate::Unsafe;
260    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
261    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
262}
263#[doc = "`reset()` method sets AXI_ERR_RESP_EN to value 0"]
264impl crate::Resettable for AXI_ERR_RESP_EN_SPEC {
265    const RESET_VALUE: u32 = 0;
266}
esp32p4/spi0/axi_err_resp_en.rs

esp32p4/spi0/
axi_err_resp_en.rs
