esp32p4/ahb_dma/ch/
out_push.rs1#[doc = "Register `OUT_PUSH` reader"]
2pub type R = crate::R<OUT_PUSH_SPEC>;
3#[doc = "Register `OUT_PUSH` writer"]
4pub type W = crate::W<OUT_PUSH_SPEC>;
5#[doc = "Field `OUTFIFO_WDATA` reader - This register stores the data that need to be pushed into AHB_DMA FIFO."]
6pub type OUTFIFO_WDATA_R = crate::FieldReader<u16>;
7#[doc = "Field `OUTFIFO_WDATA` writer - This register stores the data that need to be pushed into AHB_DMA FIFO."]
8pub type OUTFIFO_WDATA_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>;
9#[doc = "Field `OUTFIFO_PUSH` writer - Set this bit to push data into AHB_DMA FIFO."]
10pub type OUTFIFO_PUSH_W<'a, REG> = crate::BitWriter<'a, REG>;
11impl R {
12 #[doc = "Bits 0:8 - This register stores the data that need to be pushed into AHB_DMA FIFO."]
13 #[inline(always)]
14 pub fn outfifo_wdata(&self) -> OUTFIFO_WDATA_R {
15 OUTFIFO_WDATA_R::new((self.bits & 0x01ff) as u16)
16 }
17}
18#[cfg(feature = "impl-register-debug")]
19impl core::fmt::Debug for R {
20 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
21 f.debug_struct("OUT_PUSH")
22 .field(
23 "outfifo_wdata",
24 &format_args!("{}", self.outfifo_wdata().bits()),
25 )
26 .finish()
27 }
28}
29#[cfg(feature = "impl-register-debug")]
30impl core::fmt::Debug for crate::generic::Reg<OUT_PUSH_SPEC> {
31 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
32 core::fmt::Debug::fmt(&self.read(), f)
33 }
34}
35impl W {
36 #[doc = "Bits 0:8 - This register stores the data that need to be pushed into AHB_DMA FIFO."]
37 #[inline(always)]
38 #[must_use]
39 pub fn outfifo_wdata(&mut self) -> OUTFIFO_WDATA_W<OUT_PUSH_SPEC> {
40 OUTFIFO_WDATA_W::new(self, 0)
41 }
42 #[doc = "Bit 9 - Set this bit to push data into AHB_DMA FIFO."]
43 #[inline(always)]
44 #[must_use]
45 pub fn outfifo_push(&mut self) -> OUTFIFO_PUSH_W<OUT_PUSH_SPEC> {
46 OUTFIFO_PUSH_W::new(self, 9)
47 }
48}
49#[doc = "Push control register of Rx channel 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`out_push::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`out_push::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
50pub struct OUT_PUSH_SPEC;
51impl crate::RegisterSpec for OUT_PUSH_SPEC {
52 type Ux = u32;
53}
54#[doc = "`read()` method returns [`out_push::R`](R) reader structure"]
55impl crate::Readable for OUT_PUSH_SPEC {}
56#[doc = "`write(|w| ..)` method takes [`out_push::W`](W) writer structure"]
57impl crate::Writable for OUT_PUSH_SPEC {
58 type Safety = crate::Unsafe;
59 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
60 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
61}
62#[doc = "`reset()` method sets OUT_PUSH to value 0"]
63impl crate::Resettable for OUT_PUSH_SPEC {
64 const RESET_VALUE: u32 = 0;
65}