esp32p4/isp/
hist_seg0.rs

1#[doc = "Register `HIST_SEG0` reader"]
2pub type R = crate::R<HIST_SEG0_SPEC>;
3#[doc = "Register `HIST_SEG0` writer"]
4pub type W = crate::W<HIST_SEG0_SPEC>;
5#[doc = "Field `HIST_SEG_3_4` reader - this field configures threshold of histogram bin 3 and bin 4"]
6pub type HIST_SEG_3_4_R = crate::FieldReader;
7#[doc = "Field `HIST_SEG_3_4` writer - this field configures threshold of histogram bin 3 and bin 4"]
8pub type HIST_SEG_3_4_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9#[doc = "Field `HIST_SEG_2_3` reader - this field configures threshold of histogram bin 2 and bin 3"]
10pub type HIST_SEG_2_3_R = crate::FieldReader;
11#[doc = "Field `HIST_SEG_2_3` writer - this field configures threshold of histogram bin 2 and bin 3"]
12pub type HIST_SEG_2_3_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
13#[doc = "Field `HIST_SEG_1_2` reader - this field configures threshold of histogram bin 1 and bin 2"]
14pub type HIST_SEG_1_2_R = crate::FieldReader;
15#[doc = "Field `HIST_SEG_1_2` writer - this field configures threshold of histogram bin 1 and bin 2"]
16pub type HIST_SEG_1_2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
17#[doc = "Field `HIST_SEG_0_1` reader - this field configures threshold of histogram bin 0 and bin 1"]
18pub type HIST_SEG_0_1_R = crate::FieldReader;
19#[doc = "Field `HIST_SEG_0_1` writer - this field configures threshold of histogram bin 0 and bin 1"]
20pub type HIST_SEG_0_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
21impl R {
22    #[doc = "Bits 0:7 - this field configures threshold of histogram bin 3 and bin 4"]
23    #[inline(always)]
24    pub fn hist_seg_3_4(&self) -> HIST_SEG_3_4_R {
25        HIST_SEG_3_4_R::new((self.bits & 0xff) as u8)
26    }
27    #[doc = "Bits 8:15 - this field configures threshold of histogram bin 2 and bin 3"]
28    #[inline(always)]
29    pub fn hist_seg_2_3(&self) -> HIST_SEG_2_3_R {
30        HIST_SEG_2_3_R::new(((self.bits >> 8) & 0xff) as u8)
31    }
32    #[doc = "Bits 16:23 - this field configures threshold of histogram bin 1 and bin 2"]
33    #[inline(always)]
34    pub fn hist_seg_1_2(&self) -> HIST_SEG_1_2_R {
35        HIST_SEG_1_2_R::new(((self.bits >> 16) & 0xff) as u8)
36    }
37    #[doc = "Bits 24:31 - this field configures threshold of histogram bin 0 and bin 1"]
38    #[inline(always)]
39    pub fn hist_seg_0_1(&self) -> HIST_SEG_0_1_R {
40        HIST_SEG_0_1_R::new(((self.bits >> 24) & 0xff) as u8)
41    }
42}
43#[cfg(feature = "impl-register-debug")]
44impl core::fmt::Debug for R {
45    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
46        f.debug_struct("HIST_SEG0")
47            .field(
48                "hist_seg_3_4",
49                &format_args!("{}", self.hist_seg_3_4().bits()),
50            )
51            .field(
52                "hist_seg_2_3",
53                &format_args!("{}", self.hist_seg_2_3().bits()),
54            )
55            .field(
56                "hist_seg_1_2",
57                &format_args!("{}", self.hist_seg_1_2().bits()),
58            )
59            .field(
60                "hist_seg_0_1",
61                &format_args!("{}", self.hist_seg_0_1().bits()),
62            )
63            .finish()
64    }
65}
66#[cfg(feature = "impl-register-debug")]
67impl core::fmt::Debug for crate::generic::Reg<HIST_SEG0_SPEC> {
68    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
69        core::fmt::Debug::fmt(&self.read(), f)
70    }
71}
72impl W {
73    #[doc = "Bits 0:7 - this field configures threshold of histogram bin 3 and bin 4"]
74    #[inline(always)]
75    #[must_use]
76    pub fn hist_seg_3_4(&mut self) -> HIST_SEG_3_4_W<HIST_SEG0_SPEC> {
77        HIST_SEG_3_4_W::new(self, 0)
78    }
79    #[doc = "Bits 8:15 - this field configures threshold of histogram bin 2 and bin 3"]
80    #[inline(always)]
81    #[must_use]
82    pub fn hist_seg_2_3(&mut self) -> HIST_SEG_2_3_W<HIST_SEG0_SPEC> {
83        HIST_SEG_2_3_W::new(self, 8)
84    }
85    #[doc = "Bits 16:23 - this field configures threshold of histogram bin 1 and bin 2"]
86    #[inline(always)]
87    #[must_use]
88    pub fn hist_seg_1_2(&mut self) -> HIST_SEG_1_2_W<HIST_SEG0_SPEC> {
89        HIST_SEG_1_2_W::new(self, 16)
90    }
91    #[doc = "Bits 24:31 - this field configures threshold of histogram bin 0 and bin 1"]
92    #[inline(always)]
93    #[must_use]
94    pub fn hist_seg_0_1(&mut self) -> HIST_SEG_0_1_W<HIST_SEG0_SPEC> {
95        HIST_SEG_0_1_W::new(self, 24)
96    }
97}
98#[doc = "histogram bin control register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hist_seg0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hist_seg0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
99pub struct HIST_SEG0_SPEC;
100impl crate::RegisterSpec for HIST_SEG0_SPEC {
101    type Ux = u32;
102}
103#[doc = "`read()` method returns [`hist_seg0::R`](R) reader structure"]
104impl crate::Readable for HIST_SEG0_SPEC {}
105#[doc = "`write(|w| ..)` method takes [`hist_seg0::W`](W) writer structure"]
106impl crate::Writable for HIST_SEG0_SPEC {
107    type Safety = crate::Unsafe;
108    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
109    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
110}
111#[doc = "`reset()` method sets HIST_SEG0 to value 0x1020_3040"]
112impl crate::Resettable for HIST_SEG0_SPEC {
113    const RESET_VALUE: u32 = 0x1020_3040;
114}
esp32p4/isp/hist_seg0.rs

esp32p4/isp/
hist_seg0.rs
