rigless 0.3.0

// rigless svd from STM32H743.svd, sha256 28dd22d7923a16c1167bda9cfe6cb20cc9e98d44095dd930fd987029a839af58. Do not edit.
// Copyright (c) 2025 STMicroelectronics.
// SPDX-License-Identifier: Apache-2.0
//! Registers of `OTG1_HS_GLOBAL` and the instances derived from it.

use rigless::soc::{Access, FieldSpec, Layout, ReadAction, RegisterSpec, Width, WriteModify};

/// The registers by name, where a variant's index is its row in [`REGISTERS`].
#[derive(Debug, Clone, Copy, PartialEq, Eq)]
pub enum Register {
    /// `OTG_HS_GOTGCTL` at offset `0x0`, resets to `0x0000_0800`, read-write.
    OtgHsGotgctl = 0,
    /// `OTG_HS_GOTGINT` at offset `0x4`, resets to `0x0000_0000`, read-write.
    OtgHsGotgint = 1,
    /// `OTG_HS_GAHBCFG` at offset `0x8`, resets to `0x0000_0000`, read-write.
    OtgHsGahbcfg = 2,
    /// `OTG_HS_GUSBCFG` at offset `0xC`, resets to `0x0000_0A00`, read-write.
    OtgHsGusbcfg = 3,
    /// `OTG_HS_GRSTCTL` at offset `0x10`, resets to `0x2000_0000`, read-write.
    OtgHsGrstctl = 4,
    /// `OTG_HS_GINTSTS` at offset `0x14`, resets to `0x0400_0020`, read-write.
    OtgHsGintsts = 5,
    /// `OTG_HS_GINTMSK` at offset `0x18`, resets to `0x0000_0000`, read-write.
    OtgHsGintmsk = 6,
    /// `OTG_HS_GRXSTSR_Device` at offset `0x1C`, resets to `0x0000_0000`, read-only.
    OtgHsGrxstsrDevice = 7,
    /// `OTG_HS_GRXSTSR_Host` at offset `0x1C`, resets to `0x0000_0000`, read-only.
    OtgHsGrxstsrHost = 8,
    /// `OTG_HS_GRXSTSP_Device` at offset `0x20`, resets to `0x0000_0000`, read-only.
    OtgHsGrxstspDevice = 9,
    /// `OTG_HS_GRXSTSP_Host` at offset `0x20`, resets to `0x0000_0000`, read-only.
    OtgHsGrxstspHost = 10,
    /// `OTG_HS_GRXFSIZ` at offset `0x24`, resets to `0x0000_0200`, read-write.
    OtgHsGrxfsiz = 11,
    /// `OTG_HS_DIEPTXF0_Device` at offset `0x28`, resets to `0x0000_0200`, read-write.
    OtgHsDieptxf0Device = 12,
    /// `OTG_HS_HNPTXFSIZ_Host` at offset `0x28`, resets to `0x0000_0200`, read-write.
    OtgHsHnptxfsizHost = 13,
    /// `OTG_HS_GNPTXSTS` at offset `0x2C`, resets to `0x0008_0200`, read-only.
    OtgHsGnptxsts = 14,
    /// `OTG_HS_GCCFG` at offset `0x38`, resets to `0x0000_0000`, read-write.
    OtgHsGccfg = 15,
    /// `OTG_HS_CID` at offset `0x3C`, resets to `0x0000_1200`, read-write.
    OtgHsCid = 16,
    /// `OTG_HS_GLPMCFG` at offset `0x54`, resets to `0x0000_0000`, read-write.
    OtgHsGlpmcfg = 17,
    /// `OTG_HS_HPTXFSIZ` at offset `0x100`, resets to `0x0200_0600`, read-write.
    OtgHsHptxfsiz = 18,
    /// `OTG_HS_DIEPTXF1` at offset `0x104`, resets to `0x0200_0400`, read-write.
    OtgHsDieptxf1 = 19,
    /// `OTG_HS_DIEPTXF2` at offset `0x108`, resets to `0x0200_0600`, read-write.
    OtgHsDieptxf2 = 20,
    /// `OTG_HS_DIEPTXF3` at offset `0x10C`, resets to `0x0200_0800`, read-write.
    OtgHsDieptxf3 = 21,
    /// `OTG_HS_DIEPTXF4` at offset `0x110`, resets to `0x0200_0A00`, read-write.
    OtgHsDieptxf4 = 22,
    /// `OTG_HS_DIEPTXF5` at offset `0x114`, resets to `0x0200_0C00`, read-write.
    OtgHsDieptxf5 = 23,
    /// `OTG_HS_DIEPTXF6` at offset `0x118`, resets to `0x0200_0E00`, read-write.
    OtgHsDieptxf6 = 24,
    /// `OTG_HS_DIEPTXF7` at offset `0x11C`, resets to `0x0200_1000`, read-write.
    OtgHsDieptxf7 = 25,
    /// `OTG_DIEPTXF8` at offset `0x120`, resets to `0x0200_1200`, read-write.
    OtgDieptxf8 = 26,
}

impl Register {
    /// Every register, in table order.
    pub const ALL: [Self; 27] = [Self::OtgHsGotgctl, Self::OtgHsGotgint, Self::OtgHsGahbcfg, Self::OtgHsGusbcfg, Self::OtgHsGrstctl, Self::OtgHsGintsts, Self::OtgHsGintmsk, Self::OtgHsGrxstsrDevice, Self::OtgHsGrxstsrHost, Self::OtgHsGrxstspDevice, Self::OtgHsGrxstspHost, Self::OtgHsGrxfsiz, Self::OtgHsDieptxf0Device, Self::OtgHsHnptxfsizHost, Self::OtgHsGnptxsts, Self::OtgHsGccfg, Self::OtgHsCid, Self::OtgHsGlpmcfg, Self::OtgHsHptxfsiz, Self::OtgHsDieptxf1, Self::OtgHsDieptxf2, Self::OtgHsDieptxf3, Self::OtgHsDieptxf4, Self::OtgHsDieptxf5, Self::OtgHsDieptxf6, Self::OtgHsDieptxf7, Self::OtgDieptxf8];
}

impl Layout for Register {
    const REGISTERS: &'static [RegisterSpec] = &REGISTERS;
    fn from_index(index: usize) -> Option<Self> {
        Self::ALL.get(index).copied()
    }
    fn index(self) -> usize {
        self as usize
    }
}

/// The fields of `OTG_HS_GOTGCTL`.
pub mod otg_hs_gotgctl {
    use super::FieldSpec;
    /// `SRQSCS`, bit 0, read-only.
    pub const SRQSCS: &FieldSpec = &super::REGISTERS[0].fields[0];
    /// `SRQ`, bit 1.
    pub const SRQ: &FieldSpec = &super::REGISTERS[0].fields[1];
    /// `VBVALOEN`, bit 2.
    pub const VBVALOEN: &FieldSpec = &super::REGISTERS[0].fields[2];
    /// `VBVALOVAL`, bit 3.
    pub const VBVALOVAL: &FieldSpec = &super::REGISTERS[0].fields[3];
    /// `AVALOEN`, bit 4.
    pub const AVALOEN: &FieldSpec = &super::REGISTERS[0].fields[4];
    /// `AVALOVAL`, bit 5.
    pub const AVALOVAL: &FieldSpec = &super::REGISTERS[0].fields[5];
    /// `BVALOEN`, bit 6.
    pub const BVALOEN: &FieldSpec = &super::REGISTERS[0].fields[6];
    /// `BVALOVAL`, bit 7.
    pub const BVALOVAL: &FieldSpec = &super::REGISTERS[0].fields[7];
    /// `HNGSCS`, bit 8, read-only.
    pub const HNGSCS: &FieldSpec = &super::REGISTERS[0].fields[8];
    /// `HNPRQ`, bit 9.
    pub const HNPRQ: &FieldSpec = &super::REGISTERS[0].fields[9];
    /// `HSHNPEN`, bit 10.
    pub const HSHNPEN: &FieldSpec = &super::REGISTERS[0].fields[10];
    /// `DHNPEN`, bit 11.
    pub const DHNPEN: &FieldSpec = &super::REGISTERS[0].fields[11];
    /// `EHEN`, bit 12.
    pub const EHEN: &FieldSpec = &super::REGISTERS[0].fields[12];
    /// `CIDSTS`, bit 16, read-only.
    pub const CIDSTS: &FieldSpec = &super::REGISTERS[0].fields[13];
    /// `DBCT`, bit 17, read-only.
    pub const DBCT: &FieldSpec = &super::REGISTERS[0].fields[14];
    /// `ASVLD`, bit 18, read-only.
    pub const ASVLD: &FieldSpec = &super::REGISTERS[0].fields[15];
    /// `BSVLD`, bit 19, read-only.
    pub const BSVLD: &FieldSpec = &super::REGISTERS[0].fields[16];
    /// `OTGVER`, bit 20.
    pub const OTGVER: &FieldSpec = &super::REGISTERS[0].fields[17];
    /// `CURMOD`, bit 21, read-only.
    pub const CURMOD: &FieldSpec = &super::REGISTERS[0].fields[18];
}

/// The fields of `OTG_HS_GOTGINT`.
pub mod otg_hs_gotgint {
    use super::FieldSpec;
    /// `SEDET`, bit 2.
    pub const SEDET: &FieldSpec = &super::REGISTERS[1].fields[0];
    /// `SRSSCHG`, bit 8.
    pub const SRSSCHG: &FieldSpec = &super::REGISTERS[1].fields[1];
    /// `HNSSCHG`, bit 9.
    pub const HNSSCHG: &FieldSpec = &super::REGISTERS[1].fields[2];
    /// `HNGDET`, bit 17.
    pub const HNGDET: &FieldSpec = &super::REGISTERS[1].fields[3];
    /// `ADTOCHG`, bit 18.
    pub const ADTOCHG: &FieldSpec = &super::REGISTERS[1].fields[4];
    /// `DBCDNE`, bit 19.
    pub const DBCDNE: &FieldSpec = &super::REGISTERS[1].fields[5];
    /// `IDCHNG`, bit 20.
    pub const IDCHNG: &FieldSpec = &super::REGISTERS[1].fields[6];
}

/// The fields of `OTG_HS_GAHBCFG`.
pub mod otg_hs_gahbcfg {
    use super::FieldSpec;
    /// `GINT`, bit 0.
    pub const GINT: &FieldSpec = &super::REGISTERS[2].fields[0];
    /// `HBSTLEN`, bits 1..=4.
    pub const HBSTLEN: &FieldSpec = &super::REGISTERS[2].fields[1];
    /// `DMAEN`, bit 5.
    pub const DMAEN: &FieldSpec = &super::REGISTERS[2].fields[2];
    /// `TXFELVL`, bit 7.
    pub const TXFELVL: &FieldSpec = &super::REGISTERS[2].fields[3];
    /// `PTXFELVL`, bit 8.
    pub const PTXFELVL: &FieldSpec = &super::REGISTERS[2].fields[4];
}

/// The fields of `OTG_HS_GUSBCFG`.
pub mod otg_hs_gusbcfg {
    use super::FieldSpec;
    /// `TOCAL`, bits 0..=2.
    pub const TOCAL: &FieldSpec = &super::REGISTERS[3].fields[0];
    /// `PHYSEL`, bit 6, write-only.
    pub const PHYSEL: &FieldSpec = &super::REGISTERS[3].fields[1];
    /// `SRPCAP`, bit 8.
    pub const SRPCAP: &FieldSpec = &super::REGISTERS[3].fields[2];
    /// `HNPCAP`, bit 9.
    pub const HNPCAP: &FieldSpec = &super::REGISTERS[3].fields[3];
    /// `TRDT`, bits 10..=13.
    pub const TRDT: &FieldSpec = &super::REGISTERS[3].fields[4];
    /// `PHYLPCS`, bit 15.
    pub const PHYLPCS: &FieldSpec = &super::REGISTERS[3].fields[5];
    /// `ULPIFSLS`, bit 17.
    pub const ULPIFSLS: &FieldSpec = &super::REGISTERS[3].fields[6];
    /// `ULPIAR`, bit 18.
    pub const ULPIAR: &FieldSpec = &super::REGISTERS[3].fields[7];
    /// `ULPICSM`, bit 19.
    pub const ULPICSM: &FieldSpec = &super::REGISTERS[3].fields[8];
    /// `ULPIEVBUSD`, bit 20.
    pub const ULPIEVBUSD: &FieldSpec = &super::REGISTERS[3].fields[9];
    /// `ULPIEVBUSI`, bit 21.
    pub const ULPIEVBUSI: &FieldSpec = &super::REGISTERS[3].fields[10];
    /// `TSDPS`, bit 22.
    pub const TSDPS: &FieldSpec = &super::REGISTERS[3].fields[11];
    /// `PCCI`, bit 23.
    pub const PCCI: &FieldSpec = &super::REGISTERS[3].fields[12];
    /// `PTCI`, bit 24.
    pub const PTCI: &FieldSpec = &super::REGISTERS[3].fields[13];
    /// `ULPIIPD`, bit 25.
    pub const ULPIIPD: &FieldSpec = &super::REGISTERS[3].fields[14];
    /// `FHMOD`, bit 29.
    pub const FHMOD: &FieldSpec = &super::REGISTERS[3].fields[15];
    /// `FDMOD`, bit 30.
    pub const FDMOD: &FieldSpec = &super::REGISTERS[3].fields[16];
}

/// The fields of `OTG_HS_GRSTCTL`.
pub mod otg_hs_grstctl {
    use super::FieldSpec;
    /// `CSRST`, bit 0.
    pub const CSRST: &FieldSpec = &super::REGISTERS[4].fields[0];
    /// `HSRST`, bit 1.
    pub const HSRST: &FieldSpec = &super::REGISTERS[4].fields[1];
    /// `FCRST`, bit 2.
    pub const FCRST: &FieldSpec = &super::REGISTERS[4].fields[2];
    /// `RXFFLSH`, bit 4.
    pub const RXFFLSH: &FieldSpec = &super::REGISTERS[4].fields[3];
    /// `TXFFLSH`, bit 5.
    pub const TXFFLSH: &FieldSpec = &super::REGISTERS[4].fields[4];
    /// `TXFNUM`, bits 6..=10.
    pub const TXFNUM: &FieldSpec = &super::REGISTERS[4].fields[5];
    /// `DMAREQ`, bit 30, read-only.
    pub const DMAREQ: &FieldSpec = &super::REGISTERS[4].fields[6];
    /// `AHBIDL`, bit 31, read-only.
    pub const AHBIDL: &FieldSpec = &super::REGISTERS[4].fields[7];
}

/// The fields of `OTG_HS_GINTSTS`.
pub mod otg_hs_gintsts {
    use super::FieldSpec;
    /// `CMOD`, bit 0, read-only.
    pub const CMOD: &FieldSpec = &super::REGISTERS[5].fields[0];
    /// `MMIS`, bit 1.
    pub const MMIS: &FieldSpec = &super::REGISTERS[5].fields[1];
    /// `OTGINT`, bit 2, read-only.
    pub const OTGINT: &FieldSpec = &super::REGISTERS[5].fields[2];
    /// `SOF`, bit 3.
    pub const SOF: &FieldSpec = &super::REGISTERS[5].fields[3];
    /// `RXFLVL`, bit 4, read-only.
    pub const RXFLVL: &FieldSpec = &super::REGISTERS[5].fields[4];
    /// `NPTXFE`, bit 5, read-only.
    pub const NPTXFE: &FieldSpec = &super::REGISTERS[5].fields[5];
    /// `GINAKEFF`, bit 6, read-only.
    pub const GINAKEFF: &FieldSpec = &super::REGISTERS[5].fields[6];
    /// `BOUTNAKEFF`, bit 7, read-only.
    pub const BOUTNAKEFF: &FieldSpec = &super::REGISTERS[5].fields[7];
    /// `ESUSP`, bit 10.
    pub const ESUSP: &FieldSpec = &super::REGISTERS[5].fields[8];
    /// `USBSUSP`, bit 11.
    pub const USBSUSP: &FieldSpec = &super::REGISTERS[5].fields[9];
    /// `USBRST`, bit 12.
    pub const USBRST: &FieldSpec = &super::REGISTERS[5].fields[10];
    /// `ENUMDNE`, bit 13.
    pub const ENUMDNE: &FieldSpec = &super::REGISTERS[5].fields[11];
    /// `ISOODRP`, bit 14.
    pub const ISOODRP: &FieldSpec = &super::REGISTERS[5].fields[12];
    /// `EOPF`, bit 15.
    pub const EOPF: &FieldSpec = &super::REGISTERS[5].fields[13];
    /// `IEPINT`, bit 18, read-only.
    pub const IEPINT: &FieldSpec = &super::REGISTERS[5].fields[14];
    /// `OEPINT`, bit 19, read-only.
    pub const OEPINT: &FieldSpec = &super::REGISTERS[5].fields[15];
    /// `IISOIXFR`, bit 20.
    pub const IISOIXFR: &FieldSpec = &super::REGISTERS[5].fields[16];
    /// `PXFR_INCOMPISOOUT`, bit 21.
    pub const PXFR_INCOMPISOOUT: &FieldSpec = &super::REGISTERS[5].fields[17];
    /// `DATAFSUSP`, bit 22.
    pub const DATAFSUSP: &FieldSpec = &super::REGISTERS[5].fields[18];
    /// `HPRTINT`, bit 24, read-only.
    pub const HPRTINT: &FieldSpec = &super::REGISTERS[5].fields[19];
    /// `HCINT`, bit 25, read-only.
    pub const HCINT: &FieldSpec = &super::REGISTERS[5].fields[20];
    /// `PTXFE`, bit 26, read-only.
    pub const PTXFE: &FieldSpec = &super::REGISTERS[5].fields[21];
    /// `CIDSCHG`, bit 28.
    pub const CIDSCHG: &FieldSpec = &super::REGISTERS[5].fields[22];
    /// `DISCINT`, bit 29.
    pub const DISCINT: &FieldSpec = &super::REGISTERS[5].fields[23];
    /// `SRQINT`, bit 30.
    pub const SRQINT: &FieldSpec = &super::REGISTERS[5].fields[24];
    /// `WKUINT`, bit 31.
    pub const WKUINT: &FieldSpec = &super::REGISTERS[5].fields[25];
}

/// The fields of `OTG_HS_GINTMSK`.
pub mod otg_hs_gintmsk {
    use super::FieldSpec;
    /// `MMISM`, bit 1.
    pub const MMISM: &FieldSpec = &super::REGISTERS[6].fields[0];
    /// `OTGINT`, bit 2.
    pub const OTGINT: &FieldSpec = &super::REGISTERS[6].fields[1];
    /// `SOFM`, bit 3.
    pub const SOFM: &FieldSpec = &super::REGISTERS[6].fields[2];
    /// `RXFLVLM`, bit 4.
    pub const RXFLVLM: &FieldSpec = &super::REGISTERS[6].fields[3];
    /// `NPTXFEM`, bit 5.
    pub const NPTXFEM: &FieldSpec = &super::REGISTERS[6].fields[4];
    /// `GINAKEFFM`, bit 6.
    pub const GINAKEFFM: &FieldSpec = &super::REGISTERS[6].fields[5];
    /// `GONAKEFFM`, bit 7.
    pub const GONAKEFFM: &FieldSpec = &super::REGISTERS[6].fields[6];
    /// `ESUSPM`, bit 10.
    pub const ESUSPM: &FieldSpec = &super::REGISTERS[6].fields[7];
    /// `USBSUSPM`, bit 11.
    pub const USBSUSPM: &FieldSpec = &super::REGISTERS[6].fields[8];
    /// `USBRST`, bit 12.
    pub const USBRST: &FieldSpec = &super::REGISTERS[6].fields[9];
    /// `ENUMDNEM`, bit 13.
    pub const ENUMDNEM: &FieldSpec = &super::REGISTERS[6].fields[10];
    /// `ISOODRPM`, bit 14.
    pub const ISOODRPM: &FieldSpec = &super::REGISTERS[6].fields[11];
    /// `EOPFM`, bit 15.
    pub const EOPFM: &FieldSpec = &super::REGISTERS[6].fields[12];
    /// `IEPINT`, bit 18.
    pub const IEPINT: &FieldSpec = &super::REGISTERS[6].fields[13];
    /// `OEPINT`, bit 19.
    pub const OEPINT: &FieldSpec = &super::REGISTERS[6].fields[14];
    /// `IISOIXFRM`, bit 20.
    pub const IISOIXFRM: &FieldSpec = &super::REGISTERS[6].fields[15];
    /// `PXFRM_IISOOXFRM`, bit 21.
    pub const PXFRM_IISOOXFRM: &FieldSpec = &super::REGISTERS[6].fields[16];
    /// `FSUSPM`, bit 22.
    pub const FSUSPM: &FieldSpec = &super::REGISTERS[6].fields[17];
    /// `RSTDE`, bit 23.
    pub const RSTDE: &FieldSpec = &super::REGISTERS[6].fields[18];
    /// `PRTIM`, bit 24, read-only.
    pub const PRTIM: &FieldSpec = &super::REGISTERS[6].fields[19];
    /// `HCIM`, bit 25.
    pub const HCIM: &FieldSpec = &super::REGISTERS[6].fields[20];
    /// `PTXFEM`, bit 26.
    pub const PTXFEM: &FieldSpec = &super::REGISTERS[6].fields[21];
    /// `LPMINTM`, bit 27.
    pub const LPMINTM: &FieldSpec = &super::REGISTERS[6].fields[22];
    /// `CIDSCHGM`, bit 28.
    pub const CIDSCHGM: &FieldSpec = &super::REGISTERS[6].fields[23];
    /// `DISCINT`, bit 29.
    pub const DISCINT: &FieldSpec = &super::REGISTERS[6].fields[24];
    /// `SRQIM`, bit 30.
    pub const SRQIM: &FieldSpec = &super::REGISTERS[6].fields[25];
    /// `WUIM`, bit 31.
    pub const WUIM: &FieldSpec = &super::REGISTERS[6].fields[26];
}

/// The fields of `OTG_HS_GRXSTSR_Device`.
pub mod otg_hs_grxstsr_device {
    use super::FieldSpec;
    /// `EPNUM`, bits 0..=3.
    pub const EPNUM: &FieldSpec = &super::REGISTERS[7].fields[0];
    /// `BCNT`, bits 4..=14.
    pub const BCNT: &FieldSpec = &super::REGISTERS[7].fields[1];
    /// `DPID`, bits 15..=16.
    pub const DPID: &FieldSpec = &super::REGISTERS[7].fields[2];
    /// `PKTSTS`, bits 17..=20.
    pub const PKTSTS: &FieldSpec = &super::REGISTERS[7].fields[3];
    /// `FRMNUM`, bits 21..=24.
    pub const FRMNUM: &FieldSpec = &super::REGISTERS[7].fields[4];
}

/// The fields of `OTG_HS_GRXSTSR_Host`.
pub mod otg_hs_grxstsr_host {
    use super::FieldSpec;
    /// `CHNUM`, bits 0..=3.
    pub const CHNUM: &FieldSpec = &super::REGISTERS[8].fields[0];
    /// `BCNT`, bits 4..=14.
    pub const BCNT: &FieldSpec = &super::REGISTERS[8].fields[1];
    /// `DPID`, bits 15..=16.
    pub const DPID: &FieldSpec = &super::REGISTERS[8].fields[2];
    /// `PKTSTS`, bits 17..=20.
    pub const PKTSTS: &FieldSpec = &super::REGISTERS[8].fields[3];
}

/// The fields of `OTG_HS_GRXSTSP_Device`.
pub mod otg_hs_grxstsp_device {
    use super::FieldSpec;
    /// `EPNUM`, bits 0..=3.
    pub const EPNUM: &FieldSpec = &super::REGISTERS[9].fields[0];
    /// `BCNT`, bits 4..=14.
    pub const BCNT: &FieldSpec = &super::REGISTERS[9].fields[1];
    /// `DPID`, bits 15..=16.
    pub const DPID: &FieldSpec = &super::REGISTERS[9].fields[2];
    /// `PKTSTS`, bits 17..=20.
    pub const PKTSTS: &FieldSpec = &super::REGISTERS[9].fields[3];
    /// `FRMNUM`, bits 21..=24.
    pub const FRMNUM: &FieldSpec = &super::REGISTERS[9].fields[4];
}

/// The fields of `OTG_HS_GRXSTSP_Host`.
pub mod otg_hs_grxstsp_host {
    use super::FieldSpec;
    /// `CHNUM`, bits 0..=3.
    pub const CHNUM: &FieldSpec = &super::REGISTERS[10].fields[0];
    /// `BCNT`, bits 4..=14.
    pub const BCNT: &FieldSpec = &super::REGISTERS[10].fields[1];
    /// `DPID`, bits 15..=16.
    pub const DPID: &FieldSpec = &super::REGISTERS[10].fields[2];
    /// `PKTSTS`, bits 17..=20.
    pub const PKTSTS: &FieldSpec = &super::REGISTERS[10].fields[3];
}

/// The fields of `OTG_HS_GRXFSIZ`.
pub mod otg_hs_grxfsiz {
    use super::FieldSpec;
    /// `RXFD`, bits 0..=15.
    pub const RXFD: &FieldSpec = &super::REGISTERS[11].fields[0];
}

/// The fields of `OTG_HS_DIEPTXF0_Device`.
pub mod otg_hs_dieptxf0_device {
    use super::FieldSpec;
    /// `TX0FSA`, bits 0..=15.
    pub const TX0FSA: &FieldSpec = &super::REGISTERS[12].fields[0];
    /// `TX0FD`, bits 16..=31.
    pub const TX0FD: &FieldSpec = &super::REGISTERS[12].fields[1];
}

/// The fields of `OTG_HS_HNPTXFSIZ_Host`.
pub mod otg_hs_hnptxfsiz_host {
    use super::FieldSpec;
    /// `NPTXFSA`, bits 0..=15.
    pub const NPTXFSA: &FieldSpec = &super::REGISTERS[13].fields[0];
    /// `NPTXFD`, bits 16..=31.
    pub const NPTXFD: &FieldSpec = &super::REGISTERS[13].fields[1];
}

/// The fields of `OTG_HS_GNPTXSTS`.
pub mod otg_hs_gnptxsts {
    use super::FieldSpec;
    /// `NPTXFSAV`, bits 0..=15.
    pub const NPTXFSAV: &FieldSpec = &super::REGISTERS[14].fields[0];
    /// `NPTQXSAV`, bits 16..=23.
    pub const NPTQXSAV: &FieldSpec = &super::REGISTERS[14].fields[1];
    /// `NPTXQTOP`, bits 24..=30.
    pub const NPTXQTOP: &FieldSpec = &super::REGISTERS[14].fields[2];
}

/// The fields of `OTG_HS_GCCFG`.
pub mod otg_hs_gccfg {
    use super::FieldSpec;
    /// `DCDET`, bit 0.
    pub const DCDET: &FieldSpec = &super::REGISTERS[15].fields[0];
    /// `PDET`, bit 1.
    pub const PDET: &FieldSpec = &super::REGISTERS[15].fields[1];
    /// `SDET`, bit 2.
    pub const SDET: &FieldSpec = &super::REGISTERS[15].fields[2];
    /// `PS2DET`, bit 3.
    pub const PS2DET: &FieldSpec = &super::REGISTERS[15].fields[3];
    /// `PWRDWN`, bit 16.
    pub const PWRDWN: &FieldSpec = &super::REGISTERS[15].fields[4];
    /// `BCDEN`, bit 17.
    pub const BCDEN: &FieldSpec = &super::REGISTERS[15].fields[5];
    /// `DCDEN`, bit 18.
    pub const DCDEN: &FieldSpec = &super::REGISTERS[15].fields[6];
    /// `PDEN`, bit 19.
    pub const PDEN: &FieldSpec = &super::REGISTERS[15].fields[7];
    /// `SDEN`, bit 20.
    pub const SDEN: &FieldSpec = &super::REGISTERS[15].fields[8];
    /// `VBDEN`, bit 21.
    pub const VBDEN: &FieldSpec = &super::REGISTERS[15].fields[9];
}

/// The fields of `OTG_HS_CID`.
pub mod otg_hs_cid {
    use super::FieldSpec;
    /// `PRODUCT_ID`, bits 0..=31.
    pub const PRODUCT_ID: &FieldSpec = &super::REGISTERS[16].fields[0];
}

/// The fields of `OTG_HS_GLPMCFG`.
pub mod otg_hs_glpmcfg {
    use super::FieldSpec;
    /// `LPMEN`, bit 0.
    pub const LPMEN: &FieldSpec = &super::REGISTERS[17].fields[0];
    /// `LPMACK`, bit 1.
    pub const LPMACK: &FieldSpec = &super::REGISTERS[17].fields[1];
    /// `BESL`, bits 2..=5, read-only.
    pub const BESL: &FieldSpec = &super::REGISTERS[17].fields[2];
    /// `REMWAKE`, bit 6, read-only.
    pub const REMWAKE: &FieldSpec = &super::REGISTERS[17].fields[3];
    /// `L1SSEN`, bit 7.
    pub const L1SSEN: &FieldSpec = &super::REGISTERS[17].fields[4];
    /// `BESLTHRS`, bits 8..=11.
    pub const BESLTHRS: &FieldSpec = &super::REGISTERS[17].fields[5];
    /// `L1DSEN`, bit 12.
    pub const L1DSEN: &FieldSpec = &super::REGISTERS[17].fields[6];
    /// `LPMRST`, bits 13..=14, read-only.
    pub const LPMRST: &FieldSpec = &super::REGISTERS[17].fields[7];
    /// `SLPSTS`, bit 15, read-only.
    pub const SLPSTS: &FieldSpec = &super::REGISTERS[17].fields[8];
    /// `L1RSMOK`, bit 16, read-only.
    pub const L1RSMOK: &FieldSpec = &super::REGISTERS[17].fields[9];
    /// `LPMCHIDX`, bits 17..=20.
    pub const LPMCHIDX: &FieldSpec = &super::REGISTERS[17].fields[10];
    /// `LPMRCNT`, bits 21..=23.
    pub const LPMRCNT: &FieldSpec = &super::REGISTERS[17].fields[11];
    /// `SNDLPM`, bit 24.
    pub const SNDLPM: &FieldSpec = &super::REGISTERS[17].fields[12];
    /// `LPMRCNTSTS`, bits 25..=27, read-only.
    pub const LPMRCNTSTS: &FieldSpec = &super::REGISTERS[17].fields[13];
    /// `ENBESL`, bit 28.
    pub const ENBESL: &FieldSpec = &super::REGISTERS[17].fields[14];
}

/// The fields of `OTG_HS_HPTXFSIZ`.
pub mod otg_hs_hptxfsiz {
    use super::FieldSpec;
    /// `PTXSA`, bits 0..=15.
    pub const PTXSA: &FieldSpec = &super::REGISTERS[18].fields[0];
    /// `PTXFD`, bits 16..=31.
    pub const PTXFD: &FieldSpec = &super::REGISTERS[18].fields[1];
}

/// The fields of `OTG_HS_DIEPTXF1`.
pub mod otg_hs_dieptxf1 {
    use super::FieldSpec;
    /// `INEPTXSA`, bits 0..=15.
    pub const INEPTXSA: &FieldSpec = &super::REGISTERS[19].fields[0];
    /// `INEPTXFD`, bits 16..=31.
    pub const INEPTXFD: &FieldSpec = &super::REGISTERS[19].fields[1];
}

/// The fields of `OTG_HS_DIEPTXF2`.
pub mod otg_hs_dieptxf2 {
    use super::FieldSpec;
    /// `INEPTXSA`, bits 0..=15.
    pub const INEPTXSA: &FieldSpec = &super::REGISTERS[20].fields[0];
    /// `INEPTXFD`, bits 16..=31.
    pub const INEPTXFD: &FieldSpec = &super::REGISTERS[20].fields[1];
}

/// The fields of `OTG_HS_DIEPTXF3`.
pub mod otg_hs_dieptxf3 {
    use super::FieldSpec;
    /// `INEPTXSA`, bits 0..=15.
    pub const INEPTXSA: &FieldSpec = &super::REGISTERS[21].fields[0];
    /// `INEPTXFD`, bits 16..=31.
    pub const INEPTXFD: &FieldSpec = &super::REGISTERS[21].fields[1];
}

/// The fields of `OTG_HS_DIEPTXF4`.
pub mod otg_hs_dieptxf4 {
    use super::FieldSpec;
    /// `INEPTXSA`, bits 0..=15.
    pub const INEPTXSA: &FieldSpec = &super::REGISTERS[22].fields[0];
    /// `INEPTXFD`, bits 16..=31.
    pub const INEPTXFD: &FieldSpec = &super::REGISTERS[22].fields[1];
}

/// The fields of `OTG_HS_DIEPTXF5`.
pub mod otg_hs_dieptxf5 {
    use super::FieldSpec;
    /// `INEPTXSA`, bits 0..=15.
    pub const INEPTXSA: &FieldSpec = &super::REGISTERS[23].fields[0];
    /// `INEPTXFD`, bits 16..=31.
    pub const INEPTXFD: &FieldSpec = &super::REGISTERS[23].fields[1];
}

/// The fields of `OTG_HS_DIEPTXF6`.
pub mod otg_hs_dieptxf6 {
    use super::FieldSpec;
    /// `INEPTXSA`, bits 0..=15.
    pub const INEPTXSA: &FieldSpec = &super::REGISTERS[24].fields[0];
    /// `INEPTXFD`, bits 16..=31.
    pub const INEPTXFD: &FieldSpec = &super::REGISTERS[24].fields[1];
}

/// The fields of `OTG_HS_DIEPTXF7`.
pub mod otg_hs_dieptxf7 {
    use super::FieldSpec;
    /// `INEPTXSA`, bits 0..=15.
    pub const INEPTXSA: &FieldSpec = &super::REGISTERS[25].fields[0];
    /// `INEPTXFD`, bits 16..=31.
    pub const INEPTXFD: &FieldSpec = &super::REGISTERS[25].fields[1];
}

/// The fields of `OTG_DIEPTXF8`.
pub mod otg_dieptxf8 {
    use super::FieldSpec;
    /// `INEPTXSA`, bits 0..=15.
    pub const INEPTXSA: &FieldSpec = &super::REGISTERS[26].fields[0];
    /// `INEPTXFD`, bits 16..=31.
    pub const INEPTXFD: &FieldSpec = &super::REGISTERS[26].fields[1];
}

/// The register table.
pub static REGISTERS: [RegisterSpec; 27] = [
    RegisterSpec { name: "OTG_HS_GOTGCTL", offset: 0x0, width: Width::W32, reset: 0x0000_0800, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "SRQSCS", bit: 0, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SRQ", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "VBVALOEN", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "VBVALOVAL", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AVALOEN", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AVALOVAL", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BVALOEN", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BVALOVAL", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HNGSCS", bit: 8, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HNPRQ", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HSHNPEN", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DHNPEN", bit: 11, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EHEN", bit: 12, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CIDSTS", bit: 16, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DBCT", bit: 17, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ASVLD", bit: 18, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BSVLD", bit: 19, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "OTGVER", bit: 20, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CURMOD", bit: 21, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_GOTGINT", offset: 0x4, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "SEDET", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SRSSCHG", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HNSSCHG", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HNGDET", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ADTOCHG", bit: 18, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DBCDNE", bit: 19, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "IDCHNG", bit: 20, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_GAHBCFG", offset: 0x8, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "GINT", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HBSTLEN", bit: 1, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DMAEN", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXFELVL", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PTXFELVL", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_GUSBCFG", offset: 0xC, width: Width::W32, reset: 0x0000_0A00, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "TOCAL", bit: 0, width: 3, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PHYSEL", bit: 6, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SRPCAP", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HNPCAP", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TRDT", bit: 10, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PHYLPCS", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ULPIFSLS", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ULPIAR", bit: 18, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ULPICSM", bit: 19, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ULPIEVBUSD", bit: 20, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ULPIEVBUSI", bit: 21, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TSDPS", bit: 22, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PCCI", bit: 23, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PTCI", bit: 24, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ULPIIPD", bit: 25, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FHMOD", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FDMOD", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_GRSTCTL", offset: 0x10, width: Width::W32, reset: 0x2000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "CSRST", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HSRST", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FCRST", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "RXFFLSH", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXFFLSH", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TXFNUM", bit: 6, width: 5, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DMAREQ", bit: 30, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "AHBIDL", bit: 31, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_GINTSTS", offset: 0x14, width: Width::W32, reset: 0x0400_0020, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "CMOD", bit: 0, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MMIS", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "OTGINT", bit: 2, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SOF", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "RXFLVL", bit: 4, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NPTXFE", bit: 5, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "GINAKEFF", bit: 6, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BOUTNAKEFF", bit: 7, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ESUSP", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "USBSUSP", bit: 11, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "USBRST", bit: 12, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ENUMDNE", bit: 13, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ISOODRP", bit: 14, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EOPF", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "IEPINT", bit: 18, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "OEPINT", bit: 19, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "IISOIXFR", bit: 20, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PXFR_INCOMPISOOUT", bit: 21, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DATAFSUSP", bit: 22, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HPRTINT", bit: 24, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HCINT", bit: 25, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PTXFE", bit: 26, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CIDSCHG", bit: 28, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DISCINT", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SRQINT", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "WKUINT", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_GINTMSK", offset: 0x18, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "MMISM", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "OTGINT", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SOFM", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "RXFLVLM", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NPTXFEM", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "GINAKEFFM", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "GONAKEFFM", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ESUSPM", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "USBSUSPM", bit: 11, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "USBRST", bit: 12, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ENUMDNEM", bit: 13, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ISOODRPM", bit: 14, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EOPFM", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "IEPINT", bit: 18, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "OEPINT", bit: 19, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "IISOIXFRM", bit: 20, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PXFRM_IISOOXFRM", bit: 21, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FSUSPM", bit: 22, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "RSTDE", bit: 23, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PRTIM", bit: 24, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HCIM", bit: 25, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PTXFEM", bit: 26, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "LPMINTM", bit: 27, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CIDSCHGM", bit: 28, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DISCINT", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SRQIM", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "WUIM", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_GRXSTSR_Device", offset: 0x1C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "EPNUM", bit: 0, width: 4, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BCNT", bit: 4, width: 11, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DPID", bit: 15, width: 2, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTSTS", bit: 17, width: 4, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMNUM", bit: 21, width: 4, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_GRXSTSR_Host", offset: 0x1C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "CHNUM", bit: 0, width: 4, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BCNT", bit: 4, width: 11, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DPID", bit: 15, width: 2, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTSTS", bit: 17, width: 4, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_GRXSTSP_Device", offset: 0x20, width: Width::W32, reset: 0x0000_0000, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "EPNUM", bit: 0, width: 4, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BCNT", bit: 4, width: 11, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DPID", bit: 15, width: 2, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTSTS", bit: 17, width: 4, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FRMNUM", bit: 21, width: 4, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_GRXSTSP_Host", offset: 0x20, width: Width::W32, reset: 0x0000_0000, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "CHNUM", bit: 0, width: 4, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BCNT", bit: 4, width: 11, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DPID", bit: 15, width: 2, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PKTSTS", bit: 17, width: 4, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_GRXFSIZ", offset: 0x24, width: Width::W32, reset: 0x0000_0200, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "RXFD", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_DIEPTXF0_Device", offset: 0x28, width: Width::W32, reset: 0x0000_0200, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "TX0FSA", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TX0FD", bit: 16, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HNPTXFSIZ_Host", offset: 0x28, width: Width::W32, reset: 0x0000_0200, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "NPTXFSA", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NPTXFD", bit: 16, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_GNPTXSTS", offset: 0x2C, width: Width::W32, reset: 0x0008_0200, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "NPTXFSAV", bit: 0, width: 16, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NPTQXSAV", bit: 16, width: 8, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "NPTXQTOP", bit: 24, width: 7, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_GCCFG", offset: 0x38, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "DCDET", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PDET", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SDET", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PS2DET", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PWRDWN", bit: 16, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BCDEN", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DCDEN", bit: 18, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PDEN", bit: 19, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SDEN", bit: 20, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "VBDEN", bit: 21, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_CID", offset: 0x3C, width: Width::W32, reset: 0x0000_1200, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "PRODUCT_ID", bit: 0, width: 32, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_GLPMCFG", offset: 0x54, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "LPMEN", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "LPMACK", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BESL", bit: 2, width: 4, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "REMWAKE", bit: 6, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "L1SSEN", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "BESLTHRS", bit: 8, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "L1DSEN", bit: 12, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "LPMRST", bit: 13, width: 2, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SLPSTS", bit: 15, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "L1RSMOK", bit: 16, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "LPMCHIDX", bit: 17, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "LPMRCNT", bit: 21, width: 3, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SNDLPM", bit: 24, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "LPMRCNTSTS", bit: 25, width: 3, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "ENBESL", bit: 28, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_HPTXFSIZ", offset: 0x100, width: Width::W32, reset: 0x0200_0600, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "PTXSA", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PTXFD", bit: 16, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_DIEPTXF1", offset: 0x104, width: Width::W32, reset: 0x0200_0400, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "INEPTXSA", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "INEPTXFD", bit: 16, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_DIEPTXF2", offset: 0x108, width: Width::W32, reset: 0x0200_0600, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "INEPTXSA", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "INEPTXFD", bit: 16, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_DIEPTXF3", offset: 0x10C, width: Width::W32, reset: 0x0200_0800, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "INEPTXSA", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "INEPTXFD", bit: 16, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_DIEPTXF4", offset: 0x110, width: Width::W32, reset: 0x0200_0A00, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "INEPTXSA", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "INEPTXFD", bit: 16, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_DIEPTXF5", offset: 0x114, width: Width::W32, reset: 0x0200_0C00, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "INEPTXSA", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "INEPTXFD", bit: 16, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_DIEPTXF6", offset: 0x118, width: Width::W32, reset: 0x0200_0E00, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "INEPTXSA", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "INEPTXFD", bit: 16, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_HS_DIEPTXF7", offset: 0x11C, width: Width::W32, reset: 0x0200_1000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "INEPTXSA", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "INEPTXFD", bit: 16, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OTG_DIEPTXF8", offset: 0x120, width: Width::W32, reset: 0x0200_1200, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "INEPTXSA", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "INEPTXFD", bit: 16, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
];