rigless 0.3.0

// rigless svd from STM32H743.svd, sha256 28dd22d7923a16c1167bda9cfe6cb20cc9e98d44095dd930fd987029a839af58. Do not edit.
// Copyright (c) 2025 STMicroelectronics.
// SPDX-License-Identifier: Apache-2.0
//! Registers of `HRTIM_TIMA` and the instances derived from it.

use rigless::soc::{Access, FieldSpec, Layout, ReadAction, RegisterSpec, Width, WriteModify};

/// The registers by name, where a variant's index is its row in [`REGISTERS`].
#[derive(Debug, Clone, Copy, PartialEq, Eq)]
pub enum Register {
    /// `TIMACR` at offset `0x0`, resets to `0x0000_0000`, read-write.
    Timacr = 0,
    /// `TIMAISR` at offset `0x4`, resets to `0x0000_0000`, read-only.
    Timaisr = 1,
    /// `TIMAICR` at offset `0x8`, resets to `0x0000_0000`, write-only.
    Timaicr = 2,
    /// `TIMADIER5` at offset `0xC`, resets to `0x0000_0000`, read-write.
    Timadier5 = 3,
    /// `CNTAR` at offset `0x10`, resets to `0x0000_0000`, read-write.
    Cntar = 4,
    /// `PERAR` at offset `0x14`, resets to `0x0000_FFFF`, read-write.
    Perar = 5,
    /// `REPAR` at offset `0x18`, resets to `0x0000_0000`, read-write.
    Repar = 6,
    /// `CMP1AR` at offset `0x1C`, resets to `0x0000_0000`, read-write.
    Cmp1ar = 7,
    /// `CMP1CAR` at offset `0x20`, resets to `0x0000_0000`, read-write.
    Cmp1car = 8,
    /// `CMP2AR` at offset `0x24`, resets to `0x0000_0000`, read-write.
    Cmp2ar = 9,
    /// `CMP3AR` at offset `0x28`, resets to `0x0000_0000`, read-write.
    Cmp3ar = 10,
    /// `CMP4AR` at offset `0x2C`, resets to `0x0000_0000`, read-write.
    Cmp4ar = 11,
    /// `CPT1AR` at offset `0x30`, resets to `0x0000_0000`, read-only.
    Cpt1ar = 12,
    /// `CPT2AR` at offset `0x34`, resets to `0x0000_0000`, read-only.
    Cpt2ar = 13,
    /// `DTAR` at offset `0x38`, resets to `0x0000_0000`, read-write.
    Dtar = 14,
    /// `SETA1R` at offset `0x3C`, resets to `0x0000_0000`, read-write.
    Seta1r = 15,
    /// `RSTA1R` at offset `0x40`, resets to `0x0000_0000`, read-write.
    Rsta1r = 16,
    /// `SETA2R` at offset `0x44`, resets to `0x0000_0000`, read-write.
    Seta2r = 17,
    /// `RSTA2R` at offset `0x48`, resets to `0x0000_0000`, read-write.
    Rsta2r = 18,
    /// `EEFAR1` at offset `0x4C`, resets to `0x0000_0000`, read-write.
    Eefar1 = 19,
    /// `EEFAR2` at offset `0x50`, resets to `0x0000_0000`, read-write.
    Eefar2 = 20,
    /// `RSTAR` at offset `0x54`, resets to `0x0000_0000`, read-write.
    Rstar = 21,
    /// `CHPAR` at offset `0x58`, resets to `0x0000_0000`, read-write.
    Chpar = 22,
    /// `CPT1ACR` at offset `0x5C`, resets to `0x0000_0000`, read-write.
    Cpt1acr = 23,
    /// `CPT2ACR` at offset `0x60`, resets to `0x0000_0000`, read-write.
    Cpt2acr = 24,
    /// `OUTAR` at offset `0x64`, resets to `0x0000_0000`, read-write.
    Outar = 25,
    /// `FLTAR` at offset `0x68`, resets to `0x0000_0000`, read-write.
    Fltar = 26,
}

impl Register {
    /// Every register, in table order.
    pub const ALL: [Self; 27] = [Self::Timacr, Self::Timaisr, Self::Timaicr, Self::Timadier5, Self::Cntar, Self::Perar, Self::Repar, Self::Cmp1ar, Self::Cmp1car, Self::Cmp2ar, Self::Cmp3ar, Self::Cmp4ar, Self::Cpt1ar, Self::Cpt2ar, Self::Dtar, Self::Seta1r, Self::Rsta1r, Self::Seta2r, Self::Rsta2r, Self::Eefar1, Self::Eefar2, Self::Rstar, Self::Chpar, Self::Cpt1acr, Self::Cpt2acr, Self::Outar, Self::Fltar];
}

impl Layout for Register {
    const REGISTERS: &'static [RegisterSpec] = &REGISTERS;
    fn from_index(index: usize) -> Option<Self> {
        Self::ALL.get(index).copied()
    }
    fn index(self) -> usize {
        self as usize
    }
}

/// The fields of `TIMACR`.
pub mod timacr {
    use super::FieldSpec;
    /// `CK_PSCx`, bits 0..=2.
    pub const CK_PSCX: &FieldSpec = &super::REGISTERS[0].fields[0];
    /// `CONT`, bit 3.
    pub const CONT: &FieldSpec = &super::REGISTERS[0].fields[1];
    /// `RETRIG`, bit 4.
    pub const RETRIG: &FieldSpec = &super::REGISTERS[0].fields[2];
    /// `HALF`, bit 5.
    pub const HALF: &FieldSpec = &super::REGISTERS[0].fields[3];
    /// `PSHPLL`, bit 6.
    pub const PSHPLL: &FieldSpec = &super::REGISTERS[0].fields[4];
    /// `SYNCRSTx`, bit 10.
    pub const SYNCRSTX: &FieldSpec = &super::REGISTERS[0].fields[5];
    /// `SYNCSTRTx`, bit 11.
    pub const SYNCSTRTX: &FieldSpec = &super::REGISTERS[0].fields[6];
    /// `DELCMP2`, bits 12..=13.
    pub const DELCMP2: &FieldSpec = &super::REGISTERS[0].fields[7];
    /// `DELCMP4`, bits 14..=15.
    pub const DELCMP4: &FieldSpec = &super::REGISTERS[0].fields[8];
    /// `TxREPU`, bit 17.
    pub const TXREPU: &FieldSpec = &super::REGISTERS[0].fields[9];
    /// `TxRSTU`, bit 18.
    pub const TXRSTU: &FieldSpec = &super::REGISTERS[0].fields[10];
    /// `TBU`, bit 20.
    pub const TBU: &FieldSpec = &super::REGISTERS[0].fields[11];
    /// `TCU`, bit 21.
    pub const TCU: &FieldSpec = &super::REGISTERS[0].fields[12];
    /// `TDU`, bit 22.
    pub const TDU: &FieldSpec = &super::REGISTERS[0].fields[13];
    /// `TEU`, bit 23.
    pub const TEU: &FieldSpec = &super::REGISTERS[0].fields[14];
    /// `MSTU`, bit 24.
    pub const MSTU: &FieldSpec = &super::REGISTERS[0].fields[15];
    /// `DACSYNC`, bits 25..=26.
    pub const DACSYNC: &FieldSpec = &super::REGISTERS[0].fields[16];
    /// `PREEN`, bit 27.
    pub const PREEN: &FieldSpec = &super::REGISTERS[0].fields[17];
    /// `UPDGAT`, bits 28..=31.
    pub const UPDGAT: &FieldSpec = &super::REGISTERS[0].fields[18];
}

/// The fields of `TIMAISR`.
pub mod timaisr {
    use super::FieldSpec;
    /// `CMP1`, bit 0.
    pub const CMP1: &FieldSpec = &super::REGISTERS[1].fields[0];
    /// `CMP2`, bit 1.
    pub const CMP2: &FieldSpec = &super::REGISTERS[1].fields[1];
    /// `CMP3`, bit 2.
    pub const CMP3: &FieldSpec = &super::REGISTERS[1].fields[2];
    /// `CMP4`, bit 3.
    pub const CMP4: &FieldSpec = &super::REGISTERS[1].fields[3];
    /// `REP`, bit 4.
    pub const REP: &FieldSpec = &super::REGISTERS[1].fields[4];
    /// `UPD`, bit 6.
    pub const UPD: &FieldSpec = &super::REGISTERS[1].fields[5];
    /// `CPT1`, bit 7.
    pub const CPT1: &FieldSpec = &super::REGISTERS[1].fields[6];
    /// `CPT2`, bit 8.
    pub const CPT2: &FieldSpec = &super::REGISTERS[1].fields[7];
    /// `SETx1`, bit 9.
    pub const SETX1: &FieldSpec = &super::REGISTERS[1].fields[8];
    /// `RSTx1`, bit 10.
    pub const RSTX1: &FieldSpec = &super::REGISTERS[1].fields[9];
    /// `SETx2`, bit 11.
    pub const SETX2: &FieldSpec = &super::REGISTERS[1].fields[10];
    /// `RSTx2`, bit 12.
    pub const RSTX2: &FieldSpec = &super::REGISTERS[1].fields[11];
    /// `RST`, bit 13.
    pub const RST: &FieldSpec = &super::REGISTERS[1].fields[12];
    /// `DLYPRT`, bit 14.
    pub const DLYPRT: &FieldSpec = &super::REGISTERS[1].fields[13];
    /// `CPPSTAT`, bit 16.
    pub const CPPSTAT: &FieldSpec = &super::REGISTERS[1].fields[14];
    /// `IPPSTAT`, bit 17.
    pub const IPPSTAT: &FieldSpec = &super::REGISTERS[1].fields[15];
    /// `O1STAT`, bit 18.
    pub const O1STAT: &FieldSpec = &super::REGISTERS[1].fields[16];
    /// `O2STAT`, bit 19.
    pub const O2STAT: &FieldSpec = &super::REGISTERS[1].fields[17];
}

/// The fields of `TIMAICR`.
pub mod timaicr {
    use super::FieldSpec;
    /// `CMP1C`, bit 0.
    pub const CMP1C: &FieldSpec = &super::REGISTERS[2].fields[0];
    /// `CMP2C`, bit 1.
    pub const CMP2C: &FieldSpec = &super::REGISTERS[2].fields[1];
    /// `CMP3C`, bit 2.
    pub const CMP3C: &FieldSpec = &super::REGISTERS[2].fields[2];
    /// `CMP4C`, bit 3.
    pub const CMP4C: &FieldSpec = &super::REGISTERS[2].fields[3];
    /// `REPC`, bit 4.
    pub const REPC: &FieldSpec = &super::REGISTERS[2].fields[4];
    /// `UPDC`, bit 6.
    pub const UPDC: &FieldSpec = &super::REGISTERS[2].fields[5];
    /// `CPT1C`, bit 7.
    pub const CPT1C: &FieldSpec = &super::REGISTERS[2].fields[6];
    /// `CPT2C`, bit 8.
    pub const CPT2C: &FieldSpec = &super::REGISTERS[2].fields[7];
    /// `SET1xC`, bit 9.
    pub const SET1XC: &FieldSpec = &super::REGISTERS[2].fields[8];
    /// `RSTx1C`, bit 10.
    pub const RSTX1C: &FieldSpec = &super::REGISTERS[2].fields[9];
    /// `SET2xC`, bit 11.
    pub const SET2XC: &FieldSpec = &super::REGISTERS[2].fields[10];
    /// `RSTx2C`, bit 12.
    pub const RSTX2C: &FieldSpec = &super::REGISTERS[2].fields[11];
    /// `RSTC`, bit 13.
    pub const RSTC: &FieldSpec = &super::REGISTERS[2].fields[12];
    /// `DLYPRTC`, bit 14.
    pub const DLYPRTC: &FieldSpec = &super::REGISTERS[2].fields[13];
}

/// The fields of `TIMADIER5`.
pub mod timadier5 {
    use super::FieldSpec;
    /// `CMP1IE`, bit 0.
    pub const CMP1IE: &FieldSpec = &super::REGISTERS[3].fields[0];
    /// `CMP2IE`, bit 1.
    pub const CMP2IE: &FieldSpec = &super::REGISTERS[3].fields[1];
    /// `CMP3IE`, bit 2.
    pub const CMP3IE: &FieldSpec = &super::REGISTERS[3].fields[2];
    /// `CMP4IE`, bit 3.
    pub const CMP4IE: &FieldSpec = &super::REGISTERS[3].fields[3];
    /// `REPIE`, bit 4.
    pub const REPIE: &FieldSpec = &super::REGISTERS[3].fields[4];
    /// `UPDIE`, bit 6.
    pub const UPDIE: &FieldSpec = &super::REGISTERS[3].fields[5];
    /// `CPT1IE`, bit 7.
    pub const CPT1IE: &FieldSpec = &super::REGISTERS[3].fields[6];
    /// `CPT2IE`, bit 8.
    pub const CPT2IE: &FieldSpec = &super::REGISTERS[3].fields[7];
    /// `SET1xIE`, bit 9.
    pub const SET1XIE: &FieldSpec = &super::REGISTERS[3].fields[8];
    /// `RSTx1IE`, bit 10.
    pub const RSTX1IE: &FieldSpec = &super::REGISTERS[3].fields[9];
    /// `SETx2IE`, bit 11.
    pub const SETX2IE: &FieldSpec = &super::REGISTERS[3].fields[10];
    /// `RSTx2IE`, bit 12.
    pub const RSTX2IE: &FieldSpec = &super::REGISTERS[3].fields[11];
    /// `RSTIE`, bit 13.
    pub const RSTIE: &FieldSpec = &super::REGISTERS[3].fields[12];
    /// `DLYPRTIE`, bit 14.
    pub const DLYPRTIE: &FieldSpec = &super::REGISTERS[3].fields[13];
    /// `CMP1DE`, bit 16.
    pub const CMP1DE: &FieldSpec = &super::REGISTERS[3].fields[14];
    /// `CMP2DE`, bit 17.
    pub const CMP2DE: &FieldSpec = &super::REGISTERS[3].fields[15];
    /// `CMP3DE`, bit 18.
    pub const CMP3DE: &FieldSpec = &super::REGISTERS[3].fields[16];
    /// `CMP4DE`, bit 19.
    pub const CMP4DE: &FieldSpec = &super::REGISTERS[3].fields[17];
    /// `REPDE`, bit 20.
    pub const REPDE: &FieldSpec = &super::REGISTERS[3].fields[18];
    /// `UPDDE`, bit 22.
    pub const UPDDE: &FieldSpec = &super::REGISTERS[3].fields[19];
    /// `CPT1DE`, bit 23.
    pub const CPT1DE: &FieldSpec = &super::REGISTERS[3].fields[20];
    /// `CPT2DE`, bit 24.
    pub const CPT2DE: &FieldSpec = &super::REGISTERS[3].fields[21];
    /// `SET1xDE`, bit 25.
    pub const SET1XDE: &FieldSpec = &super::REGISTERS[3].fields[22];
    /// `RSTx1DE`, bit 26.
    pub const RSTX1DE: &FieldSpec = &super::REGISTERS[3].fields[23];
    /// `SETx2DE`, bit 27.
    pub const SETX2DE: &FieldSpec = &super::REGISTERS[3].fields[24];
    /// `RSTx2DE`, bit 28.
    pub const RSTX2DE: &FieldSpec = &super::REGISTERS[3].fields[25];
    /// `RSTDE`, bit 29.
    pub const RSTDE: &FieldSpec = &super::REGISTERS[3].fields[26];
    /// `DLYPRTDE`, bit 30.
    pub const DLYPRTDE: &FieldSpec = &super::REGISTERS[3].fields[27];
}

/// The fields of `CNTAR`.
pub mod cntar {
    use super::FieldSpec;
    /// `CNTx`, bits 0..=15.
    pub const CNTX: &FieldSpec = &super::REGISTERS[4].fields[0];
}

/// The fields of `PERAR`.
pub mod perar {
    use super::FieldSpec;
    /// `PERx`, bits 0..=15.
    pub const PERX: &FieldSpec = &super::REGISTERS[5].fields[0];
}

/// The fields of `REPAR`.
pub mod repar {
    use super::FieldSpec;
    /// `REPx`, bits 0..=7.
    pub const REPX: &FieldSpec = &super::REGISTERS[6].fields[0];
}

/// The fields of `CMP1AR`.
pub mod cmp1ar {
    use super::FieldSpec;
    /// `CMP1x`, bits 0..=15.
    pub const CMP1X: &FieldSpec = &super::REGISTERS[7].fields[0];
}

/// The fields of `CMP1CAR`.
pub mod cmp1car {
    use super::FieldSpec;
    /// `CMP1x`, bits 0..=15.
    pub const CMP1X: &FieldSpec = &super::REGISTERS[8].fields[0];
    /// `REPx`, bits 16..=23.
    pub const REPX: &FieldSpec = &super::REGISTERS[8].fields[1];
}

/// The fields of `CMP2AR`.
pub mod cmp2ar {
    use super::FieldSpec;
    /// `CMP2x`, bits 0..=15.
    pub const CMP2X: &FieldSpec = &super::REGISTERS[9].fields[0];
}

/// The fields of `CMP3AR`.
pub mod cmp3ar {
    use super::FieldSpec;
    /// `CMP3x`, bits 0..=15.
    pub const CMP3X: &FieldSpec = &super::REGISTERS[10].fields[0];
}

/// The fields of `CMP4AR`.
pub mod cmp4ar {
    use super::FieldSpec;
    /// `CMP4x`, bits 0..=15.
    pub const CMP4X: &FieldSpec = &super::REGISTERS[11].fields[0];
}

/// The fields of `CPT1AR`.
pub mod cpt1ar {
    use super::FieldSpec;
    /// `CPT1x`, bits 0..=15.
    pub const CPT1X: &FieldSpec = &super::REGISTERS[12].fields[0];
}

/// The fields of `CPT2AR`.
pub mod cpt2ar {
    use super::FieldSpec;
    /// `CPT2x`, bits 0..=15.
    pub const CPT2X: &FieldSpec = &super::REGISTERS[13].fields[0];
}

/// The fields of `DTAR`.
pub mod dtar {
    use super::FieldSpec;
    /// `DTRx`, bits 0..=8.
    pub const DTRX: &FieldSpec = &super::REGISTERS[14].fields[0];
    /// `SDTRx`, bit 9.
    pub const SDTRX: &FieldSpec = &super::REGISTERS[14].fields[1];
    /// `DTPRSC`, bits 10..=12.
    pub const DTPRSC: &FieldSpec = &super::REGISTERS[14].fields[2];
    /// `DTRSLKx`, bit 14.
    pub const DTRSLKX: &FieldSpec = &super::REGISTERS[14].fields[3];
    /// `DTRLKx`, bit 15.
    pub const DTRLKX: &FieldSpec = &super::REGISTERS[14].fields[4];
    /// `DTFx`, bits 16..=24.
    pub const DTFX: &FieldSpec = &super::REGISTERS[14].fields[5];
    /// `SDTFx`, bit 25.
    pub const SDTFX: &FieldSpec = &super::REGISTERS[14].fields[6];
    /// `DTFSLKx`, bit 30.
    pub const DTFSLKX: &FieldSpec = &super::REGISTERS[14].fields[7];
    /// `DTFLKx`, bit 31.
    pub const DTFLKX: &FieldSpec = &super::REGISTERS[14].fields[8];
}

/// The fields of `SETA1R`.
pub mod seta1r {
    use super::FieldSpec;
    /// `SST`, bit 0.
    pub const SST: &FieldSpec = &super::REGISTERS[15].fields[0];
    /// `RESYNC`, bit 1.
    pub const RESYNC: &FieldSpec = &super::REGISTERS[15].fields[1];
    /// `PER`, bit 2.
    pub const PER: &FieldSpec = &super::REGISTERS[15].fields[2];
    /// `CMP1`, bit 3.
    pub const CMP1: &FieldSpec = &super::REGISTERS[15].fields[3];
    /// `CMP2`, bit 4.
    pub const CMP2: &FieldSpec = &super::REGISTERS[15].fields[4];
    /// `CMP3`, bit 5.
    pub const CMP3: &FieldSpec = &super::REGISTERS[15].fields[5];
    /// `CMP4`, bit 6.
    pub const CMP4: &FieldSpec = &super::REGISTERS[15].fields[6];
    /// `MSTPER`, bit 7.
    pub const MSTPER: &FieldSpec = &super::REGISTERS[15].fields[7];
    /// `MSTCMP1`, bit 8.
    pub const MSTCMP1: &FieldSpec = &super::REGISTERS[15].fields[8];
    /// `MSTCMP2`, bit 9.
    pub const MSTCMP2: &FieldSpec = &super::REGISTERS[15].fields[9];
    /// `MSTCMP3`, bit 10.
    pub const MSTCMP3: &FieldSpec = &super::REGISTERS[15].fields[10];
    /// `MSTCMP4`, bit 11.
    pub const MSTCMP4: &FieldSpec = &super::REGISTERS[15].fields[11];
    /// `TIMEVNT1`, bit 12.
    pub const TIMEVNT1: &FieldSpec = &super::REGISTERS[15].fields[12];
    /// `TIMEVNT2`, bit 13.
    pub const TIMEVNT2: &FieldSpec = &super::REGISTERS[15].fields[13];
    /// `TIMEVNT3`, bit 14.
    pub const TIMEVNT3: &FieldSpec = &super::REGISTERS[15].fields[14];
    /// `TIMEVNT4`, bit 15.
    pub const TIMEVNT4: &FieldSpec = &super::REGISTERS[15].fields[15];
    /// `TIMEVNT5`, bit 16.
    pub const TIMEVNT5: &FieldSpec = &super::REGISTERS[15].fields[16];
    /// `TIMEVNT6`, bit 17.
    pub const TIMEVNT6: &FieldSpec = &super::REGISTERS[15].fields[17];
    /// `TIMEVNT7`, bit 18.
    pub const TIMEVNT7: &FieldSpec = &super::REGISTERS[15].fields[18];
    /// `TIMEVNT8`, bit 19.
    pub const TIMEVNT8: &FieldSpec = &super::REGISTERS[15].fields[19];
    /// `TIMEVNT9`, bit 20.
    pub const TIMEVNT9: &FieldSpec = &super::REGISTERS[15].fields[20];
    /// `EXTEVNT1`, bit 21.
    pub const EXTEVNT1: &FieldSpec = &super::REGISTERS[15].fields[21];
    /// `EXTEVNT2`, bit 22.
    pub const EXTEVNT2: &FieldSpec = &super::REGISTERS[15].fields[22];
    /// `EXTEVNT3`, bit 23.
    pub const EXTEVNT3: &FieldSpec = &super::REGISTERS[15].fields[23];
    /// `EXTEVNT4`, bit 24.
    pub const EXTEVNT4: &FieldSpec = &super::REGISTERS[15].fields[24];
    /// `EXTEVNT5`, bit 25.
    pub const EXTEVNT5: &FieldSpec = &super::REGISTERS[15].fields[25];
    /// `EXTEVNT6`, bit 26.
    pub const EXTEVNT6: &FieldSpec = &super::REGISTERS[15].fields[26];
    /// `EXTEVNT7`, bit 27.
    pub const EXTEVNT7: &FieldSpec = &super::REGISTERS[15].fields[27];
    /// `EXTEVNT8`, bit 28.
    pub const EXTEVNT8: &FieldSpec = &super::REGISTERS[15].fields[28];
    /// `EXTEVNT9`, bit 29.
    pub const EXTEVNT9: &FieldSpec = &super::REGISTERS[15].fields[29];
    /// `EXTEVNT10`, bit 30.
    pub const EXTEVNT10: &FieldSpec = &super::REGISTERS[15].fields[30];
    /// `UPDATE`, bit 31.
    pub const UPDATE: &FieldSpec = &super::REGISTERS[15].fields[31];
}

/// The fields of `RSTA1R`.
pub mod rsta1r {
    use super::FieldSpec;
    /// `SRT`, bit 0.
    pub const SRT: &FieldSpec = &super::REGISTERS[16].fields[0];
    /// `RESYNC`, bit 1.
    pub const RESYNC: &FieldSpec = &super::REGISTERS[16].fields[1];
    /// `PER`, bit 2.
    pub const PER: &FieldSpec = &super::REGISTERS[16].fields[2];
    /// `CMP1`, bit 3.
    pub const CMP1: &FieldSpec = &super::REGISTERS[16].fields[3];
    /// `CMP2`, bit 4.
    pub const CMP2: &FieldSpec = &super::REGISTERS[16].fields[4];
    /// `CMP3`, bit 5.
    pub const CMP3: &FieldSpec = &super::REGISTERS[16].fields[5];
    /// `CMP4`, bit 6.
    pub const CMP4: &FieldSpec = &super::REGISTERS[16].fields[6];
    /// `MSTPER`, bit 7.
    pub const MSTPER: &FieldSpec = &super::REGISTERS[16].fields[7];
    /// `MSTCMP1`, bit 8.
    pub const MSTCMP1: &FieldSpec = &super::REGISTERS[16].fields[8];
    /// `MSTCMP2`, bit 9.
    pub const MSTCMP2: &FieldSpec = &super::REGISTERS[16].fields[9];
    /// `MSTCMP3`, bit 10.
    pub const MSTCMP3: &FieldSpec = &super::REGISTERS[16].fields[10];
    /// `MSTCMP4`, bit 11.
    pub const MSTCMP4: &FieldSpec = &super::REGISTERS[16].fields[11];
    /// `TIMEVNT1`, bit 12.
    pub const TIMEVNT1: &FieldSpec = &super::REGISTERS[16].fields[12];
    /// `TIMEVNT2`, bit 13.
    pub const TIMEVNT2: &FieldSpec = &super::REGISTERS[16].fields[13];
    /// `TIMEVNT3`, bit 14.
    pub const TIMEVNT3: &FieldSpec = &super::REGISTERS[16].fields[14];
    /// `TIMEVNT4`, bit 15.
    pub const TIMEVNT4: &FieldSpec = &super::REGISTERS[16].fields[15];
    /// `TIMEVNT5`, bit 16.
    pub const TIMEVNT5: &FieldSpec = &super::REGISTERS[16].fields[16];
    /// `TIMEVNT6`, bit 17.
    pub const TIMEVNT6: &FieldSpec = &super::REGISTERS[16].fields[17];
    /// `TIMEVNT7`, bit 18.
    pub const TIMEVNT7: &FieldSpec = &super::REGISTERS[16].fields[18];
    /// `TIMEVNT8`, bit 19.
    pub const TIMEVNT8: &FieldSpec = &super::REGISTERS[16].fields[19];
    /// `TIMEVNT9`, bit 20.
    pub const TIMEVNT9: &FieldSpec = &super::REGISTERS[16].fields[20];
    /// `EXTEVNT1`, bit 21.
    pub const EXTEVNT1: &FieldSpec = &super::REGISTERS[16].fields[21];
    /// `EXTEVNT2`, bit 22.
    pub const EXTEVNT2: &FieldSpec = &super::REGISTERS[16].fields[22];
    /// `EXTEVNT3`, bit 23.
    pub const EXTEVNT3: &FieldSpec = &super::REGISTERS[16].fields[23];
    /// `EXTEVNT4`, bit 24.
    pub const EXTEVNT4: &FieldSpec = &super::REGISTERS[16].fields[24];
    /// `EXTEVNT5`, bit 25.
    pub const EXTEVNT5: &FieldSpec = &super::REGISTERS[16].fields[25];
    /// `EXTEVNT6`, bit 26.
    pub const EXTEVNT6: &FieldSpec = &super::REGISTERS[16].fields[26];
    /// `EXTEVNT7`, bit 27.
    pub const EXTEVNT7: &FieldSpec = &super::REGISTERS[16].fields[27];
    /// `EXTEVNT8`, bit 28.
    pub const EXTEVNT8: &FieldSpec = &super::REGISTERS[16].fields[28];
    /// `EXTEVNT9`, bit 29.
    pub const EXTEVNT9: &FieldSpec = &super::REGISTERS[16].fields[29];
    /// `EXTEVNT10`, bit 30.
    pub const EXTEVNT10: &FieldSpec = &super::REGISTERS[16].fields[30];
    /// `UPDATE`, bit 31.
    pub const UPDATE: &FieldSpec = &super::REGISTERS[16].fields[31];
}

/// The fields of `SETA2R`.
pub mod seta2r {
    use super::FieldSpec;
    /// `SST`, bit 0.
    pub const SST: &FieldSpec = &super::REGISTERS[17].fields[0];
    /// `RESYNC`, bit 1.
    pub const RESYNC: &FieldSpec = &super::REGISTERS[17].fields[1];
    /// `PER`, bit 2.
    pub const PER: &FieldSpec = &super::REGISTERS[17].fields[2];
    /// `CMP1`, bit 3.
    pub const CMP1: &FieldSpec = &super::REGISTERS[17].fields[3];
    /// `CMP2`, bit 4.
    pub const CMP2: &FieldSpec = &super::REGISTERS[17].fields[4];
    /// `CMP3`, bit 5.
    pub const CMP3: &FieldSpec = &super::REGISTERS[17].fields[5];
    /// `CMP4`, bit 6.
    pub const CMP4: &FieldSpec = &super::REGISTERS[17].fields[6];
    /// `MSTPER`, bit 7.
    pub const MSTPER: &FieldSpec = &super::REGISTERS[17].fields[7];
    /// `MSTCMP1`, bit 8.
    pub const MSTCMP1: &FieldSpec = &super::REGISTERS[17].fields[8];
    /// `MSTCMP2`, bit 9.
    pub const MSTCMP2: &FieldSpec = &super::REGISTERS[17].fields[9];
    /// `MSTCMP3`, bit 10.
    pub const MSTCMP3: &FieldSpec = &super::REGISTERS[17].fields[10];
    /// `MSTCMP4`, bit 11.
    pub const MSTCMP4: &FieldSpec = &super::REGISTERS[17].fields[11];
    /// `TIMEVNT1`, bit 12.
    pub const TIMEVNT1: &FieldSpec = &super::REGISTERS[17].fields[12];
    /// `TIMEVNT2`, bit 13.
    pub const TIMEVNT2: &FieldSpec = &super::REGISTERS[17].fields[13];
    /// `TIMEVNT3`, bit 14.
    pub const TIMEVNT3: &FieldSpec = &super::REGISTERS[17].fields[14];
    /// `TIMEVNT4`, bit 15.
    pub const TIMEVNT4: &FieldSpec = &super::REGISTERS[17].fields[15];
    /// `TIMEVNT5`, bit 16.
    pub const TIMEVNT5: &FieldSpec = &super::REGISTERS[17].fields[16];
    /// `TIMEVNT6`, bit 17.
    pub const TIMEVNT6: &FieldSpec = &super::REGISTERS[17].fields[17];
    /// `TIMEVNT7`, bit 18.
    pub const TIMEVNT7: &FieldSpec = &super::REGISTERS[17].fields[18];
    /// `TIMEVNT8`, bit 19.
    pub const TIMEVNT8: &FieldSpec = &super::REGISTERS[17].fields[19];
    /// `TIMEVNT9`, bit 20.
    pub const TIMEVNT9: &FieldSpec = &super::REGISTERS[17].fields[20];
    /// `EXTEVNT1`, bit 21.
    pub const EXTEVNT1: &FieldSpec = &super::REGISTERS[17].fields[21];
    /// `EXTEVNT2`, bit 22.
    pub const EXTEVNT2: &FieldSpec = &super::REGISTERS[17].fields[22];
    /// `EXTEVNT3`, bit 23.
    pub const EXTEVNT3: &FieldSpec = &super::REGISTERS[17].fields[23];
    /// `EXTEVNT4`, bit 24.
    pub const EXTEVNT4: &FieldSpec = &super::REGISTERS[17].fields[24];
    /// `EXTEVNT5`, bit 25.
    pub const EXTEVNT5: &FieldSpec = &super::REGISTERS[17].fields[25];
    /// `EXTEVNT6`, bit 26.
    pub const EXTEVNT6: &FieldSpec = &super::REGISTERS[17].fields[26];
    /// `EXTEVNT7`, bit 27.
    pub const EXTEVNT7: &FieldSpec = &super::REGISTERS[17].fields[27];
    /// `EXTEVNT8`, bit 28.
    pub const EXTEVNT8: &FieldSpec = &super::REGISTERS[17].fields[28];
    /// `EXTEVNT9`, bit 29.
    pub const EXTEVNT9: &FieldSpec = &super::REGISTERS[17].fields[29];
    /// `EXTEVNT10`, bit 30.
    pub const EXTEVNT10: &FieldSpec = &super::REGISTERS[17].fields[30];
    /// `UPDATE`, bit 31.
    pub const UPDATE: &FieldSpec = &super::REGISTERS[17].fields[31];
}

/// The fields of `RSTA2R`.
pub mod rsta2r {
    use super::FieldSpec;
    /// `SRT`, bit 0.
    pub const SRT: &FieldSpec = &super::REGISTERS[18].fields[0];
    /// `RESYNC`, bit 1.
    pub const RESYNC: &FieldSpec = &super::REGISTERS[18].fields[1];
    /// `PER`, bit 2.
    pub const PER: &FieldSpec = &super::REGISTERS[18].fields[2];
    /// `CMP1`, bit 3.
    pub const CMP1: &FieldSpec = &super::REGISTERS[18].fields[3];
    /// `CMP2`, bit 4.
    pub const CMP2: &FieldSpec = &super::REGISTERS[18].fields[4];
    /// `CMP3`, bit 5.
    pub const CMP3: &FieldSpec = &super::REGISTERS[18].fields[5];
    /// `CMP4`, bit 6.
    pub const CMP4: &FieldSpec = &super::REGISTERS[18].fields[6];
    /// `MSTPER`, bit 7.
    pub const MSTPER: &FieldSpec = &super::REGISTERS[18].fields[7];
    /// `MSTCMP1`, bit 8.
    pub const MSTCMP1: &FieldSpec = &super::REGISTERS[18].fields[8];
    /// `MSTCMP2`, bit 9.
    pub const MSTCMP2: &FieldSpec = &super::REGISTERS[18].fields[9];
    /// `MSTCMP3`, bit 10.
    pub const MSTCMP3: &FieldSpec = &super::REGISTERS[18].fields[10];
    /// `MSTCMP4`, bit 11.
    pub const MSTCMP4: &FieldSpec = &super::REGISTERS[18].fields[11];
    /// `TIMEVNT1`, bit 12.
    pub const TIMEVNT1: &FieldSpec = &super::REGISTERS[18].fields[12];
    /// `TIMEVNT2`, bit 13.
    pub const TIMEVNT2: &FieldSpec = &super::REGISTERS[18].fields[13];
    /// `TIMEVNT3`, bit 14.
    pub const TIMEVNT3: &FieldSpec = &super::REGISTERS[18].fields[14];
    /// `TIMEVNT4`, bit 15.
    pub const TIMEVNT4: &FieldSpec = &super::REGISTERS[18].fields[15];
    /// `TIMEVNT5`, bit 16.
    pub const TIMEVNT5: &FieldSpec = &super::REGISTERS[18].fields[16];
    /// `TIMEVNT6`, bit 17.
    pub const TIMEVNT6: &FieldSpec = &super::REGISTERS[18].fields[17];
    /// `TIMEVNT7`, bit 18.
    pub const TIMEVNT7: &FieldSpec = &super::REGISTERS[18].fields[18];
    /// `TIMEVNT8`, bit 19.
    pub const TIMEVNT8: &FieldSpec = &super::REGISTERS[18].fields[19];
    /// `TIMEVNT9`, bit 20.
    pub const TIMEVNT9: &FieldSpec = &super::REGISTERS[18].fields[20];
    /// `EXTEVNT1`, bit 21.
    pub const EXTEVNT1: &FieldSpec = &super::REGISTERS[18].fields[21];
    /// `EXTEVNT2`, bit 22.
    pub const EXTEVNT2: &FieldSpec = &super::REGISTERS[18].fields[22];
    /// `EXTEVNT3`, bit 23.
    pub const EXTEVNT3: &FieldSpec = &super::REGISTERS[18].fields[23];
    /// `EXTEVNT4`, bit 24.
    pub const EXTEVNT4: &FieldSpec = &super::REGISTERS[18].fields[24];
    /// `EXTEVNT5`, bit 25.
    pub const EXTEVNT5: &FieldSpec = &super::REGISTERS[18].fields[25];
    /// `EXTEVNT6`, bit 26.
    pub const EXTEVNT6: &FieldSpec = &super::REGISTERS[18].fields[26];
    /// `EXTEVNT7`, bit 27.
    pub const EXTEVNT7: &FieldSpec = &super::REGISTERS[18].fields[27];
    /// `EXTEVNT8`, bit 28.
    pub const EXTEVNT8: &FieldSpec = &super::REGISTERS[18].fields[28];
    /// `EXTEVNT9`, bit 29.
    pub const EXTEVNT9: &FieldSpec = &super::REGISTERS[18].fields[29];
    /// `EXTEVNT10`, bit 30.
    pub const EXTEVNT10: &FieldSpec = &super::REGISTERS[18].fields[30];
    /// `UPDATE`, bit 31.
    pub const UPDATE: &FieldSpec = &super::REGISTERS[18].fields[31];
}

/// The fields of `EEFAR1`.
pub mod eefar1 {
    use super::FieldSpec;
    /// `EE1LTCH`, bit 0.
    pub const EE1LTCH: &FieldSpec = &super::REGISTERS[19].fields[0];
    /// `EE1FLTR`, bits 1..=4.
    pub const EE1FLTR: &FieldSpec = &super::REGISTERS[19].fields[1];
    /// `EE2LTCH`, bit 6.
    pub const EE2LTCH: &FieldSpec = &super::REGISTERS[19].fields[2];
    /// `EE2FLTR`, bits 7..=10.
    pub const EE2FLTR: &FieldSpec = &super::REGISTERS[19].fields[3];
    /// `EE3LTCH`, bit 12.
    pub const EE3LTCH: &FieldSpec = &super::REGISTERS[19].fields[4];
    /// `EE3FLTR`, bits 13..=16.
    pub const EE3FLTR: &FieldSpec = &super::REGISTERS[19].fields[5];
    /// `EE4LTCH`, bit 18.
    pub const EE4LTCH: &FieldSpec = &super::REGISTERS[19].fields[6];
    /// `EE4FLTR`, bits 19..=22.
    pub const EE4FLTR: &FieldSpec = &super::REGISTERS[19].fields[7];
    /// `EE5LTCH`, bit 24.
    pub const EE5LTCH: &FieldSpec = &super::REGISTERS[19].fields[8];
    /// `EE5FLTR`, bits 25..=28.
    pub const EE5FLTR: &FieldSpec = &super::REGISTERS[19].fields[9];
}

/// The fields of `EEFAR2`.
pub mod eefar2 {
    use super::FieldSpec;
    /// `EE6LTCH`, bit 0.
    pub const EE6LTCH: &FieldSpec = &super::REGISTERS[20].fields[0];
    /// `EE6FLTR`, bits 1..=4.
    pub const EE6FLTR: &FieldSpec = &super::REGISTERS[20].fields[1];
    /// `EE7LTCH`, bit 6.
    pub const EE7LTCH: &FieldSpec = &super::REGISTERS[20].fields[2];
    /// `EE7FLTR`, bits 7..=10.
    pub const EE7FLTR: &FieldSpec = &super::REGISTERS[20].fields[3];
    /// `EE8LTCH`, bit 12.
    pub const EE8LTCH: &FieldSpec = &super::REGISTERS[20].fields[4];
    /// `EE8FLTR`, bits 13..=16.
    pub const EE8FLTR: &FieldSpec = &super::REGISTERS[20].fields[5];
    /// `EE9LTCH`, bit 18.
    pub const EE9LTCH: &FieldSpec = &super::REGISTERS[20].fields[6];
    /// `EE9FLTR`, bits 19..=22.
    pub const EE9FLTR: &FieldSpec = &super::REGISTERS[20].fields[7];
    /// `EE10LTCH`, bit 24.
    pub const EE10LTCH: &FieldSpec = &super::REGISTERS[20].fields[8];
    /// `EE10FLTR`, bits 25..=28.
    pub const EE10FLTR: &FieldSpec = &super::REGISTERS[20].fields[9];
}

/// The fields of `RSTAR`.
pub mod rstar {
    use super::FieldSpec;
    /// `UPDT`, bit 1.
    pub const UPDT: &FieldSpec = &super::REGISTERS[21].fields[0];
    /// `CMP2`, bit 2.
    pub const CMP2: &FieldSpec = &super::REGISTERS[21].fields[1];
    /// `CMP4`, bit 3.
    pub const CMP4: &FieldSpec = &super::REGISTERS[21].fields[2];
    /// `MSTPER`, bit 4.
    pub const MSTPER: &FieldSpec = &super::REGISTERS[21].fields[3];
    /// `MSTCMP1`, bit 5.
    pub const MSTCMP1: &FieldSpec = &super::REGISTERS[21].fields[4];
    /// `MSTCMP2`, bit 6.
    pub const MSTCMP2: &FieldSpec = &super::REGISTERS[21].fields[5];
    /// `MSTCMP3`, bit 7.
    pub const MSTCMP3: &FieldSpec = &super::REGISTERS[21].fields[6];
    /// `MSTCMP4`, bit 8.
    pub const MSTCMP4: &FieldSpec = &super::REGISTERS[21].fields[7];
    /// `EXTEVNT1`, bit 9.
    pub const EXTEVNT1: &FieldSpec = &super::REGISTERS[21].fields[8];
    /// `EXTEVNT2`, bit 10.
    pub const EXTEVNT2: &FieldSpec = &super::REGISTERS[21].fields[9];
    /// `EXTEVNT3`, bit 11.
    pub const EXTEVNT3: &FieldSpec = &super::REGISTERS[21].fields[10];
    /// `EXTEVNT4`, bit 12.
    pub const EXTEVNT4: &FieldSpec = &super::REGISTERS[21].fields[11];
    /// `EXTEVNT5`, bit 13.
    pub const EXTEVNT5: &FieldSpec = &super::REGISTERS[21].fields[12];
    /// `EXTEVNT6`, bit 14.
    pub const EXTEVNT6: &FieldSpec = &super::REGISTERS[21].fields[13];
    /// `EXTEVNT7`, bit 15.
    pub const EXTEVNT7: &FieldSpec = &super::REGISTERS[21].fields[14];
    /// `EXTEVNT8`, bit 16.
    pub const EXTEVNT8: &FieldSpec = &super::REGISTERS[21].fields[15];
    /// `EXTEVNT9`, bit 17.
    pub const EXTEVNT9: &FieldSpec = &super::REGISTERS[21].fields[16];
    /// `EXTEVNT10`, bit 18.
    pub const EXTEVNT10: &FieldSpec = &super::REGISTERS[21].fields[17];
    /// `TIMBCMP1`, bit 19.
    pub const TIMBCMP1: &FieldSpec = &super::REGISTERS[21].fields[18];
    /// `TIMBCMP2`, bit 20.
    pub const TIMBCMP2: &FieldSpec = &super::REGISTERS[21].fields[19];
    /// `TIMBCMP4`, bit 21.
    pub const TIMBCMP4: &FieldSpec = &super::REGISTERS[21].fields[20];
    /// `TIMCCMP1`, bit 22.
    pub const TIMCCMP1: &FieldSpec = &super::REGISTERS[21].fields[21];
    /// `TIMCCMP2`, bit 23.
    pub const TIMCCMP2: &FieldSpec = &super::REGISTERS[21].fields[22];
    /// `TIMCCMP4`, bit 24.
    pub const TIMCCMP4: &FieldSpec = &super::REGISTERS[21].fields[23];
    /// `TIMDCMP1`, bit 25.
    pub const TIMDCMP1: &FieldSpec = &super::REGISTERS[21].fields[24];
    /// `TIMDCMP2`, bit 26.
    pub const TIMDCMP2: &FieldSpec = &super::REGISTERS[21].fields[25];
    /// `TIMDCMP4`, bit 27.
    pub const TIMDCMP4: &FieldSpec = &super::REGISTERS[21].fields[26];
    /// `TIMECMP1`, bit 28.
    pub const TIMECMP1: &FieldSpec = &super::REGISTERS[21].fields[27];
    /// `TIMECMP2`, bit 29.
    pub const TIMECMP2: &FieldSpec = &super::REGISTERS[21].fields[28];
    /// `TIMECMP4`, bit 30.
    pub const TIMECMP4: &FieldSpec = &super::REGISTERS[21].fields[29];
}

/// The fields of `CHPAR`.
pub mod chpar {
    use super::FieldSpec;
    /// `CHPFRQ`, bits 0..=3.
    pub const CHPFRQ: &FieldSpec = &super::REGISTERS[22].fields[0];
    /// `CHPDTY`, bits 4..=6.
    pub const CHPDTY: &FieldSpec = &super::REGISTERS[22].fields[1];
    /// `STRTPW`, bits 7..=10.
    pub const STRTPW: &FieldSpec = &super::REGISTERS[22].fields[2];
}

/// The fields of `CPT1ACR`.
pub mod cpt1acr {
    use super::FieldSpec;
    /// `SWCPT`, bit 0.
    pub const SWCPT: &FieldSpec = &super::REGISTERS[23].fields[0];
    /// `UDPCPT`, bit 1.
    pub const UDPCPT: &FieldSpec = &super::REGISTERS[23].fields[1];
    /// `EXEV1CPT`, bit 2.
    pub const EXEV1CPT: &FieldSpec = &super::REGISTERS[23].fields[2];
    /// `EXEV2CPT`, bit 3.
    pub const EXEV2CPT: &FieldSpec = &super::REGISTERS[23].fields[3];
    /// `EXEV3CPT`, bit 4.
    pub const EXEV3CPT: &FieldSpec = &super::REGISTERS[23].fields[4];
    /// `EXEV4CPT`, bit 5.
    pub const EXEV4CPT: &FieldSpec = &super::REGISTERS[23].fields[5];
    /// `EXEV5CPT`, bit 6.
    pub const EXEV5CPT: &FieldSpec = &super::REGISTERS[23].fields[6];
    /// `EXEV6CPT`, bit 7.
    pub const EXEV6CPT: &FieldSpec = &super::REGISTERS[23].fields[7];
    /// `EXEV7CPT`, bit 8.
    pub const EXEV7CPT: &FieldSpec = &super::REGISTERS[23].fields[8];
    /// `EXEV8CPT`, bit 9.
    pub const EXEV8CPT: &FieldSpec = &super::REGISTERS[23].fields[9];
    /// `EXEV9CPT`, bit 10.
    pub const EXEV9CPT: &FieldSpec = &super::REGISTERS[23].fields[10];
    /// `EXEV10CPT`, bit 11.
    pub const EXEV10CPT: &FieldSpec = &super::REGISTERS[23].fields[11];
    /// `TB1SET`, bit 16.
    pub const TB1SET: &FieldSpec = &super::REGISTERS[23].fields[12];
    /// `TB1RST`, bit 17.
    pub const TB1RST: &FieldSpec = &super::REGISTERS[23].fields[13];
    /// `TBCMP1`, bit 18.
    pub const TBCMP1: &FieldSpec = &super::REGISTERS[23].fields[14];
    /// `TBCMP2`, bit 19.
    pub const TBCMP2: &FieldSpec = &super::REGISTERS[23].fields[15];
    /// `TC1SET`, bit 20.
    pub const TC1SET: &FieldSpec = &super::REGISTERS[23].fields[16];
    /// `TC1RST`, bit 21.
    pub const TC1RST: &FieldSpec = &super::REGISTERS[23].fields[17];
    /// `TCCMP1`, bit 22.
    pub const TCCMP1: &FieldSpec = &super::REGISTERS[23].fields[18];
    /// `TCCMP2`, bit 23.
    pub const TCCMP2: &FieldSpec = &super::REGISTERS[23].fields[19];
    /// `TD1SET`, bit 24.
    pub const TD1SET: &FieldSpec = &super::REGISTERS[23].fields[20];
    /// `TD1RST`, bit 25.
    pub const TD1RST: &FieldSpec = &super::REGISTERS[23].fields[21];
    /// `TDCMP1`, bit 26.
    pub const TDCMP1: &FieldSpec = &super::REGISTERS[23].fields[22];
    /// `TDCMP2`, bit 27.
    pub const TDCMP2: &FieldSpec = &super::REGISTERS[23].fields[23];
    /// `TE1SET`, bit 28.
    pub const TE1SET: &FieldSpec = &super::REGISTERS[23].fields[24];
    /// `TE1RST`, bit 29.
    pub const TE1RST: &FieldSpec = &super::REGISTERS[23].fields[25];
    /// `TECMP1`, bit 30.
    pub const TECMP1: &FieldSpec = &super::REGISTERS[23].fields[26];
    /// `TECMP2`, bit 31.
    pub const TECMP2: &FieldSpec = &super::REGISTERS[23].fields[27];
}

/// The fields of `CPT2ACR`.
pub mod cpt2acr {
    use super::FieldSpec;
    /// `SWCPT`, bit 0.
    pub const SWCPT: &FieldSpec = &super::REGISTERS[24].fields[0];
    /// `UDPCPT`, bit 1.
    pub const UDPCPT: &FieldSpec = &super::REGISTERS[24].fields[1];
    /// `EXEV1CPT`, bit 2.
    pub const EXEV1CPT: &FieldSpec = &super::REGISTERS[24].fields[2];
    /// `EXEV2CPT`, bit 3.
    pub const EXEV2CPT: &FieldSpec = &super::REGISTERS[24].fields[3];
    /// `EXEV3CPT`, bit 4.
    pub const EXEV3CPT: &FieldSpec = &super::REGISTERS[24].fields[4];
    /// `EXEV4CPT`, bit 5.
    pub const EXEV4CPT: &FieldSpec = &super::REGISTERS[24].fields[5];
    /// `EXEV5CPT`, bit 6.
    pub const EXEV5CPT: &FieldSpec = &super::REGISTERS[24].fields[6];
    /// `EXEV6CPT`, bit 7.
    pub const EXEV6CPT: &FieldSpec = &super::REGISTERS[24].fields[7];
    /// `EXEV7CPT`, bit 8.
    pub const EXEV7CPT: &FieldSpec = &super::REGISTERS[24].fields[8];
    /// `EXEV8CPT`, bit 9.
    pub const EXEV8CPT: &FieldSpec = &super::REGISTERS[24].fields[9];
    /// `EXEV9CPT`, bit 10.
    pub const EXEV9CPT: &FieldSpec = &super::REGISTERS[24].fields[10];
    /// `EXEV10CPT`, bit 11.
    pub const EXEV10CPT: &FieldSpec = &super::REGISTERS[24].fields[11];
    /// `TB1SET`, bit 16.
    pub const TB1SET: &FieldSpec = &super::REGISTERS[24].fields[12];
    /// `TB1RST`, bit 17.
    pub const TB1RST: &FieldSpec = &super::REGISTERS[24].fields[13];
    /// `TBCMP1`, bit 18.
    pub const TBCMP1: &FieldSpec = &super::REGISTERS[24].fields[14];
    /// `TBCMP2`, bit 19.
    pub const TBCMP2: &FieldSpec = &super::REGISTERS[24].fields[15];
    /// `TC1SET`, bit 20.
    pub const TC1SET: &FieldSpec = &super::REGISTERS[24].fields[16];
    /// `TC1RST`, bit 21.
    pub const TC1RST: &FieldSpec = &super::REGISTERS[24].fields[17];
    /// `TCCMP1`, bit 22.
    pub const TCCMP1: &FieldSpec = &super::REGISTERS[24].fields[18];
    /// `TCCMP2`, bit 23.
    pub const TCCMP2: &FieldSpec = &super::REGISTERS[24].fields[19];
    /// `TD1SET`, bit 24.
    pub const TD1SET: &FieldSpec = &super::REGISTERS[24].fields[20];
    /// `TD1RST`, bit 25.
    pub const TD1RST: &FieldSpec = &super::REGISTERS[24].fields[21];
    /// `TDCMP1`, bit 26.
    pub const TDCMP1: &FieldSpec = &super::REGISTERS[24].fields[22];
    /// `TDCMP2`, bit 27.
    pub const TDCMP2: &FieldSpec = &super::REGISTERS[24].fields[23];
    /// `TE1SET`, bit 28.
    pub const TE1SET: &FieldSpec = &super::REGISTERS[24].fields[24];
    /// `TE1RST`, bit 29.
    pub const TE1RST: &FieldSpec = &super::REGISTERS[24].fields[25];
    /// `TECMP1`, bit 30.
    pub const TECMP1: &FieldSpec = &super::REGISTERS[24].fields[26];
    /// `TECMP2`, bit 31.
    pub const TECMP2: &FieldSpec = &super::REGISTERS[24].fields[27];
}

/// The fields of `OUTAR`.
pub mod outar {
    use super::FieldSpec;
    /// `POL1`, bit 1.
    pub const POL1: &FieldSpec = &super::REGISTERS[25].fields[0];
    /// `IDLEM1`, bit 2.
    pub const IDLEM1: &FieldSpec = &super::REGISTERS[25].fields[1];
    /// `IDLES1`, bit 3.
    pub const IDLES1: &FieldSpec = &super::REGISTERS[25].fields[2];
    /// `FAULT1`, bits 4..=5.
    pub const FAULT1: &FieldSpec = &super::REGISTERS[25].fields[3];
    /// `CHP1`, bit 6.
    pub const CHP1: &FieldSpec = &super::REGISTERS[25].fields[4];
    /// `DIDL1`, bit 7.
    pub const DIDL1: &FieldSpec = &super::REGISTERS[25].fields[5];
    /// `DTEN`, bit 8.
    pub const DTEN: &FieldSpec = &super::REGISTERS[25].fields[6];
    /// `DLYPRTEN`, bit 9.
    pub const DLYPRTEN: &FieldSpec = &super::REGISTERS[25].fields[7];
    /// `DLYPRT`, bits 10..=12.
    pub const DLYPRT: &FieldSpec = &super::REGISTERS[25].fields[8];
    /// `POL2`, bit 17.
    pub const POL2: &FieldSpec = &super::REGISTERS[25].fields[9];
    /// `IDLEM2`, bit 18.
    pub const IDLEM2: &FieldSpec = &super::REGISTERS[25].fields[10];
    /// `IDLES2`, bit 19.
    pub const IDLES2: &FieldSpec = &super::REGISTERS[25].fields[11];
    /// `FAULT2`, bits 20..=21.
    pub const FAULT2: &FieldSpec = &super::REGISTERS[25].fields[12];
    /// `CHP2`, bit 22.
    pub const CHP2: &FieldSpec = &super::REGISTERS[25].fields[13];
    /// `DIDL2`, bit 23.
    pub const DIDL2: &FieldSpec = &super::REGISTERS[25].fields[14];
}

/// The fields of `FLTAR`.
pub mod fltar {
    use super::FieldSpec;
    /// `FLT1EN`, bit 0.
    pub const FLT1EN: &FieldSpec = &super::REGISTERS[26].fields[0];
    /// `FLT2EN`, bit 1.
    pub const FLT2EN: &FieldSpec = &super::REGISTERS[26].fields[1];
    /// `FLT3EN`, bit 2.
    pub const FLT3EN: &FieldSpec = &super::REGISTERS[26].fields[2];
    /// `FLT4EN`, bit 3.
    pub const FLT4EN: &FieldSpec = &super::REGISTERS[26].fields[3];
    /// `FLT5EN`, bit 4.
    pub const FLT5EN: &FieldSpec = &super::REGISTERS[26].fields[4];
    /// `FLTLCK`, bit 31.
    pub const FLTLCK: &FieldSpec = &super::REGISTERS[26].fields[5];
}

/// The register table.
pub static REGISTERS: [RegisterSpec; 27] = [
    RegisterSpec { name: "TIMACR", offset: 0x0, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "CK_PSCx", bit: 0, width: 3, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CONT", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "RETRIG", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "HALF", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PSHPLL", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SYNCRSTx", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SYNCSTRTx", bit: 11, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DELCMP2", bit: 12, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DELCMP4", bit: 14, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TxREPU", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TxRSTU", bit: 18, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TBU", bit: 20, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TCU", bit: 21, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TDU", bit: 22, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TEU", bit: 23, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MSTU", bit: 24, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DACSYNC", bit: 25, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PREEN", bit: 27, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "UPDGAT", bit: 28, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "TIMAISR", offset: 0x4, width: Width::W32, reset: 0x0000_0000, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "CMP1", bit: 0, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP2", bit: 1, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP3", bit: 2, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP4", bit: 3, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "REP", bit: 4, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "UPD", bit: 6, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CPT1", bit: 7, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CPT2", bit: 8, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SETx1", bit: 9, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "RSTx1", bit: 10, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SETx2", bit: 11, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "RSTx2", bit: 12, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "RST", bit: 13, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DLYPRT", bit: 14, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CPPSTAT", bit: 16, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "IPPSTAT", bit: 17, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "O1STAT", bit: 18, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "O2STAT", bit: 19, width: 1, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "TIMAICR", offset: 0x8, width: Width::W32, reset: 0x0000_0000, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "CMP1C", bit: 0, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP2C", bit: 1, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP3C", bit: 2, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP4C", bit: 3, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "REPC", bit: 4, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "UPDC", bit: 6, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CPT1C", bit: 7, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CPT2C", bit: 8, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SET1xC", bit: 9, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "RSTx1C", bit: 10, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SET2xC", bit: 11, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "RSTx2C", bit: 12, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "RSTC", bit: 13, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DLYPRTC", bit: 14, width: 1, access: Access::WriteOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "TIMADIER5", offset: 0xC, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "CMP1IE", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP2IE", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP3IE", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP4IE", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "REPIE", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "UPDIE", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CPT1IE", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CPT2IE", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SET1xIE", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "RSTx1IE", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SETx2IE", bit: 11, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "RSTx2IE", bit: 12, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "RSTIE", bit: 13, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DLYPRTIE", bit: 14, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP1DE", bit: 16, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP2DE", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP3DE", bit: 18, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP4DE", bit: 19, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "REPDE", bit: 20, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "UPDDE", bit: 22, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CPT1DE", bit: 23, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CPT2DE", bit: 24, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SET1xDE", bit: 25, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "RSTx1DE", bit: 26, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SETx2DE", bit: 27, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "RSTx2DE", bit: 28, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "RSTDE", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DLYPRTDE", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "CNTAR", offset: 0x10, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "CNTx", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "PERAR", offset: 0x14, width: Width::W32, reset: 0x0000_FFFF, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "PERx", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "REPAR", offset: 0x18, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "REPx", bit: 0, width: 8, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "CMP1AR", offset: 0x1C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "CMP1x", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "CMP1CAR", offset: 0x20, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "CMP1x", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "REPx", bit: 16, width: 8, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "CMP2AR", offset: 0x24, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "CMP2x", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "CMP3AR", offset: 0x28, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "CMP3x", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "CMP4AR", offset: 0x2C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "CMP4x", bit: 0, width: 16, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "CPT1AR", offset: 0x30, width: Width::W32, reset: 0x0000_0000, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "CPT1x", bit: 0, width: 16, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "CPT2AR", offset: 0x34, width: Width::W32, reset: 0x0000_0000, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "CPT2x", bit: 0, width: 16, access: Access::ReadOnly, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "DTAR", offset: 0x38, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "DTRx", bit: 0, width: 9, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SDTRx", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTPRSC", bit: 10, width: 3, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTRSLKx", bit: 14, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTRLKx", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTFx", bit: 16, width: 9, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "SDTFx", bit: 25, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTFSLKx", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTFLKx", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "SETA1R", offset: 0x3C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "SST", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "RESYNC", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PER", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP1", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP2", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP3", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP4", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MSTPER", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MSTCMP1", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MSTCMP2", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MSTCMP3", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MSTCMP4", bit: 11, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT1", bit: 12, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT2", bit: 13, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT3", bit: 14, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT4", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT5", bit: 16, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT6", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT7", bit: 18, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT8", bit: 19, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT9", bit: 20, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT1", bit: 21, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT2", bit: 22, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT3", bit: 23, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT4", bit: 24, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT5", bit: 25, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT6", bit: 26, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT7", bit: 27, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT8", bit: 28, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT9", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT10", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "UPDATE", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "RSTA1R", offset: 0x40, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "SRT", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "RESYNC", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PER", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP1", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP2", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP3", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP4", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MSTPER", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MSTCMP1", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MSTCMP2", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MSTCMP3", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MSTCMP4", bit: 11, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT1", bit: 12, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT2", bit: 13, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT3", bit: 14, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT4", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT5", bit: 16, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT6", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT7", bit: 18, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT8", bit: 19, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT9", bit: 20, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT1", bit: 21, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT2", bit: 22, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT3", bit: 23, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT4", bit: 24, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT5", bit: 25, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT6", bit: 26, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT7", bit: 27, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT8", bit: 28, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT9", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT10", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "UPDATE", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "SETA2R", offset: 0x44, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "SST", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "RESYNC", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PER", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP1", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP2", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP3", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP4", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MSTPER", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MSTCMP1", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MSTCMP2", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MSTCMP3", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MSTCMP4", bit: 11, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT1", bit: 12, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT2", bit: 13, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT3", bit: 14, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT4", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT5", bit: 16, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT6", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT7", bit: 18, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT8", bit: 19, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT9", bit: 20, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT1", bit: 21, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT2", bit: 22, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT3", bit: 23, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT4", bit: 24, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT5", bit: 25, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT6", bit: 26, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT7", bit: 27, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT8", bit: 28, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT9", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT10", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "UPDATE", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "RSTA2R", offset: 0x48, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "SRT", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "RESYNC", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "PER", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP1", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP2", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP3", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP4", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MSTPER", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MSTCMP1", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MSTCMP2", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MSTCMP3", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MSTCMP4", bit: 11, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT1", bit: 12, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT2", bit: 13, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT3", bit: 14, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT4", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT5", bit: 16, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT6", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT7", bit: 18, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT8", bit: 19, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMEVNT9", bit: 20, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT1", bit: 21, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT2", bit: 22, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT3", bit: 23, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT4", bit: 24, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT5", bit: 25, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT6", bit: 26, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT7", bit: 27, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT8", bit: 28, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT9", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT10", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "UPDATE", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "EEFAR1", offset: 0x4C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "EE1LTCH", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EE1FLTR", bit: 1, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EE2LTCH", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EE2FLTR", bit: 7, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EE3LTCH", bit: 12, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EE3FLTR", bit: 13, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EE4LTCH", bit: 18, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EE4FLTR", bit: 19, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EE5LTCH", bit: 24, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EE5FLTR", bit: 25, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "EEFAR2", offset: 0x50, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "EE6LTCH", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EE6FLTR", bit: 1, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EE7LTCH", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EE7FLTR", bit: 7, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EE8LTCH", bit: 12, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EE8FLTR", bit: 13, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EE9LTCH", bit: 18, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EE9FLTR", bit: 19, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EE10LTCH", bit: 24, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EE10FLTR", bit: 25, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "RSTAR", offset: 0x54, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "UPDT", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP2", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CMP4", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MSTPER", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MSTCMP1", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MSTCMP2", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MSTCMP3", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "MSTCMP4", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT1", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT2", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT3", bit: 11, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT4", bit: 12, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT5", bit: 13, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT6", bit: 14, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT7", bit: 15, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT8", bit: 16, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT9", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXTEVNT10", bit: 18, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMBCMP1", bit: 19, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMBCMP2", bit: 20, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMBCMP4", bit: 21, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMCCMP1", bit: 22, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMCCMP2", bit: 23, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMCCMP4", bit: 24, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMDCMP1", bit: 25, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMDCMP2", bit: 26, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMDCMP4", bit: 27, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMECMP1", bit: 28, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMECMP2", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TIMECMP4", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "CHPAR", offset: 0x58, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "CHPFRQ", bit: 0, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHPDTY", bit: 4, width: 3, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "STRTPW", bit: 7, width: 4, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "CPT1ACR", offset: 0x5C, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "SWCPT", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "UDPCPT", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXEV1CPT", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXEV2CPT", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXEV3CPT", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXEV4CPT", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXEV5CPT", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXEV6CPT", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXEV7CPT", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXEV8CPT", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXEV9CPT", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXEV10CPT", bit: 11, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TB1SET", bit: 16, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TB1RST", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TBCMP1", bit: 18, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TBCMP2", bit: 19, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TC1SET", bit: 20, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TC1RST", bit: 21, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TCCMP1", bit: 22, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TCCMP2", bit: 23, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TD1SET", bit: 24, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TD1RST", bit: 25, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TDCMP1", bit: 26, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TDCMP2", bit: 27, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TE1SET", bit: 28, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TE1RST", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TECMP1", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TECMP2", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "CPT2ACR", offset: 0x60, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "SWCPT", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "UDPCPT", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXEV1CPT", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXEV2CPT", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXEV3CPT", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXEV4CPT", bit: 5, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXEV5CPT", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXEV6CPT", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXEV7CPT", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXEV8CPT", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXEV9CPT", bit: 10, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "EXEV10CPT", bit: 11, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TB1SET", bit: 16, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TB1RST", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TBCMP1", bit: 18, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TBCMP2", bit: 19, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TC1SET", bit: 20, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TC1RST", bit: 21, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TCCMP1", bit: 22, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TCCMP2", bit: 23, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TD1SET", bit: 24, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TD1RST", bit: 25, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TDCMP1", bit: 26, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TDCMP2", bit: 27, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TE1SET", bit: 28, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TE1RST", bit: 29, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TECMP1", bit: 30, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "TECMP2", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "OUTAR", offset: 0x64, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "POL1", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "IDLEM1", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "IDLES1", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FAULT1", bit: 4, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHP1", bit: 6, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DIDL1", bit: 7, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DTEN", bit: 8, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DLYPRTEN", bit: 9, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DLYPRT", bit: 10, width: 3, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "POL2", bit: 17, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "IDLEM2", bit: 18, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "IDLES2", bit: 19, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FAULT2", bit: 20, width: 2, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "CHP2", bit: 22, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "DIDL2", bit: 23, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
    RegisterSpec { name: "FLTAR", offset: 0x68, width: Width::W32, reset: 0x0000_0000, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None, fields: &[
        FieldSpec { name: "FLT1EN", bit: 0, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FLT2EN", bit: 1, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FLT3EN", bit: 2, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FLT4EN", bit: 3, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FLT5EN", bit: 4, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
        FieldSpec { name: "FLTLCK", bit: 31, width: 1, access: Access::ReadWrite, read: ReadAction::None, write: WriteModify::None },
    ] },
];