efm32g230_pac/vcmp/
ctrl.rs

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1#[doc = "Register `CTRL` reader"]
2pub struct R(crate::R<CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTRL` writer"]
17pub struct W(crate::W<CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `EN` reader - Voltage Supply Comparator Enable"]
38pub type EN_R = crate::BitReader<bool>;
39#[doc = "Field `EN` writer - Voltage Supply Comparator Enable"]
40pub type EN_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 0>;
41#[doc = "Field `INACTVAL` reader - Inactive Value"]
42pub type INACTVAL_R = crate::BitReader<bool>;
43#[doc = "Field `INACTVAL` writer - Inactive Value"]
44pub type INACTVAL_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 2>;
45#[doc = "Field `HYSTEN` reader - Hysteresis Enable"]
46pub type HYSTEN_R = crate::BitReader<bool>;
47#[doc = "Field `HYSTEN` writer - Hysteresis Enable"]
48pub type HYSTEN_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 4>;
49#[doc = "Warm-Up Time\n\nValue on reset: 0"]
50#[derive(Clone, Copy, Debug, PartialEq)]
51#[repr(u8)]
52pub enum WARMTIME_A {
53    #[doc = "0: 4 HFPERCLK cycles"]
54    _4CYCLES = 0,
55    #[doc = "1: 8 HFPERCLK cycles"]
56    _8CYCLES = 1,
57    #[doc = "2: 16 HFPERCLK cycles"]
58    _16CYCLES = 2,
59    #[doc = "3: 32 HFPERCLK cycles"]
60    _32CYCLES = 3,
61    #[doc = "4: 64 HFPERCLK cycles"]
62    _64CYCLES = 4,
63    #[doc = "5: 128 HFPERCLK cycles"]
64    _128CYCLES = 5,
65    #[doc = "6: 256 HFPERCLK cycles"]
66    _256CYCLES = 6,
67    #[doc = "7: 512 HFPERCLK cycles"]
68    _512CYCLES = 7,
69}
70impl From<WARMTIME_A> for u8 {
71    #[inline(always)]
72    fn from(variant: WARMTIME_A) -> Self {
73        variant as _
74    }
75}
76#[doc = "Field `WARMTIME` reader - Warm-Up Time"]
77pub type WARMTIME_R = crate::FieldReader<u8, WARMTIME_A>;
78impl WARMTIME_R {
79    #[doc = "Get enumerated values variant"]
80    #[inline(always)]
81    pub fn variant(&self) -> WARMTIME_A {
82        match self.bits {
83            0 => WARMTIME_A::_4CYCLES,
84            1 => WARMTIME_A::_8CYCLES,
85            2 => WARMTIME_A::_16CYCLES,
86            3 => WARMTIME_A::_32CYCLES,
87            4 => WARMTIME_A::_64CYCLES,
88            5 => WARMTIME_A::_128CYCLES,
89            6 => WARMTIME_A::_256CYCLES,
90            7 => WARMTIME_A::_512CYCLES,
91            _ => unreachable!(),
92        }
93    }
94    #[doc = "Checks if the value of the field is `_4CYCLES`"]
95    #[inline(always)]
96    pub fn is_4cycles(&self) -> bool {
97        *self == WARMTIME_A::_4CYCLES
98    }
99    #[doc = "Checks if the value of the field is `_8CYCLES`"]
100    #[inline(always)]
101    pub fn is_8cycles(&self) -> bool {
102        *self == WARMTIME_A::_8CYCLES
103    }
104    #[doc = "Checks if the value of the field is `_16CYCLES`"]
105    #[inline(always)]
106    pub fn is_16cycles(&self) -> bool {
107        *self == WARMTIME_A::_16CYCLES
108    }
109    #[doc = "Checks if the value of the field is `_32CYCLES`"]
110    #[inline(always)]
111    pub fn is_32cycles(&self) -> bool {
112        *self == WARMTIME_A::_32CYCLES
113    }
114    #[doc = "Checks if the value of the field is `_64CYCLES`"]
115    #[inline(always)]
116    pub fn is_64cycles(&self) -> bool {
117        *self == WARMTIME_A::_64CYCLES
118    }
119    #[doc = "Checks if the value of the field is `_128CYCLES`"]
120    #[inline(always)]
121    pub fn is_128cycles(&self) -> bool {
122        *self == WARMTIME_A::_128CYCLES
123    }
124    #[doc = "Checks if the value of the field is `_256CYCLES`"]
125    #[inline(always)]
126    pub fn is_256cycles(&self) -> bool {
127        *self == WARMTIME_A::_256CYCLES
128    }
129    #[doc = "Checks if the value of the field is `_512CYCLES`"]
130    #[inline(always)]
131    pub fn is_512cycles(&self) -> bool {
132        *self == WARMTIME_A::_512CYCLES
133    }
134}
135#[doc = "Field `WARMTIME` writer - Warm-Up Time"]
136pub type WARMTIME_W<'a> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, WARMTIME_A, 3, 8>;
137impl<'a> WARMTIME_W<'a> {
138    #[doc = "4 HFPERCLK cycles"]
139    #[inline(always)]
140    pub fn _4cycles(self) -> &'a mut W {
141        self.variant(WARMTIME_A::_4CYCLES)
142    }
143    #[doc = "8 HFPERCLK cycles"]
144    #[inline(always)]
145    pub fn _8cycles(self) -> &'a mut W {
146        self.variant(WARMTIME_A::_8CYCLES)
147    }
148    #[doc = "16 HFPERCLK cycles"]
149    #[inline(always)]
150    pub fn _16cycles(self) -> &'a mut W {
151        self.variant(WARMTIME_A::_16CYCLES)
152    }
153    #[doc = "32 HFPERCLK cycles"]
154    #[inline(always)]
155    pub fn _32cycles(self) -> &'a mut W {
156        self.variant(WARMTIME_A::_32CYCLES)
157    }
158    #[doc = "64 HFPERCLK cycles"]
159    #[inline(always)]
160    pub fn _64cycles(self) -> &'a mut W {
161        self.variant(WARMTIME_A::_64CYCLES)
162    }
163    #[doc = "128 HFPERCLK cycles"]
164    #[inline(always)]
165    pub fn _128cycles(self) -> &'a mut W {
166        self.variant(WARMTIME_A::_128CYCLES)
167    }
168    #[doc = "256 HFPERCLK cycles"]
169    #[inline(always)]
170    pub fn _256cycles(self) -> &'a mut W {
171        self.variant(WARMTIME_A::_256CYCLES)
172    }
173    #[doc = "512 HFPERCLK cycles"]
174    #[inline(always)]
175    pub fn _512cycles(self) -> &'a mut W {
176        self.variant(WARMTIME_A::_512CYCLES)
177    }
178}
179#[doc = "Field `IRISE` reader - Rising Edge Interrupt Sense"]
180pub type IRISE_R = crate::BitReader<bool>;
181#[doc = "Field `IRISE` writer - Rising Edge Interrupt Sense"]
182pub type IRISE_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 16>;
183#[doc = "Field `IFALL` reader - Falling Edge Interrupt Sense"]
184pub type IFALL_R = crate::BitReader<bool>;
185#[doc = "Field `IFALL` writer - Falling Edge Interrupt Sense"]
186pub type IFALL_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 17>;
187#[doc = "Field `BIASPROG` reader - VCMP Bias Programming Value"]
188pub type BIASPROG_R = crate::FieldReader<u8, u8>;
189#[doc = "Field `BIASPROG` writer - VCMP Bias Programming Value"]
190pub type BIASPROG_W<'a> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, u8, 4, 24>;
191#[doc = "Field `HALFBIAS` reader - Half Bias Current"]
192pub type HALFBIAS_R = crate::BitReader<bool>;
193#[doc = "Field `HALFBIAS` writer - Half Bias Current"]
194pub type HALFBIAS_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 30>;
195impl R {
196    #[doc = "Bit 0 - Voltage Supply Comparator Enable"]
197    #[inline(always)]
198    pub fn en(&self) -> EN_R {
199        EN_R::new((self.bits & 1) != 0)
200    }
201    #[doc = "Bit 2 - Inactive Value"]
202    #[inline(always)]
203    pub fn inactval(&self) -> INACTVAL_R {
204        INACTVAL_R::new(((self.bits >> 2) & 1) != 0)
205    }
206    #[doc = "Bit 4 - Hysteresis Enable"]
207    #[inline(always)]
208    pub fn hysten(&self) -> HYSTEN_R {
209        HYSTEN_R::new(((self.bits >> 4) & 1) != 0)
210    }
211    #[doc = "Bits 8:10 - Warm-Up Time"]
212    #[inline(always)]
213    pub fn warmtime(&self) -> WARMTIME_R {
214        WARMTIME_R::new(((self.bits >> 8) & 7) as u8)
215    }
216    #[doc = "Bit 16 - Rising Edge Interrupt Sense"]
217    #[inline(always)]
218    pub fn irise(&self) -> IRISE_R {
219        IRISE_R::new(((self.bits >> 16) & 1) != 0)
220    }
221    #[doc = "Bit 17 - Falling Edge Interrupt Sense"]
222    #[inline(always)]
223    pub fn ifall(&self) -> IFALL_R {
224        IFALL_R::new(((self.bits >> 17) & 1) != 0)
225    }
226    #[doc = "Bits 24:27 - VCMP Bias Programming Value"]
227    #[inline(always)]
228    pub fn biasprog(&self) -> BIASPROG_R {
229        BIASPROG_R::new(((self.bits >> 24) & 0x0f) as u8)
230    }
231    #[doc = "Bit 30 - Half Bias Current"]
232    #[inline(always)]
233    pub fn halfbias(&self) -> HALFBIAS_R {
234        HALFBIAS_R::new(((self.bits >> 30) & 1) != 0)
235    }
236}
237impl W {
238    #[doc = "Bit 0 - Voltage Supply Comparator Enable"]
239    #[inline(always)]
240    pub fn en(&mut self) -> EN_W {
241        EN_W::new(self)
242    }
243    #[doc = "Bit 2 - Inactive Value"]
244    #[inline(always)]
245    pub fn inactval(&mut self) -> INACTVAL_W {
246        INACTVAL_W::new(self)
247    }
248    #[doc = "Bit 4 - Hysteresis Enable"]
249    #[inline(always)]
250    pub fn hysten(&mut self) -> HYSTEN_W {
251        HYSTEN_W::new(self)
252    }
253    #[doc = "Bits 8:10 - Warm-Up Time"]
254    #[inline(always)]
255    pub fn warmtime(&mut self) -> WARMTIME_W {
256        WARMTIME_W::new(self)
257    }
258    #[doc = "Bit 16 - Rising Edge Interrupt Sense"]
259    #[inline(always)]
260    pub fn irise(&mut self) -> IRISE_W {
261        IRISE_W::new(self)
262    }
263    #[doc = "Bit 17 - Falling Edge Interrupt Sense"]
264    #[inline(always)]
265    pub fn ifall(&mut self) -> IFALL_W {
266        IFALL_W::new(self)
267    }
268    #[doc = "Bits 24:27 - VCMP Bias Programming Value"]
269    #[inline(always)]
270    pub fn biasprog(&mut self) -> BIASPROG_W {
271        BIASPROG_W::new(self)
272    }
273    #[doc = "Bit 30 - Half Bias Current"]
274    #[inline(always)]
275    pub fn halfbias(&mut self) -> HALFBIAS_W {
276        HALFBIAS_W::new(self)
277    }
278    #[doc = "Writes raw bits to the register."]
279    #[inline(always)]
280    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
281        self.0.bits(bits);
282        self
283    }
284}
285#[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"]
286pub struct CTRL_SPEC;
287impl crate::RegisterSpec for CTRL_SPEC {
288    type Ux = u32;
289}
290#[doc = "`read()` method returns [ctrl::R](R) reader structure"]
291impl crate::Readable for CTRL_SPEC {
292    type Reader = R;
293}
294#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"]
295impl crate::Writable for CTRL_SPEC {
296    type Writer = W;
297}
298#[doc = "`reset()` method sets CTRL to value 0x4700_0000"]
299impl crate::Resettable for CTRL_SPEC {
300    #[inline(always)]
301    fn reset_value() -> Self::Ux {
302        0x4700_0000
303    }
304}
efm32g230_pac/vcmp/ctrl.rs

efm32g230_pac/vcmp/
ctrl.rs
