1#[doc = "Register `CTRL` reader"]
2pub struct R(crate::R<CTRL_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<CTRL_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<CTRL_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<CTRL_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `CTRL` writer"]
17pub struct W(crate::W<CTRL_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<CTRL_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<CTRL_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<CTRL_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `EN` reader - Analog Comparator Enable"]
38pub type EN_R = crate::BitReader<bool>;
39#[doc = "Field `EN` writer - Analog Comparator Enable"]
40pub type EN_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 0>;
41#[doc = "Field `MUXEN` reader - Input Mux Enable"]
42pub type MUXEN_R = crate::BitReader<bool>;
43#[doc = "Field `MUXEN` writer - Input Mux Enable"]
44pub type MUXEN_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 1>;
45#[doc = "Field `INACTVAL` reader - Inactive Value"]
46pub type INACTVAL_R = crate::BitReader<bool>;
47#[doc = "Field `INACTVAL` writer - Inactive Value"]
48pub type INACTVAL_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 2>;
49#[doc = "Field `GPIOINV` reader - Comparator GPIO Output Invert"]
50pub type GPIOINV_R = crate::BitReader<bool>;
51#[doc = "Field `GPIOINV` writer - Comparator GPIO Output Invert"]
52pub type GPIOINV_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 3>;
53#[doc = "Hysteresis Select\n\nValue on reset: 0"]
54#[derive(Clone, Copy, Debug, PartialEq)]
55#[repr(u8)]
56pub enum HYSTSEL_A {
57 #[doc = "0: No hysteresis."]
58 HYST0 = 0,
59 #[doc = "1: ~15 mV hysteresis."]
60 HYST1 = 1,
61 #[doc = "2: ~22 mV hysteresis."]
62 HYST2 = 2,
63 #[doc = "3: ~29 mV hysteresis."]
64 HYST3 = 3,
65 #[doc = "4: ~36 mV hysteresis."]
66 HYST4 = 4,
67 #[doc = "5: ~43 mV hysteresis."]
68 HYST5 = 5,
69 #[doc = "6: ~50 mV hysteresis."]
70 HYST6 = 6,
71 #[doc = "7: ~57 mV hysteresis."]
72 HYST7 = 7,
73}
74impl From<HYSTSEL_A> for u8 {
75 #[inline(always)]
76 fn from(variant: HYSTSEL_A) -> Self {
77 variant as _
78 }
79}
80#[doc = "Field `HYSTSEL` reader - Hysteresis Select"]
81pub type HYSTSEL_R = crate::FieldReader<u8, HYSTSEL_A>;
82impl HYSTSEL_R {
83 #[doc = "Get enumerated values variant"]
84 #[inline(always)]
85 pub fn variant(&self) -> HYSTSEL_A {
86 match self.bits {
87 0 => HYSTSEL_A::HYST0,
88 1 => HYSTSEL_A::HYST1,
89 2 => HYSTSEL_A::HYST2,
90 3 => HYSTSEL_A::HYST3,
91 4 => HYSTSEL_A::HYST4,
92 5 => HYSTSEL_A::HYST5,
93 6 => HYSTSEL_A::HYST6,
94 7 => HYSTSEL_A::HYST7,
95 _ => unreachable!(),
96 }
97 }
98 #[doc = "Checks if the value of the field is `HYST0`"]
99 #[inline(always)]
100 pub fn is_hyst0(&self) -> bool {
101 *self == HYSTSEL_A::HYST0
102 }
103 #[doc = "Checks if the value of the field is `HYST1`"]
104 #[inline(always)]
105 pub fn is_hyst1(&self) -> bool {
106 *self == HYSTSEL_A::HYST1
107 }
108 #[doc = "Checks if the value of the field is `HYST2`"]
109 #[inline(always)]
110 pub fn is_hyst2(&self) -> bool {
111 *self == HYSTSEL_A::HYST2
112 }
113 #[doc = "Checks if the value of the field is `HYST3`"]
114 #[inline(always)]
115 pub fn is_hyst3(&self) -> bool {
116 *self == HYSTSEL_A::HYST3
117 }
118 #[doc = "Checks if the value of the field is `HYST4`"]
119 #[inline(always)]
120 pub fn is_hyst4(&self) -> bool {
121 *self == HYSTSEL_A::HYST4
122 }
123 #[doc = "Checks if the value of the field is `HYST5`"]
124 #[inline(always)]
125 pub fn is_hyst5(&self) -> bool {
126 *self == HYSTSEL_A::HYST5
127 }
128 #[doc = "Checks if the value of the field is `HYST6`"]
129 #[inline(always)]
130 pub fn is_hyst6(&self) -> bool {
131 *self == HYSTSEL_A::HYST6
132 }
133 #[doc = "Checks if the value of the field is `HYST7`"]
134 #[inline(always)]
135 pub fn is_hyst7(&self) -> bool {
136 *self == HYSTSEL_A::HYST7
137 }
138}
139#[doc = "Field `HYSTSEL` writer - Hysteresis Select"]
140pub type HYSTSEL_W<'a> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, HYSTSEL_A, 3, 4>;
141impl<'a> HYSTSEL_W<'a> {
142 #[doc = "No hysteresis."]
143 #[inline(always)]
144 pub fn hyst0(self) -> &'a mut W {
145 self.variant(HYSTSEL_A::HYST0)
146 }
147 #[doc = "~15 mV hysteresis."]
148 #[inline(always)]
149 pub fn hyst1(self) -> &'a mut W {
150 self.variant(HYSTSEL_A::HYST1)
151 }
152 #[doc = "~22 mV hysteresis."]
153 #[inline(always)]
154 pub fn hyst2(self) -> &'a mut W {
155 self.variant(HYSTSEL_A::HYST2)
156 }
157 #[doc = "~29 mV hysteresis."]
158 #[inline(always)]
159 pub fn hyst3(self) -> &'a mut W {
160 self.variant(HYSTSEL_A::HYST3)
161 }
162 #[doc = "~36 mV hysteresis."]
163 #[inline(always)]
164 pub fn hyst4(self) -> &'a mut W {
165 self.variant(HYSTSEL_A::HYST4)
166 }
167 #[doc = "~43 mV hysteresis."]
168 #[inline(always)]
169 pub fn hyst5(self) -> &'a mut W {
170 self.variant(HYSTSEL_A::HYST5)
171 }
172 #[doc = "~50 mV hysteresis."]
173 #[inline(always)]
174 pub fn hyst6(self) -> &'a mut W {
175 self.variant(HYSTSEL_A::HYST6)
176 }
177 #[doc = "~57 mV hysteresis."]
178 #[inline(always)]
179 pub fn hyst7(self) -> &'a mut W {
180 self.variant(HYSTSEL_A::HYST7)
181 }
182}
183#[doc = "Warm-up Time\n\nValue on reset: 0"]
184#[derive(Clone, Copy, Debug, PartialEq)]
185#[repr(u8)]
186pub enum WARMTIME_A {
187 #[doc = "0: 4 HFPERCLK cycles."]
188 _4CYCLES = 0,
189 #[doc = "1: 8 HFPERCLK cycles."]
190 _8CYCLES = 1,
191 #[doc = "2: 16 HFPERCLK cycles."]
192 _16CYCLES = 2,
193 #[doc = "3: 32 HFPERCLK cycles."]
194 _32CYCLES = 3,
195 #[doc = "4: 64 HFPERCLK cycles."]
196 _64CYCLES = 4,
197 #[doc = "5: 128 HFPERCLK cycles."]
198 _128CYCLES = 5,
199 #[doc = "6: 256 HFPERCLK cycles."]
200 _256CYCLES = 6,
201 #[doc = "7: 512 HFPERCLK cycles."]
202 _512CYCLES = 7,
203}
204impl From<WARMTIME_A> for u8 {
205 #[inline(always)]
206 fn from(variant: WARMTIME_A) -> Self {
207 variant as _
208 }
209}
210#[doc = "Field `WARMTIME` reader - Warm-up Time"]
211pub type WARMTIME_R = crate::FieldReader<u8, WARMTIME_A>;
212impl WARMTIME_R {
213 #[doc = "Get enumerated values variant"]
214 #[inline(always)]
215 pub fn variant(&self) -> WARMTIME_A {
216 match self.bits {
217 0 => WARMTIME_A::_4CYCLES,
218 1 => WARMTIME_A::_8CYCLES,
219 2 => WARMTIME_A::_16CYCLES,
220 3 => WARMTIME_A::_32CYCLES,
221 4 => WARMTIME_A::_64CYCLES,
222 5 => WARMTIME_A::_128CYCLES,
223 6 => WARMTIME_A::_256CYCLES,
224 7 => WARMTIME_A::_512CYCLES,
225 _ => unreachable!(),
226 }
227 }
228 #[doc = "Checks if the value of the field is `_4CYCLES`"]
229 #[inline(always)]
230 pub fn is_4cycles(&self) -> bool {
231 *self == WARMTIME_A::_4CYCLES
232 }
233 #[doc = "Checks if the value of the field is `_8CYCLES`"]
234 #[inline(always)]
235 pub fn is_8cycles(&self) -> bool {
236 *self == WARMTIME_A::_8CYCLES
237 }
238 #[doc = "Checks if the value of the field is `_16CYCLES`"]
239 #[inline(always)]
240 pub fn is_16cycles(&self) -> bool {
241 *self == WARMTIME_A::_16CYCLES
242 }
243 #[doc = "Checks if the value of the field is `_32CYCLES`"]
244 #[inline(always)]
245 pub fn is_32cycles(&self) -> bool {
246 *self == WARMTIME_A::_32CYCLES
247 }
248 #[doc = "Checks if the value of the field is `_64CYCLES`"]
249 #[inline(always)]
250 pub fn is_64cycles(&self) -> bool {
251 *self == WARMTIME_A::_64CYCLES
252 }
253 #[doc = "Checks if the value of the field is `_128CYCLES`"]
254 #[inline(always)]
255 pub fn is_128cycles(&self) -> bool {
256 *self == WARMTIME_A::_128CYCLES
257 }
258 #[doc = "Checks if the value of the field is `_256CYCLES`"]
259 #[inline(always)]
260 pub fn is_256cycles(&self) -> bool {
261 *self == WARMTIME_A::_256CYCLES
262 }
263 #[doc = "Checks if the value of the field is `_512CYCLES`"]
264 #[inline(always)]
265 pub fn is_512cycles(&self) -> bool {
266 *self == WARMTIME_A::_512CYCLES
267 }
268}
269#[doc = "Field `WARMTIME` writer - Warm-up Time"]
270pub type WARMTIME_W<'a> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, WARMTIME_A, 3, 8>;
271impl<'a> WARMTIME_W<'a> {
272 #[doc = "4 HFPERCLK cycles."]
273 #[inline(always)]
274 pub fn _4cycles(self) -> &'a mut W {
275 self.variant(WARMTIME_A::_4CYCLES)
276 }
277 #[doc = "8 HFPERCLK cycles."]
278 #[inline(always)]
279 pub fn _8cycles(self) -> &'a mut W {
280 self.variant(WARMTIME_A::_8CYCLES)
281 }
282 #[doc = "16 HFPERCLK cycles."]
283 #[inline(always)]
284 pub fn _16cycles(self) -> &'a mut W {
285 self.variant(WARMTIME_A::_16CYCLES)
286 }
287 #[doc = "32 HFPERCLK cycles."]
288 #[inline(always)]
289 pub fn _32cycles(self) -> &'a mut W {
290 self.variant(WARMTIME_A::_32CYCLES)
291 }
292 #[doc = "64 HFPERCLK cycles."]
293 #[inline(always)]
294 pub fn _64cycles(self) -> &'a mut W {
295 self.variant(WARMTIME_A::_64CYCLES)
296 }
297 #[doc = "128 HFPERCLK cycles."]
298 #[inline(always)]
299 pub fn _128cycles(self) -> &'a mut W {
300 self.variant(WARMTIME_A::_128CYCLES)
301 }
302 #[doc = "256 HFPERCLK cycles."]
303 #[inline(always)]
304 pub fn _256cycles(self) -> &'a mut W {
305 self.variant(WARMTIME_A::_256CYCLES)
306 }
307 #[doc = "512 HFPERCLK cycles."]
308 #[inline(always)]
309 pub fn _512cycles(self) -> &'a mut W {
310 self.variant(WARMTIME_A::_512CYCLES)
311 }
312}
313#[doc = "Field `IRISE` reader - Rising Edge Interrupt Sense"]
314pub type IRISE_R = crate::BitReader<bool>;
315#[doc = "Field `IRISE` writer - Rising Edge Interrupt Sense"]
316pub type IRISE_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 16>;
317#[doc = "Field `IFALL` reader - Falling Edge Interrupt Sense"]
318pub type IFALL_R = crate::BitReader<bool>;
319#[doc = "Field `IFALL` writer - Falling Edge Interrupt Sense"]
320pub type IFALL_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 17>;
321#[doc = "Field `BIASPROG` reader - Bias Configuration"]
322pub type BIASPROG_R = crate::FieldReader<u8, u8>;
323#[doc = "Field `BIASPROG` writer - Bias Configuration"]
324pub type BIASPROG_W<'a> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, u8, 4, 24>;
325#[doc = "Field `HALFBIAS` reader - Half Bias Current"]
326pub type HALFBIAS_R = crate::BitReader<bool>;
327#[doc = "Field `HALFBIAS` writer - Half Bias Current"]
328pub type HALFBIAS_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 30>;
329#[doc = "Field `FULLBIAS` reader - Full Bias Current"]
330pub type FULLBIAS_R = crate::BitReader<bool>;
331#[doc = "Field `FULLBIAS` writer - Full Bias Current"]
332pub type FULLBIAS_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 31>;
333impl R {
334 #[doc = "Bit 0 - Analog Comparator Enable"]
335 #[inline(always)]
336 pub fn en(&self) -> EN_R {
337 EN_R::new((self.bits & 1) != 0)
338 }
339 #[doc = "Bit 1 - Input Mux Enable"]
340 #[inline(always)]
341 pub fn muxen(&self) -> MUXEN_R {
342 MUXEN_R::new(((self.bits >> 1) & 1) != 0)
343 }
344 #[doc = "Bit 2 - Inactive Value"]
345 #[inline(always)]
346 pub fn inactval(&self) -> INACTVAL_R {
347 INACTVAL_R::new(((self.bits >> 2) & 1) != 0)
348 }
349 #[doc = "Bit 3 - Comparator GPIO Output Invert"]
350 #[inline(always)]
351 pub fn gpioinv(&self) -> GPIOINV_R {
352 GPIOINV_R::new(((self.bits >> 3) & 1) != 0)
353 }
354 #[doc = "Bits 4:6 - Hysteresis Select"]
355 #[inline(always)]
356 pub fn hystsel(&self) -> HYSTSEL_R {
357 HYSTSEL_R::new(((self.bits >> 4) & 7) as u8)
358 }
359 #[doc = "Bits 8:10 - Warm-up Time"]
360 #[inline(always)]
361 pub fn warmtime(&self) -> WARMTIME_R {
362 WARMTIME_R::new(((self.bits >> 8) & 7) as u8)
363 }
364 #[doc = "Bit 16 - Rising Edge Interrupt Sense"]
365 #[inline(always)]
366 pub fn irise(&self) -> IRISE_R {
367 IRISE_R::new(((self.bits >> 16) & 1) != 0)
368 }
369 #[doc = "Bit 17 - Falling Edge Interrupt Sense"]
370 #[inline(always)]
371 pub fn ifall(&self) -> IFALL_R {
372 IFALL_R::new(((self.bits >> 17) & 1) != 0)
373 }
374 #[doc = "Bits 24:27 - Bias Configuration"]
375 #[inline(always)]
376 pub fn biasprog(&self) -> BIASPROG_R {
377 BIASPROG_R::new(((self.bits >> 24) & 0x0f) as u8)
378 }
379 #[doc = "Bit 30 - Half Bias Current"]
380 #[inline(always)]
381 pub fn halfbias(&self) -> HALFBIAS_R {
382 HALFBIAS_R::new(((self.bits >> 30) & 1) != 0)
383 }
384 #[doc = "Bit 31 - Full Bias Current"]
385 #[inline(always)]
386 pub fn fullbias(&self) -> FULLBIAS_R {
387 FULLBIAS_R::new(((self.bits >> 31) & 1) != 0)
388 }
389}
390impl W {
391 #[doc = "Bit 0 - Analog Comparator Enable"]
392 #[inline(always)]
393 pub fn en(&mut self) -> EN_W {
394 EN_W::new(self)
395 }
396 #[doc = "Bit 1 - Input Mux Enable"]
397 #[inline(always)]
398 pub fn muxen(&mut self) -> MUXEN_W {
399 MUXEN_W::new(self)
400 }
401 #[doc = "Bit 2 - Inactive Value"]
402 #[inline(always)]
403 pub fn inactval(&mut self) -> INACTVAL_W {
404 INACTVAL_W::new(self)
405 }
406 #[doc = "Bit 3 - Comparator GPIO Output Invert"]
407 #[inline(always)]
408 pub fn gpioinv(&mut self) -> GPIOINV_W {
409 GPIOINV_W::new(self)
410 }
411 #[doc = "Bits 4:6 - Hysteresis Select"]
412 #[inline(always)]
413 pub fn hystsel(&mut self) -> HYSTSEL_W {
414 HYSTSEL_W::new(self)
415 }
416 #[doc = "Bits 8:10 - Warm-up Time"]
417 #[inline(always)]
418 pub fn warmtime(&mut self) -> WARMTIME_W {
419 WARMTIME_W::new(self)
420 }
421 #[doc = "Bit 16 - Rising Edge Interrupt Sense"]
422 #[inline(always)]
423 pub fn irise(&mut self) -> IRISE_W {
424 IRISE_W::new(self)
425 }
426 #[doc = "Bit 17 - Falling Edge Interrupt Sense"]
427 #[inline(always)]
428 pub fn ifall(&mut self) -> IFALL_W {
429 IFALL_W::new(self)
430 }
431 #[doc = "Bits 24:27 - Bias Configuration"]
432 #[inline(always)]
433 pub fn biasprog(&mut self) -> BIASPROG_W {
434 BIASPROG_W::new(self)
435 }
436 #[doc = "Bit 30 - Half Bias Current"]
437 #[inline(always)]
438 pub fn halfbias(&mut self) -> HALFBIAS_W {
439 HALFBIAS_W::new(self)
440 }
441 #[doc = "Bit 31 - Full Bias Current"]
442 #[inline(always)]
443 pub fn fullbias(&mut self) -> FULLBIAS_W {
444 FULLBIAS_W::new(self)
445 }
446 #[doc = "Writes raw bits to the register."]
447 #[inline(always)]
448 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
449 self.0.bits(bits);
450 self
451 }
452}
453#[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"]
454pub struct CTRL_SPEC;
455impl crate::RegisterSpec for CTRL_SPEC {
456 type Ux = u32;
457}
458#[doc = "`read()` method returns [ctrl::R](R) reader structure"]
459impl crate::Readable for CTRL_SPEC {
460 type Reader = R;
461}
462#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"]
463impl crate::Writable for CTRL_SPEC {
464 type Writer = W;
465}
466#[doc = "`reset()` method sets CTRL to value 0x4700_0000"]
467impl crate::Resettable for CTRL_SPEC {
468 #[inline(always)]
469 fn reset_value() -> Self::Ux {
470 0x4700_0000
471 }
472}