efm32g230_pac/leuart0/
ctrl.rs

1#[doc = "Register `CTRL` reader"]
2pub struct R(crate::R<CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTRL` writer"]
17pub struct W(crate::W<CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `AUTOTRI` reader - Automatic Transmitter Tristate"]
38pub type AUTOTRI_R = crate::BitReader<bool>;
39#[doc = "Field `AUTOTRI` writer - Automatic Transmitter Tristate"]
40pub type AUTOTRI_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 0>;
41#[doc = "Field `DATABITS` reader - Data-Bit Mode"]
42pub type DATABITS_R = crate::BitReader<bool>;
43#[doc = "Field `DATABITS` writer - Data-Bit Mode"]
44pub type DATABITS_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 1>;
45#[doc = "Parity-Bit Mode\n\nValue on reset: 0"]
46#[derive(Clone, Copy, Debug, PartialEq)]
47#[repr(u8)]
48pub enum PARITY_A {
49    #[doc = "0: Parity bits are not used"]
50    NONE = 0,
51    #[doc = "2: Even parity are used. Parity bits are automatically generated and checked by hardware."]
52    EVEN = 2,
53    #[doc = "3: Odd parity is used. Parity bits are automatically generated and checked by hardware."]
54    ODD = 3,
55}
56impl From<PARITY_A> for u8 {
57    #[inline(always)]
58    fn from(variant: PARITY_A) -> Self {
59        variant as _
60    }
61}
62#[doc = "Field `PARITY` reader - Parity-Bit Mode"]
63pub type PARITY_R = crate::FieldReader<u8, PARITY_A>;
64impl PARITY_R {
65    #[doc = "Get enumerated values variant"]
66    #[inline(always)]
67    pub fn variant(&self) -> Option<PARITY_A> {
68        match self.bits {
69            0 => Some(PARITY_A::NONE),
70            2 => Some(PARITY_A::EVEN),
71            3 => Some(PARITY_A::ODD),
72            _ => None,
73        }
74    }
75    #[doc = "Checks if the value of the field is `NONE`"]
76    #[inline(always)]
77    pub fn is_none(&self) -> bool {
78        *self == PARITY_A::NONE
79    }
80    #[doc = "Checks if the value of the field is `EVEN`"]
81    #[inline(always)]
82    pub fn is_even(&self) -> bool {
83        *self == PARITY_A::EVEN
84    }
85    #[doc = "Checks if the value of the field is `ODD`"]
86    #[inline(always)]
87    pub fn is_odd(&self) -> bool {
88        *self == PARITY_A::ODD
89    }
90}
91#[doc = "Field `PARITY` writer - Parity-Bit Mode"]
92pub type PARITY_W<'a> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, PARITY_A, 2, 2>;
93impl<'a> PARITY_W<'a> {
94    #[doc = "Parity bits are not used"]
95    #[inline(always)]
96    pub fn none(self) -> &'a mut W {
97        self.variant(PARITY_A::NONE)
98    }
99    #[doc = "Even parity are used. Parity bits are automatically generated and checked by hardware."]
100    #[inline(always)]
101    pub fn even(self) -> &'a mut W {
102        self.variant(PARITY_A::EVEN)
103    }
104    #[doc = "Odd parity is used. Parity bits are automatically generated and checked by hardware."]
105    #[inline(always)]
106    pub fn odd(self) -> &'a mut W {
107        self.variant(PARITY_A::ODD)
108    }
109}
110#[doc = "Field `STOPBITS` reader - Stop-Bit Mode"]
111pub type STOPBITS_R = crate::BitReader<bool>;
112#[doc = "Field `STOPBITS` writer - Stop-Bit Mode"]
113pub type STOPBITS_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 4>;
114#[doc = "Field `INV` reader - Invert Input And Output"]
115pub type INV_R = crate::BitReader<bool>;
116#[doc = "Field `INV` writer - Invert Input And Output"]
117pub type INV_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 5>;
118#[doc = "Field `ERRSDMA` reader - Clear RX DMA On Error"]
119pub type ERRSDMA_R = crate::BitReader<bool>;
120#[doc = "Field `ERRSDMA` writer - Clear RX DMA On Error"]
121pub type ERRSDMA_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 6>;
122#[doc = "Field `LOOPBK` reader - Loopback Enable"]
123pub type LOOPBK_R = crate::BitReader<bool>;
124#[doc = "Field `LOOPBK` writer - Loopback Enable"]
125pub type LOOPBK_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 7>;
126#[doc = "Field `SFUBRX` reader - Start-Frame UnBlock RX"]
127pub type SFUBRX_R = crate::BitReader<bool>;
128#[doc = "Field `SFUBRX` writer - Start-Frame UnBlock RX"]
129pub type SFUBRX_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 8>;
130#[doc = "Field `MPM` reader - Multi-Processor Mode"]
131pub type MPM_R = crate::BitReader<bool>;
132#[doc = "Field `MPM` writer - Multi-Processor Mode"]
133pub type MPM_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 9>;
134#[doc = "Field `MPAB` reader - Multi-Processor Address-Bit"]
135pub type MPAB_R = crate::BitReader<bool>;
136#[doc = "Field `MPAB` writer - Multi-Processor Address-Bit"]
137pub type MPAB_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 10>;
138#[doc = "Field `BIT8DV` reader - Bit 8 Default Value"]
139pub type BIT8DV_R = crate::BitReader<bool>;
140#[doc = "Field `BIT8DV` writer - Bit 8 Default Value"]
141pub type BIT8DV_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 11>;
142#[doc = "Field `RXDMAWU` reader - RX DMA Wakeup"]
143pub type RXDMAWU_R = crate::BitReader<bool>;
144#[doc = "Field `RXDMAWU` writer - RX DMA Wakeup"]
145pub type RXDMAWU_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 12>;
146#[doc = "Field `TXDMAWU` reader - TX DMA Wakeup"]
147pub type TXDMAWU_R = crate::BitReader<bool>;
148#[doc = "Field `TXDMAWU` writer - TX DMA Wakeup"]
149pub type TXDMAWU_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 13>;
150#[doc = "TX Delay Transmission\n\nValue on reset: 0"]
151#[derive(Clone, Copy, Debug, PartialEq)]
152#[repr(u8)]
153pub enum TXDELAY_A {
154    #[doc = "0: Frames are transmitted immediately"]
155    NONE = 0,
156    #[doc = "1: Transmission of new frames are delayed by a single baud period"]
157    SINGLE = 1,
158    #[doc = "2: Transmission of new frames are delayed by two baud periods"]
159    DOUBLE = 2,
160    #[doc = "3: Transmission of new frames are delayed by three baud periods"]
161    TRIPLE = 3,
162}
163impl From<TXDELAY_A> for u8 {
164    #[inline(always)]
165    fn from(variant: TXDELAY_A) -> Self {
166        variant as _
167    }
168}
169#[doc = "Field `TXDELAY` reader - TX Delay Transmission"]
170pub type TXDELAY_R = crate::FieldReader<u8, TXDELAY_A>;
171impl TXDELAY_R {
172    #[doc = "Get enumerated values variant"]
173    #[inline(always)]
174    pub fn variant(&self) -> TXDELAY_A {
175        match self.bits {
176            0 => TXDELAY_A::NONE,
177            1 => TXDELAY_A::SINGLE,
178            2 => TXDELAY_A::DOUBLE,
179            3 => TXDELAY_A::TRIPLE,
180            _ => unreachable!(),
181        }
182    }
183    #[doc = "Checks if the value of the field is `NONE`"]
184    #[inline(always)]
185    pub fn is_none(&self) -> bool {
186        *self == TXDELAY_A::NONE
187    }
188    #[doc = "Checks if the value of the field is `SINGLE`"]
189    #[inline(always)]
190    pub fn is_single(&self) -> bool {
191        *self == TXDELAY_A::SINGLE
192    }
193    #[doc = "Checks if the value of the field is `DOUBLE`"]
194    #[inline(always)]
195    pub fn is_double(&self) -> bool {
196        *self == TXDELAY_A::DOUBLE
197    }
198    #[doc = "Checks if the value of the field is `TRIPLE`"]
199    #[inline(always)]
200    pub fn is_triple(&self) -> bool {
201        *self == TXDELAY_A::TRIPLE
202    }
203}
204#[doc = "Field `TXDELAY` writer - TX Delay Transmission"]
205pub type TXDELAY_W<'a> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, TXDELAY_A, 2, 14>;
206impl<'a> TXDELAY_W<'a> {
207    #[doc = "Frames are transmitted immediately"]
208    #[inline(always)]
209    pub fn none(self) -> &'a mut W {
210        self.variant(TXDELAY_A::NONE)
211    }
212    #[doc = "Transmission of new frames are delayed by a single baud period"]
213    #[inline(always)]
214    pub fn single(self) -> &'a mut W {
215        self.variant(TXDELAY_A::SINGLE)
216    }
217    #[doc = "Transmission of new frames are delayed by two baud periods"]
218    #[inline(always)]
219    pub fn double(self) -> &'a mut W {
220        self.variant(TXDELAY_A::DOUBLE)
221    }
222    #[doc = "Transmission of new frames are delayed by three baud periods"]
223    #[inline(always)]
224    pub fn triple(self) -> &'a mut W {
225        self.variant(TXDELAY_A::TRIPLE)
226    }
227}
228impl R {
229    #[doc = "Bit 0 - Automatic Transmitter Tristate"]
230    #[inline(always)]
231    pub fn autotri(&self) -> AUTOTRI_R {
232        AUTOTRI_R::new((self.bits & 1) != 0)
233    }
234    #[doc = "Bit 1 - Data-Bit Mode"]
235    #[inline(always)]
236    pub fn databits(&self) -> DATABITS_R {
237        DATABITS_R::new(((self.bits >> 1) & 1) != 0)
238    }
239    #[doc = "Bits 2:3 - Parity-Bit Mode"]
240    #[inline(always)]
241    pub fn parity(&self) -> PARITY_R {
242        PARITY_R::new(((self.bits >> 2) & 3) as u8)
243    }
244    #[doc = "Bit 4 - Stop-Bit Mode"]
245    #[inline(always)]
246    pub fn stopbits(&self) -> STOPBITS_R {
247        STOPBITS_R::new(((self.bits >> 4) & 1) != 0)
248    }
249    #[doc = "Bit 5 - Invert Input And Output"]
250    #[inline(always)]
251    pub fn inv(&self) -> INV_R {
252        INV_R::new(((self.bits >> 5) & 1) != 0)
253    }
254    #[doc = "Bit 6 - Clear RX DMA On Error"]
255    #[inline(always)]
256    pub fn errsdma(&self) -> ERRSDMA_R {
257        ERRSDMA_R::new(((self.bits >> 6) & 1) != 0)
258    }
259    #[doc = "Bit 7 - Loopback Enable"]
260    #[inline(always)]
261    pub fn loopbk(&self) -> LOOPBK_R {
262        LOOPBK_R::new(((self.bits >> 7) & 1) != 0)
263    }
264    #[doc = "Bit 8 - Start-Frame UnBlock RX"]
265    #[inline(always)]
266    pub fn sfubrx(&self) -> SFUBRX_R {
267        SFUBRX_R::new(((self.bits >> 8) & 1) != 0)
268    }
269    #[doc = "Bit 9 - Multi-Processor Mode"]
270    #[inline(always)]
271    pub fn mpm(&self) -> MPM_R {
272        MPM_R::new(((self.bits >> 9) & 1) != 0)
273    }
274    #[doc = "Bit 10 - Multi-Processor Address-Bit"]
275    #[inline(always)]
276    pub fn mpab(&self) -> MPAB_R {
277        MPAB_R::new(((self.bits >> 10) & 1) != 0)
278    }
279    #[doc = "Bit 11 - Bit 8 Default Value"]
280    #[inline(always)]
281    pub fn bit8dv(&self) -> BIT8DV_R {
282        BIT8DV_R::new(((self.bits >> 11) & 1) != 0)
283    }
284    #[doc = "Bit 12 - RX DMA Wakeup"]
285    #[inline(always)]
286    pub fn rxdmawu(&self) -> RXDMAWU_R {
287        RXDMAWU_R::new(((self.bits >> 12) & 1) != 0)
288    }
289    #[doc = "Bit 13 - TX DMA Wakeup"]
290    #[inline(always)]
291    pub fn txdmawu(&self) -> TXDMAWU_R {
292        TXDMAWU_R::new(((self.bits >> 13) & 1) != 0)
293    }
294    #[doc = "Bits 14:15 - TX Delay Transmission"]
295    #[inline(always)]
296    pub fn txdelay(&self) -> TXDELAY_R {
297        TXDELAY_R::new(((self.bits >> 14) & 3) as u8)
298    }
299}
300impl W {
301    #[doc = "Bit 0 - Automatic Transmitter Tristate"]
302    #[inline(always)]
303    pub fn autotri(&mut self) -> AUTOTRI_W {
304        AUTOTRI_W::new(self)
305    }
306    #[doc = "Bit 1 - Data-Bit Mode"]
307    #[inline(always)]
308    pub fn databits(&mut self) -> DATABITS_W {
309        DATABITS_W::new(self)
310    }
311    #[doc = "Bits 2:3 - Parity-Bit Mode"]
312    #[inline(always)]
313    pub fn parity(&mut self) -> PARITY_W {
314        PARITY_W::new(self)
315    }
316    #[doc = "Bit 4 - Stop-Bit Mode"]
317    #[inline(always)]
318    pub fn stopbits(&mut self) -> STOPBITS_W {
319        STOPBITS_W::new(self)
320    }
321    #[doc = "Bit 5 - Invert Input And Output"]
322    #[inline(always)]
323    pub fn inv(&mut self) -> INV_W {
324        INV_W::new(self)
325    }
326    #[doc = "Bit 6 - Clear RX DMA On Error"]
327    #[inline(always)]
328    pub fn errsdma(&mut self) -> ERRSDMA_W {
329        ERRSDMA_W::new(self)
330    }
331    #[doc = "Bit 7 - Loopback Enable"]
332    #[inline(always)]
333    pub fn loopbk(&mut self) -> LOOPBK_W {
334        LOOPBK_W::new(self)
335    }
336    #[doc = "Bit 8 - Start-Frame UnBlock RX"]
337    #[inline(always)]
338    pub fn sfubrx(&mut self) -> SFUBRX_W {
339        SFUBRX_W::new(self)
340    }
341    #[doc = "Bit 9 - Multi-Processor Mode"]
342    #[inline(always)]
343    pub fn mpm(&mut self) -> MPM_W {
344        MPM_W::new(self)
345    }
346    #[doc = "Bit 10 - Multi-Processor Address-Bit"]
347    #[inline(always)]
348    pub fn mpab(&mut self) -> MPAB_W {
349        MPAB_W::new(self)
350    }
351    #[doc = "Bit 11 - Bit 8 Default Value"]
352    #[inline(always)]
353    pub fn bit8dv(&mut self) -> BIT8DV_W {
354        BIT8DV_W::new(self)
355    }
356    #[doc = "Bit 12 - RX DMA Wakeup"]
357    #[inline(always)]
358    pub fn rxdmawu(&mut self) -> RXDMAWU_W {
359        RXDMAWU_W::new(self)
360    }
361    #[doc = "Bit 13 - TX DMA Wakeup"]
362    #[inline(always)]
363    pub fn txdmawu(&mut self) -> TXDMAWU_W {
364        TXDMAWU_W::new(self)
365    }
366    #[doc = "Bits 14:15 - TX Delay Transmission"]
367    #[inline(always)]
368    pub fn txdelay(&mut self) -> TXDELAY_W {
369        TXDELAY_W::new(self)
370    }
371    #[doc = "Writes raw bits to the register."]
372    #[inline(always)]
373    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
374        self.0.bits(bits);
375        self
376    }
377}
378#[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"]
379pub struct CTRL_SPEC;
380impl crate::RegisterSpec for CTRL_SPEC {
381    type Ux = u32;
382}
383#[doc = "`read()` method returns [ctrl::R](R) reader structure"]
384impl crate::Readable for CTRL_SPEC {
385    type Reader = R;
386}
387#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"]
388impl crate::Writable for CTRL_SPEC {
389    type Writer = W;
390}
391#[doc = "`reset()` method sets CTRL to value 0"]
392impl crate::Resettable for CTRL_SPEC {
393    #[inline(always)]
394    fn reset_value() -> Self::Ux {
395        0
396    }
397}
efm32g230_pac/leuart0/ctrl.rs

efm32g230_pac/leuart0/
ctrl.rs
