efm32g230_pac/cmu/
route.rs1#[doc = "Register `ROUTE` reader"]
2pub struct R(crate::R<ROUTE_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<ROUTE_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<ROUTE_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<ROUTE_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `ROUTE` writer"]
17pub struct W(crate::W<ROUTE_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<ROUTE_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<ROUTE_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<ROUTE_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `CLKOUT0PEN` reader - CLKOUT0 Pin Enable"]
38pub type CLKOUT0PEN_R = crate::BitReader<bool>;
39#[doc = "Field `CLKOUT0PEN` writer - CLKOUT0 Pin Enable"]
40pub type CLKOUT0PEN_W<'a> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, 0>;
41#[doc = "Field `CLKOUT1PEN` reader - CLKOUT1 Pin Enable"]
42pub type CLKOUT1PEN_R = crate::BitReader<bool>;
43#[doc = "Field `CLKOUT1PEN` writer - CLKOUT1 Pin Enable"]
44pub type CLKOUT1PEN_W<'a> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, 1>;
45#[doc = "Field `LOCATION` reader - I/O Location"]
46pub type LOCATION_R = crate::BitReader<bool>;
47#[doc = "Field `LOCATION` writer - I/O Location"]
48pub type LOCATION_W<'a> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, 2>;
49impl R {
50 #[doc = "Bit 0 - CLKOUT0 Pin Enable"]
51 #[inline(always)]
52 pub fn clkout0pen(&self) -> CLKOUT0PEN_R {
53 CLKOUT0PEN_R::new((self.bits & 1) != 0)
54 }
55 #[doc = "Bit 1 - CLKOUT1 Pin Enable"]
56 #[inline(always)]
57 pub fn clkout1pen(&self) -> CLKOUT1PEN_R {
58 CLKOUT1PEN_R::new(((self.bits >> 1) & 1) != 0)
59 }
60 #[doc = "Bit 2 - I/O Location"]
61 #[inline(always)]
62 pub fn location(&self) -> LOCATION_R {
63 LOCATION_R::new(((self.bits >> 2) & 1) != 0)
64 }
65}
66impl W {
67 #[doc = "Bit 0 - CLKOUT0 Pin Enable"]
68 #[inline(always)]
69 pub fn clkout0pen(&mut self) -> CLKOUT0PEN_W {
70 CLKOUT0PEN_W::new(self)
71 }
72 #[doc = "Bit 1 - CLKOUT1 Pin Enable"]
73 #[inline(always)]
74 pub fn clkout1pen(&mut self) -> CLKOUT1PEN_W {
75 CLKOUT1PEN_W::new(self)
76 }
77 #[doc = "Bit 2 - I/O Location"]
78 #[inline(always)]
79 pub fn location(&mut self) -> LOCATION_W {
80 LOCATION_W::new(self)
81 }
82 #[doc = "Writes raw bits to the register."]
83 #[inline(always)]
84 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
85 self.0.bits(bits);
86 self
87 }
88}
89#[doc = "I/O Routing Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [route](index.html) module"]
90pub struct ROUTE_SPEC;
91impl crate::RegisterSpec for ROUTE_SPEC {
92 type Ux = u32;
93}
94#[doc = "`read()` method returns [route::R](R) reader structure"]
95impl crate::Readable for ROUTE_SPEC {
96 type Reader = R;
97}
98#[doc = "`write(|w| ..)` method takes [route::W](W) writer structure"]
99impl crate::Writable for ROUTE_SPEC {
100 type Writer = W;
101}
102#[doc = "`reset()` method sets ROUTE to value 0"]
103impl crate::Resettable for ROUTE_SPEC {
104 #[inline(always)]
105 fn reset_value() -> Self::Ux {
106 0
107 }
108}