efm32g230_pac/cmu/
lfaclken0.rs1#[doc = "Register `LFACLKEN0` reader"]
2pub struct R(crate::R<LFACLKEN0_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<LFACLKEN0_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<LFACLKEN0_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<LFACLKEN0_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `LFACLKEN0` writer"]
17pub struct W(crate::W<LFACLKEN0_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<LFACLKEN0_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<LFACLKEN0_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<LFACLKEN0_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `RTC` reader - Real-Time Counter Clock Enable"]
38pub type RTC_R = crate::BitReader<bool>;
39#[doc = "Field `RTC` writer - Real-Time Counter Clock Enable"]
40pub type RTC_W<'a> = crate::BitWriter<'a, u32, LFACLKEN0_SPEC, bool, 0>;
41#[doc = "Field `LETIMER0` reader - Low Energy Timer 0 Clock Enable"]
42pub type LETIMER0_R = crate::BitReader<bool>;
43#[doc = "Field `LETIMER0` writer - Low Energy Timer 0 Clock Enable"]
44pub type LETIMER0_W<'a> = crate::BitWriter<'a, u32, LFACLKEN0_SPEC, bool, 1>;
45impl R {
46 #[doc = "Bit 0 - Real-Time Counter Clock Enable"]
47 #[inline(always)]
48 pub fn rtc(&self) -> RTC_R {
49 RTC_R::new((self.bits & 1) != 0)
50 }
51 #[doc = "Bit 1 - Low Energy Timer 0 Clock Enable"]
52 #[inline(always)]
53 pub fn letimer0(&self) -> LETIMER0_R {
54 LETIMER0_R::new(((self.bits >> 1) & 1) != 0)
55 }
56}
57impl W {
58 #[doc = "Bit 0 - Real-Time Counter Clock Enable"]
59 #[inline(always)]
60 pub fn rtc(&mut self) -> RTC_W {
61 RTC_W::new(self)
62 }
63 #[doc = "Bit 1 - Low Energy Timer 0 Clock Enable"]
64 #[inline(always)]
65 pub fn letimer0(&mut self) -> LETIMER0_W {
66 LETIMER0_W::new(self)
67 }
68 #[doc = "Writes raw bits to the register."]
69 #[inline(always)]
70 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
71 self.0.bits(bits);
72 self
73 }
74}
75#[doc = "Low Frequency A Clock Enable Register 0 (Async Reg)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfaclken0](index.html) module"]
76pub struct LFACLKEN0_SPEC;
77impl crate::RegisterSpec for LFACLKEN0_SPEC {
78 type Ux = u32;
79}
80#[doc = "`read()` method returns [lfaclken0::R](R) reader structure"]
81impl crate::Readable for LFACLKEN0_SPEC {
82 type Reader = R;
83}
84#[doc = "`write(|w| ..)` method takes [lfaclken0::W](W) writer structure"]
85impl crate::Writable for LFACLKEN0_SPEC {
86 type Writer = W;
87}
88#[doc = "`reset()` method sets LFACLKEN0 to value 0"]
89impl crate::Resettable for LFACLKEN0_SPEC {
90 #[inline(always)]
91 fn reset_value() -> Self::Ux {
92 0
93 }
94}