efm32g230_pac/dac0/
ien.rs

1#[doc = "Register `IEN` reader"]
2pub struct R(crate::R<IEN_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<IEN_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<IEN_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<IEN_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `IEN` writer"]
17pub struct W(crate::W<IEN_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<IEN_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<IEN_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<IEN_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `CH0` reader - Channel 0 Conversion Complete Interrupt Enable"]
38pub type CH0_R = crate::BitReader<bool>;
39#[doc = "Field `CH0` writer - Channel 0 Conversion Complete Interrupt Enable"]
40pub type CH0_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 0>;
41#[doc = "Field `CH1` reader - Channel 1 Conversion Complete Interrupt Enable"]
42pub type CH1_R = crate::BitReader<bool>;
43#[doc = "Field `CH1` writer - Channel 1 Conversion Complete Interrupt Enable"]
44pub type CH1_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 1>;
45#[doc = "Field `CH0UF` reader - Channel 0 Conversion Data Underflow Interrupt Enable"]
46pub type CH0UF_R = crate::BitReader<bool>;
47#[doc = "Field `CH0UF` writer - Channel 0 Conversion Data Underflow Interrupt Enable"]
48pub type CH0UF_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 4>;
49#[doc = "Field `CH1UF` reader - Channel 1 Conversion Data Underflow Interrupt Enable"]
50pub type CH1UF_R = crate::BitReader<bool>;
51#[doc = "Field `CH1UF` writer - Channel 1 Conversion Data Underflow Interrupt Enable"]
52pub type CH1UF_W<'a> = crate::BitWriter<'a, u32, IEN_SPEC, bool, 5>;
53impl R {
54    #[doc = "Bit 0 - Channel 0 Conversion Complete Interrupt Enable"]
55    #[inline(always)]
56    pub fn ch0(&self) -> CH0_R {
57        CH0_R::new((self.bits & 1) != 0)
58    }
59    #[doc = "Bit 1 - Channel 1 Conversion Complete Interrupt Enable"]
60    #[inline(always)]
61    pub fn ch1(&self) -> CH1_R {
62        CH1_R::new(((self.bits >> 1) & 1) != 0)
63    }
64    #[doc = "Bit 4 - Channel 0 Conversion Data Underflow Interrupt Enable"]
65    #[inline(always)]
66    pub fn ch0uf(&self) -> CH0UF_R {
67        CH0UF_R::new(((self.bits >> 4) & 1) != 0)
68    }
69    #[doc = "Bit 5 - Channel 1 Conversion Data Underflow Interrupt Enable"]
70    #[inline(always)]
71    pub fn ch1uf(&self) -> CH1UF_R {
72        CH1UF_R::new(((self.bits >> 5) & 1) != 0)
73    }
74}
75impl W {
76    #[doc = "Bit 0 - Channel 0 Conversion Complete Interrupt Enable"]
77    #[inline(always)]
78    pub fn ch0(&mut self) -> CH0_W {
79        CH0_W::new(self)
80    }
81    #[doc = "Bit 1 - Channel 1 Conversion Complete Interrupt Enable"]
82    #[inline(always)]
83    pub fn ch1(&mut self) -> CH1_W {
84        CH1_W::new(self)
85    }
86    #[doc = "Bit 4 - Channel 0 Conversion Data Underflow Interrupt Enable"]
87    #[inline(always)]
88    pub fn ch0uf(&mut self) -> CH0UF_W {
89        CH0UF_W::new(self)
90    }
91    #[doc = "Bit 5 - Channel 1 Conversion Data Underflow Interrupt Enable"]
92    #[inline(always)]
93    pub fn ch1uf(&mut self) -> CH1UF_W {
94        CH1UF_W::new(self)
95    }
96    #[doc = "Writes raw bits to the register."]
97    #[inline(always)]
98    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
99        self.0.bits(bits);
100        self
101    }
102}
103#[doc = "Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"]
104pub struct IEN_SPEC;
105impl crate::RegisterSpec for IEN_SPEC {
106    type Ux = u32;
107}
108#[doc = "`read()` method returns [ien::R](R) reader structure"]
109impl crate::Readable for IEN_SPEC {
110    type Reader = R;
111}
112#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"]
113impl crate::Writable for IEN_SPEC {
114    type Writer = W;
115}
116#[doc = "`reset()` method sets IEN to value 0"]
117impl crate::Resettable for IEN_SPEC {
118    #[inline(always)]
119    fn reset_value() -> Self::Ux {
120        0
121    }
122}
efm32g230_pac/dac0/ien.rs

efm32g230_pac/dac0/
ien.rs
