efm32g230_pac/leuart1/
cmd.rs

1#[doc = "Register `CMD` writer"]
2pub struct W(crate::W<CMD_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<CMD_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<CMD_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<CMD_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `RXEN` writer - Receiver Enable"]
23pub type RXEN_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 0>;
24#[doc = "Field `RXDIS` writer - Receiver Disable"]
25pub type RXDIS_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 1>;
26#[doc = "Field `TXEN` writer - Transmitter Enable"]
27pub type TXEN_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 2>;
28#[doc = "Field `TXDIS` writer - Transmitter Disable"]
29pub type TXDIS_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 3>;
30#[doc = "Field `RXBLOCKEN` writer - Receiver Block Enable"]
31pub type RXBLOCKEN_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 4>;
32#[doc = "Field `RXBLOCKDIS` writer - Receiver Block Disable"]
33pub type RXBLOCKDIS_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 5>;
34#[doc = "Field `CLEARTX` writer - Clear TX"]
35pub type CLEARTX_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 6>;
36#[doc = "Field `CLEARRX` writer - Clear RX"]
37pub type CLEARRX_W<'a> = crate::BitWriter<'a, u32, CMD_SPEC, bool, 7>;
38impl W {
39    #[doc = "Bit 0 - Receiver Enable"]
40    #[inline(always)]
41    pub fn rxen(&mut self) -> RXEN_W {
42        RXEN_W::new(self)
43    }
44    #[doc = "Bit 1 - Receiver Disable"]
45    #[inline(always)]
46    pub fn rxdis(&mut self) -> RXDIS_W {
47        RXDIS_W::new(self)
48    }
49    #[doc = "Bit 2 - Transmitter Enable"]
50    #[inline(always)]
51    pub fn txen(&mut self) -> TXEN_W {
52        TXEN_W::new(self)
53    }
54    #[doc = "Bit 3 - Transmitter Disable"]
55    #[inline(always)]
56    pub fn txdis(&mut self) -> TXDIS_W {
57        TXDIS_W::new(self)
58    }
59    #[doc = "Bit 4 - Receiver Block Enable"]
60    #[inline(always)]
61    pub fn rxblocken(&mut self) -> RXBLOCKEN_W {
62        RXBLOCKEN_W::new(self)
63    }
64    #[doc = "Bit 5 - Receiver Block Disable"]
65    #[inline(always)]
66    pub fn rxblockdis(&mut self) -> RXBLOCKDIS_W {
67        RXBLOCKDIS_W::new(self)
68    }
69    #[doc = "Bit 6 - Clear TX"]
70    #[inline(always)]
71    pub fn cleartx(&mut self) -> CLEARTX_W {
72        CLEARTX_W::new(self)
73    }
74    #[doc = "Bit 7 - Clear RX"]
75    #[inline(always)]
76    pub fn clearrx(&mut self) -> CLEARRX_W {
77        CLEARRX_W::new(self)
78    }
79    #[doc = "Writes raw bits to the register."]
80    #[inline(always)]
81    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
82        self.0.bits(bits);
83        self
84    }
85}
86#[doc = "Command Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"]
87pub struct CMD_SPEC;
88impl crate::RegisterSpec for CMD_SPEC {
89    type Ux = u32;
90}
91#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"]
92impl crate::Writable for CMD_SPEC {
93    type Writer = W;
94}
95#[doc = "`reset()` method sets CMD to value 0"]
96impl crate::Resettable for CMD_SPEC {
97    #[inline(always)]
98    fn reset_value() -> Self::Ux {
99        0
100    }
101}
efm32g230_pac/leuart1/cmd.rs

efm32g230_pac/leuart1/
cmd.rs
