efm32g230_pac/usart2/
ifc.rs

1#[doc = "Register `IFC` writer"]
2pub struct W(crate::W<IFC_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<IFC_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<IFC_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<IFC_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `TXC` writer - Clear TX Complete Interrupt Flag"]
23pub type TXC_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 0>;
24#[doc = "Field `RXFULL` writer - Clear RX Buffer Full Interrupt Flag"]
25pub type RXFULL_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 3>;
26#[doc = "Field `RXOF` writer - Clear RX Overflow Interrupt Flag"]
27pub type RXOF_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 4>;
28#[doc = "Field `RXUF` writer - Clear RX Underflow Interrupt Flag"]
29pub type RXUF_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 5>;
30#[doc = "Field `TXOF` writer - Clear TX Overflow Interrupt Flag"]
31pub type TXOF_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 6>;
32#[doc = "Field `TXUF` writer - Clear TX Underflow Interrupt Flag"]
33pub type TXUF_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 7>;
34#[doc = "Field `PERR` writer - Clear Parity Error Interrupt Flag"]
35pub type PERR_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 8>;
36#[doc = "Field `FERR` writer - Clear Framing Error Interrupt Flag"]
37pub type FERR_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 9>;
38#[doc = "Field `MPAF` writer - Clear Multi-Processor Address Frame Interrupt Flag"]
39pub type MPAF_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 10>;
40#[doc = "Field `SSM` writer - Clear Slave-Select In Master Mode Interrupt Flag"]
41pub type SSM_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 11>;
42#[doc = "Field `CCF` writer - Clear Collision Check Fail Interrupt Flag"]
43pub type CCF_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 12>;
44impl W {
45    #[doc = "Bit 0 - Clear TX Complete Interrupt Flag"]
46    #[inline(always)]
47    pub fn txc(&mut self) -> TXC_W {
48        TXC_W::new(self)
49    }
50    #[doc = "Bit 3 - Clear RX Buffer Full Interrupt Flag"]
51    #[inline(always)]
52    pub fn rxfull(&mut self) -> RXFULL_W {
53        RXFULL_W::new(self)
54    }
55    #[doc = "Bit 4 - Clear RX Overflow Interrupt Flag"]
56    #[inline(always)]
57    pub fn rxof(&mut self) -> RXOF_W {
58        RXOF_W::new(self)
59    }
60    #[doc = "Bit 5 - Clear RX Underflow Interrupt Flag"]
61    #[inline(always)]
62    pub fn rxuf(&mut self) -> RXUF_W {
63        RXUF_W::new(self)
64    }
65    #[doc = "Bit 6 - Clear TX Overflow Interrupt Flag"]
66    #[inline(always)]
67    pub fn txof(&mut self) -> TXOF_W {
68        TXOF_W::new(self)
69    }
70    #[doc = "Bit 7 - Clear TX Underflow Interrupt Flag"]
71    #[inline(always)]
72    pub fn txuf(&mut self) -> TXUF_W {
73        TXUF_W::new(self)
74    }
75    #[doc = "Bit 8 - Clear Parity Error Interrupt Flag"]
76    #[inline(always)]
77    pub fn perr(&mut self) -> PERR_W {
78        PERR_W::new(self)
79    }
80    #[doc = "Bit 9 - Clear Framing Error Interrupt Flag"]
81    #[inline(always)]
82    pub fn ferr(&mut self) -> FERR_W {
83        FERR_W::new(self)
84    }
85    #[doc = "Bit 10 - Clear Multi-Processor Address Frame Interrupt Flag"]
86    #[inline(always)]
87    pub fn mpaf(&mut self) -> MPAF_W {
88        MPAF_W::new(self)
89    }
90    #[doc = "Bit 11 - Clear Slave-Select In Master Mode Interrupt Flag"]
91    #[inline(always)]
92    pub fn ssm(&mut self) -> SSM_W {
93        SSM_W::new(self)
94    }
95    #[doc = "Bit 12 - Clear Collision Check Fail Interrupt Flag"]
96    #[inline(always)]
97    pub fn ccf(&mut self) -> CCF_W {
98        CCF_W::new(self)
99    }
100    #[doc = "Writes raw bits to the register."]
101    #[inline(always)]
102    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
103        self.0.bits(bits);
104        self
105    }
106}
107#[doc = "Interrupt Flag Clear Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ifc](index.html) module"]
108pub struct IFC_SPEC;
109impl crate::RegisterSpec for IFC_SPEC {
110    type Ux = u32;
111}
112#[doc = "`write(|w| ..)` method takes [ifc::W](W) writer structure"]
113impl crate::Writable for IFC_SPEC {
114    type Writer = W;
115}
116#[doc = "`reset()` method sets IFC to value 0"]
117impl crate::Resettable for IFC_SPEC {
118    #[inline(always)]
119    fn reset_value() -> Self::Ux {
120        0
121    }
122}
efm32g230_pac/usart2/ifc.rs

efm32g230_pac/usart2/
ifc.rs
