efm32g230_pac/letimer0/
ifc.rs

1#[doc = "Register `IFC` writer"]
2pub struct W(crate::W<IFC_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<IFC_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<IFC_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<IFC_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `COMP0` writer - Clear Compare Match 0 Interrupt Flag"]
23pub type COMP0_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 0>;
24#[doc = "Field `COMP1` writer - Clear Compare Match 1 Interrupt Flag"]
25pub type COMP1_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 1>;
26#[doc = "Field `UF` writer - Clear Underflow Interrupt Flag"]
27pub type UF_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 2>;
28#[doc = "Field `REP0` writer - Clear Repeat Counter 0 Interrupt Flag"]
29pub type REP0_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 3>;
30#[doc = "Field `REP1` writer - Clear Repeat Counter 1 Interrupt Flag"]
31pub type REP1_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 4>;
32impl W {
33    #[doc = "Bit 0 - Clear Compare Match 0 Interrupt Flag"]
34    #[inline(always)]
35    pub fn comp0(&mut self) -> COMP0_W {
36        COMP0_W::new(self)
37    }
38    #[doc = "Bit 1 - Clear Compare Match 1 Interrupt Flag"]
39    #[inline(always)]
40    pub fn comp1(&mut self) -> COMP1_W {
41        COMP1_W::new(self)
42    }
43    #[doc = "Bit 2 - Clear Underflow Interrupt Flag"]
44    #[inline(always)]
45    pub fn uf(&mut self) -> UF_W {
46        UF_W::new(self)
47    }
48    #[doc = "Bit 3 - Clear Repeat Counter 0 Interrupt Flag"]
49    #[inline(always)]
50    pub fn rep0(&mut self) -> REP0_W {
51        REP0_W::new(self)
52    }
53    #[doc = "Bit 4 - Clear Repeat Counter 1 Interrupt Flag"]
54    #[inline(always)]
55    pub fn rep1(&mut self) -> REP1_W {
56        REP1_W::new(self)
57    }
58    #[doc = "Writes raw bits to the register."]
59    #[inline(always)]
60    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
61        self.0.bits(bits);
62        self
63    }
64}
65#[doc = "Interrupt Flag Clear Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ifc](index.html) module"]
66pub struct IFC_SPEC;
67impl crate::RegisterSpec for IFC_SPEC {
68    type Ux = u32;
69}
70#[doc = "`write(|w| ..)` method takes [ifc::W](W) writer structure"]
71impl crate::Writable for IFC_SPEC {
72    type Writer = W;
73}
74#[doc = "`reset()` method sets IFC to value 0"]
75impl crate::Resettable for IFC_SPEC {
76    #[inline(always)]
77    fn reset_value() -> Self::Ux {
78        0
79    }
80}
efm32g230_pac/letimer0/ifc.rs

efm32g230_pac/letimer0/
ifc.rs
