efm32g230_pac/i2c0/
state.rs

1#[doc = "Register `STATE` reader"]
2pub struct R(crate::R<STATE_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<STATE_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<STATE_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<STATE_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `BUSY` reader - Bus Busy"]
17pub type BUSY_R = crate::BitReader<bool>;
18#[doc = "Field `MASTER` reader - Master"]
19pub type MASTER_R = crate::BitReader<bool>;
20#[doc = "Field `TRANSMITTER` reader - Transmitter"]
21pub type TRANSMITTER_R = crate::BitReader<bool>;
22#[doc = "Field `NACKED` reader - Nack Received"]
23pub type NACKED_R = crate::BitReader<bool>;
24#[doc = "Field `BUSHOLD` reader - Bus Held"]
25pub type BUSHOLD_R = crate::BitReader<bool>;
26#[doc = "Transmission State\n\nValue on reset: 0"]
27#[derive(Clone, Copy, Debug, PartialEq)]
28#[repr(u8)]
29pub enum STATE_A {
30    #[doc = "0: No transmission is being performed."]
31    IDLE = 0,
32    #[doc = "1: Waiting for idle. Will send a start condition as soon as the bus is idle."]
33    WAIT = 1,
34    #[doc = "2: Start transmitted or received"]
35    START = 2,
36    #[doc = "3: Address transmitted or received"]
37    ADDR = 3,
38    #[doc = "4: Address ack/nack transmitted or received"]
39    ADDRACK = 4,
40    #[doc = "5: Data transmitted or received"]
41    DATA = 5,
42    #[doc = "6: Data ack/nack transmitted or received"]
43    DATAACK = 6,
44}
45impl From<STATE_A> for u8 {
46    #[inline(always)]
47    fn from(variant: STATE_A) -> Self {
48        variant as _
49    }
50}
51#[doc = "Field `STATE` reader - Transmission State"]
52pub type STATE_R = crate::FieldReader<u8, STATE_A>;
53impl STATE_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> Option<STATE_A> {
57        match self.bits {
58            0 => Some(STATE_A::IDLE),
59            1 => Some(STATE_A::WAIT),
60            2 => Some(STATE_A::START),
61            3 => Some(STATE_A::ADDR),
62            4 => Some(STATE_A::ADDRACK),
63            5 => Some(STATE_A::DATA),
64            6 => Some(STATE_A::DATAACK),
65            _ => None,
66        }
67    }
68    #[doc = "Checks if the value of the field is `IDLE`"]
69    #[inline(always)]
70    pub fn is_idle(&self) -> bool {
71        *self == STATE_A::IDLE
72    }
73    #[doc = "Checks if the value of the field is `WAIT`"]
74    #[inline(always)]
75    pub fn is_wait(&self) -> bool {
76        *self == STATE_A::WAIT
77    }
78    #[doc = "Checks if the value of the field is `START`"]
79    #[inline(always)]
80    pub fn is_start(&self) -> bool {
81        *self == STATE_A::START
82    }
83    #[doc = "Checks if the value of the field is `ADDR`"]
84    #[inline(always)]
85    pub fn is_addr(&self) -> bool {
86        *self == STATE_A::ADDR
87    }
88    #[doc = "Checks if the value of the field is `ADDRACK`"]
89    #[inline(always)]
90    pub fn is_addrack(&self) -> bool {
91        *self == STATE_A::ADDRACK
92    }
93    #[doc = "Checks if the value of the field is `DATA`"]
94    #[inline(always)]
95    pub fn is_data(&self) -> bool {
96        *self == STATE_A::DATA
97    }
98    #[doc = "Checks if the value of the field is `DATAACK`"]
99    #[inline(always)]
100    pub fn is_dataack(&self) -> bool {
101        *self == STATE_A::DATAACK
102    }
103}
104impl R {
105    #[doc = "Bit 0 - Bus Busy"]
106    #[inline(always)]
107    pub fn busy(&self) -> BUSY_R {
108        BUSY_R::new((self.bits & 1) != 0)
109    }
110    #[doc = "Bit 1 - Master"]
111    #[inline(always)]
112    pub fn master(&self) -> MASTER_R {
113        MASTER_R::new(((self.bits >> 1) & 1) != 0)
114    }
115    #[doc = "Bit 2 - Transmitter"]
116    #[inline(always)]
117    pub fn transmitter(&self) -> TRANSMITTER_R {
118        TRANSMITTER_R::new(((self.bits >> 2) & 1) != 0)
119    }
120    #[doc = "Bit 3 - Nack Received"]
121    #[inline(always)]
122    pub fn nacked(&self) -> NACKED_R {
123        NACKED_R::new(((self.bits >> 3) & 1) != 0)
124    }
125    #[doc = "Bit 4 - Bus Held"]
126    #[inline(always)]
127    pub fn bushold(&self) -> BUSHOLD_R {
128        BUSHOLD_R::new(((self.bits >> 4) & 1) != 0)
129    }
130    #[doc = "Bits 5:7 - Transmission State"]
131    #[inline(always)]
132    pub fn state(&self) -> STATE_R {
133        STATE_R::new(((self.bits >> 5) & 7) as u8)
134    }
135}
136#[doc = "State Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [state](index.html) module"]
137pub struct STATE_SPEC;
138impl crate::RegisterSpec for STATE_SPEC {
139    type Ux = u32;
140}
141#[doc = "`read()` method returns [state::R](R) reader structure"]
142impl crate::Readable for STATE_SPEC {
143    type Reader = R;
144}
145#[doc = "`reset()` method sets STATE to value 0x01"]
146impl crate::Resettable for STATE_SPEC {
147    #[inline(always)]
148    fn reset_value() -> Self::Ux {
149        0x01
150    }
151}
efm32g230_pac/i2c0/state.rs

efm32g230_pac/i2c0/
state.rs
