efm32g230_pac/cmu/
lfbpresc0.rs1#[doc = "Register `LFBPRESC0` reader"]
2pub struct R(crate::R<LFBPRESC0_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<LFBPRESC0_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<LFBPRESC0_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<LFBPRESC0_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `LFBPRESC0` writer"]
17pub struct W(crate::W<LFBPRESC0_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<LFBPRESC0_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<LFBPRESC0_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<LFBPRESC0_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Low Energy UART 0 Prescaler\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum LEUART0_A {
41 #[doc = "0: LFBCLKLEUART0 = LFBCLK"]
42 DIV1 = 0,
43 #[doc = "1: LFBCLKLEUART0 = LFBCLK/2"]
44 DIV2 = 1,
45 #[doc = "2: LFBCLKLEUART0 = LFBCLK/4"]
46 DIV4 = 2,
47 #[doc = "3: LFBCLKLEUART0 = LFBCLK/8"]
48 DIV8 = 3,
49}
50impl From<LEUART0_A> for u8 {
51 #[inline(always)]
52 fn from(variant: LEUART0_A) -> Self {
53 variant as _
54 }
55}
56#[doc = "Field `LEUART0` reader - Low Energy UART 0 Prescaler"]
57pub type LEUART0_R = crate::FieldReader<u8, LEUART0_A>;
58impl LEUART0_R {
59 #[doc = "Get enumerated values variant"]
60 #[inline(always)]
61 pub fn variant(&self) -> LEUART0_A {
62 match self.bits {
63 0 => LEUART0_A::DIV1,
64 1 => LEUART0_A::DIV2,
65 2 => LEUART0_A::DIV4,
66 3 => LEUART0_A::DIV8,
67 _ => unreachable!(),
68 }
69 }
70 #[doc = "Checks if the value of the field is `DIV1`"]
71 #[inline(always)]
72 pub fn is_div1(&self) -> bool {
73 *self == LEUART0_A::DIV1
74 }
75 #[doc = "Checks if the value of the field is `DIV2`"]
76 #[inline(always)]
77 pub fn is_div2(&self) -> bool {
78 *self == LEUART0_A::DIV2
79 }
80 #[doc = "Checks if the value of the field is `DIV4`"]
81 #[inline(always)]
82 pub fn is_div4(&self) -> bool {
83 *self == LEUART0_A::DIV4
84 }
85 #[doc = "Checks if the value of the field is `DIV8`"]
86 #[inline(always)]
87 pub fn is_div8(&self) -> bool {
88 *self == LEUART0_A::DIV8
89 }
90}
91#[doc = "Field `LEUART0` writer - Low Energy UART 0 Prescaler"]
92pub type LEUART0_W<'a> = crate::FieldWriterSafe<'a, u32, LFBPRESC0_SPEC, u8, LEUART0_A, 2, 0>;
93impl<'a> LEUART0_W<'a> {
94 #[doc = "LFBCLKLEUART0 = LFBCLK"]
95 #[inline(always)]
96 pub fn div1(self) -> &'a mut W {
97 self.variant(LEUART0_A::DIV1)
98 }
99 #[doc = "LFBCLKLEUART0 = LFBCLK/2"]
100 #[inline(always)]
101 pub fn div2(self) -> &'a mut W {
102 self.variant(LEUART0_A::DIV2)
103 }
104 #[doc = "LFBCLKLEUART0 = LFBCLK/4"]
105 #[inline(always)]
106 pub fn div4(self) -> &'a mut W {
107 self.variant(LEUART0_A::DIV4)
108 }
109 #[doc = "LFBCLKLEUART0 = LFBCLK/8"]
110 #[inline(always)]
111 pub fn div8(self) -> &'a mut W {
112 self.variant(LEUART0_A::DIV8)
113 }
114}
115#[doc = "Low Energy UART 1 Prescaler\n\nValue on reset: 0"]
116#[derive(Clone, Copy, Debug, PartialEq)]
117#[repr(u8)]
118pub enum LEUART1_A {
119 #[doc = "0: LFBCLKLEUART1 = LFBCLK"]
120 DIV1 = 0,
121 #[doc = "1: LFBCLKLEUART1 = LFBCLK/2"]
122 DIV2 = 1,
123 #[doc = "2: LFBCLKLEUART1 = LFBCLK/4"]
124 DIV4 = 2,
125 #[doc = "3: LFBCLKLEUART1 = LFBCLK/8"]
126 DIV8 = 3,
127}
128impl From<LEUART1_A> for u8 {
129 #[inline(always)]
130 fn from(variant: LEUART1_A) -> Self {
131 variant as _
132 }
133}
134#[doc = "Field `LEUART1` reader - Low Energy UART 1 Prescaler"]
135pub type LEUART1_R = crate::FieldReader<u8, LEUART1_A>;
136impl LEUART1_R {
137 #[doc = "Get enumerated values variant"]
138 #[inline(always)]
139 pub fn variant(&self) -> LEUART1_A {
140 match self.bits {
141 0 => LEUART1_A::DIV1,
142 1 => LEUART1_A::DIV2,
143 2 => LEUART1_A::DIV4,
144 3 => LEUART1_A::DIV8,
145 _ => unreachable!(),
146 }
147 }
148 #[doc = "Checks if the value of the field is `DIV1`"]
149 #[inline(always)]
150 pub fn is_div1(&self) -> bool {
151 *self == LEUART1_A::DIV1
152 }
153 #[doc = "Checks if the value of the field is `DIV2`"]
154 #[inline(always)]
155 pub fn is_div2(&self) -> bool {
156 *self == LEUART1_A::DIV2
157 }
158 #[doc = "Checks if the value of the field is `DIV4`"]
159 #[inline(always)]
160 pub fn is_div4(&self) -> bool {
161 *self == LEUART1_A::DIV4
162 }
163 #[doc = "Checks if the value of the field is `DIV8`"]
164 #[inline(always)]
165 pub fn is_div8(&self) -> bool {
166 *self == LEUART1_A::DIV8
167 }
168}
169#[doc = "Field `LEUART1` writer - Low Energy UART 1 Prescaler"]
170pub type LEUART1_W<'a> = crate::FieldWriterSafe<'a, u32, LFBPRESC0_SPEC, u8, LEUART1_A, 2, 4>;
171impl<'a> LEUART1_W<'a> {
172 #[doc = "LFBCLKLEUART1 = LFBCLK"]
173 #[inline(always)]
174 pub fn div1(self) -> &'a mut W {
175 self.variant(LEUART1_A::DIV1)
176 }
177 #[doc = "LFBCLKLEUART1 = LFBCLK/2"]
178 #[inline(always)]
179 pub fn div2(self) -> &'a mut W {
180 self.variant(LEUART1_A::DIV2)
181 }
182 #[doc = "LFBCLKLEUART1 = LFBCLK/4"]
183 #[inline(always)]
184 pub fn div4(self) -> &'a mut W {
185 self.variant(LEUART1_A::DIV4)
186 }
187 #[doc = "LFBCLKLEUART1 = LFBCLK/8"]
188 #[inline(always)]
189 pub fn div8(self) -> &'a mut W {
190 self.variant(LEUART1_A::DIV8)
191 }
192}
193impl R {
194 #[doc = "Bits 0:1 - Low Energy UART 0 Prescaler"]
195 #[inline(always)]
196 pub fn leuart0(&self) -> LEUART0_R {
197 LEUART0_R::new((self.bits & 3) as u8)
198 }
199 #[doc = "Bits 4:5 - Low Energy UART 1 Prescaler"]
200 #[inline(always)]
201 pub fn leuart1(&self) -> LEUART1_R {
202 LEUART1_R::new(((self.bits >> 4) & 3) as u8)
203 }
204}
205impl W {
206 #[doc = "Bits 0:1 - Low Energy UART 0 Prescaler"]
207 #[inline(always)]
208 pub fn leuart0(&mut self) -> LEUART0_W {
209 LEUART0_W::new(self)
210 }
211 #[doc = "Bits 4:5 - Low Energy UART 1 Prescaler"]
212 #[inline(always)]
213 pub fn leuart1(&mut self) -> LEUART1_W {
214 LEUART1_W::new(self)
215 }
216 #[doc = "Writes raw bits to the register."]
217 #[inline(always)]
218 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
219 self.0.bits(bits);
220 self
221 }
222}
223#[doc = "Low Frequency B Prescaler Register 0 (Async Reg)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfbpresc0](index.html) module"]
224pub struct LFBPRESC0_SPEC;
225impl crate::RegisterSpec for LFBPRESC0_SPEC {
226 type Ux = u32;
227}
228#[doc = "`read()` method returns [lfbpresc0::R](R) reader structure"]
229impl crate::Readable for LFBPRESC0_SPEC {
230 type Reader = R;
231}
232#[doc = "`write(|w| ..)` method takes [lfbpresc0::W](W) writer structure"]
233impl crate::Writable for LFBPRESC0_SPEC {
234 type Writer = W;
235}
236#[doc = "`reset()` method sets LFBPRESC0 to value 0"]
237impl crate::Resettable for LFBPRESC0_SPEC {
238 #[inline(always)]
239 fn reset_value() -> Self::Ux {
240 0
241 }
242}