efm32g230_pac/dma/
status.rs1#[doc = "Register `STATUS` reader"]
2pub struct R(crate::R<STATUS_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<STATUS_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<STATUS_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<STATUS_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Field `EN` reader - DMA Enable Status"]
17pub type EN_R = crate::BitReader<bool>;
18#[doc = "Control Current State\n\nValue on reset: 0"]
19#[derive(Clone, Copy, Debug, PartialEq)]
20#[repr(u8)]
21pub enum STATE_A {
22 #[doc = "0: Idle"]
23 IDLE = 0,
24 #[doc = "1: Reading channel controller data"]
25 RDCHCTRLDATA = 1,
26 #[doc = "2: Reading source data end pointer"]
27 RDSRCENDPTR = 2,
28 #[doc = "3: Reading destination data end pointer"]
29 RDDSTENDPTR = 3,
30 #[doc = "4: Reading source data"]
31 RDSRCDATA = 4,
32 #[doc = "5: Writing destination data"]
33 WRDSTDATA = 5,
34 #[doc = "6: Waiting for DMA request to clear"]
35 WAITREQCLR = 6,
36 #[doc = "7: Writing channel controller data"]
37 WRCHCTRLDATA = 7,
38 #[doc = "8: Stalled"]
39 STALLED = 8,
40 #[doc = "9: Done"]
41 DONE = 9,
42 #[doc = "10: Peripheral scatter-gather transition"]
43 PERSCATTRANS = 10,
44}
45impl From<STATE_A> for u8 {
46 #[inline(always)]
47 fn from(variant: STATE_A) -> Self {
48 variant as _
49 }
50}
51#[doc = "Field `STATE` reader - Control Current State"]
52pub type STATE_R = crate::FieldReader<u8, STATE_A>;
53impl STATE_R {
54 #[doc = "Get enumerated values variant"]
55 #[inline(always)]
56 pub fn variant(&self) -> Option<STATE_A> {
57 match self.bits {
58 0 => Some(STATE_A::IDLE),
59 1 => Some(STATE_A::RDCHCTRLDATA),
60 2 => Some(STATE_A::RDSRCENDPTR),
61 3 => Some(STATE_A::RDDSTENDPTR),
62 4 => Some(STATE_A::RDSRCDATA),
63 5 => Some(STATE_A::WRDSTDATA),
64 6 => Some(STATE_A::WAITREQCLR),
65 7 => Some(STATE_A::WRCHCTRLDATA),
66 8 => Some(STATE_A::STALLED),
67 9 => Some(STATE_A::DONE),
68 10 => Some(STATE_A::PERSCATTRANS),
69 _ => None,
70 }
71 }
72 #[doc = "Checks if the value of the field is `IDLE`"]
73 #[inline(always)]
74 pub fn is_idle(&self) -> bool {
75 *self == STATE_A::IDLE
76 }
77 #[doc = "Checks if the value of the field is `RDCHCTRLDATA`"]
78 #[inline(always)]
79 pub fn is_rdchctrldata(&self) -> bool {
80 *self == STATE_A::RDCHCTRLDATA
81 }
82 #[doc = "Checks if the value of the field is `RDSRCENDPTR`"]
83 #[inline(always)]
84 pub fn is_rdsrcendptr(&self) -> bool {
85 *self == STATE_A::RDSRCENDPTR
86 }
87 #[doc = "Checks if the value of the field is `RDDSTENDPTR`"]
88 #[inline(always)]
89 pub fn is_rddstendptr(&self) -> bool {
90 *self == STATE_A::RDDSTENDPTR
91 }
92 #[doc = "Checks if the value of the field is `RDSRCDATA`"]
93 #[inline(always)]
94 pub fn is_rdsrcdata(&self) -> bool {
95 *self == STATE_A::RDSRCDATA
96 }
97 #[doc = "Checks if the value of the field is `WRDSTDATA`"]
98 #[inline(always)]
99 pub fn is_wrdstdata(&self) -> bool {
100 *self == STATE_A::WRDSTDATA
101 }
102 #[doc = "Checks if the value of the field is `WAITREQCLR`"]
103 #[inline(always)]
104 pub fn is_waitreqclr(&self) -> bool {
105 *self == STATE_A::WAITREQCLR
106 }
107 #[doc = "Checks if the value of the field is `WRCHCTRLDATA`"]
108 #[inline(always)]
109 pub fn is_wrchctrldata(&self) -> bool {
110 *self == STATE_A::WRCHCTRLDATA
111 }
112 #[doc = "Checks if the value of the field is `STALLED`"]
113 #[inline(always)]
114 pub fn is_stalled(&self) -> bool {
115 *self == STATE_A::STALLED
116 }
117 #[doc = "Checks if the value of the field is `DONE`"]
118 #[inline(always)]
119 pub fn is_done(&self) -> bool {
120 *self == STATE_A::DONE
121 }
122 #[doc = "Checks if the value of the field is `PERSCATTRANS`"]
123 #[inline(always)]
124 pub fn is_perscattrans(&self) -> bool {
125 *self == STATE_A::PERSCATTRANS
126 }
127}
128#[doc = "Field `CHNUM` reader - Channel Number"]
129pub type CHNUM_R = crate::FieldReader<u8, u8>;
130impl R {
131 #[doc = "Bit 0 - DMA Enable Status"]
132 #[inline(always)]
133 pub fn en(&self) -> EN_R {
134 EN_R::new((self.bits & 1) != 0)
135 }
136 #[doc = "Bits 4:7 - Control Current State"]
137 #[inline(always)]
138 pub fn state(&self) -> STATE_R {
139 STATE_R::new(((self.bits >> 4) & 0x0f) as u8)
140 }
141 #[doc = "Bits 16:20 - Channel Number"]
142 #[inline(always)]
143 pub fn chnum(&self) -> CHNUM_R {
144 CHNUM_R::new(((self.bits >> 16) & 0x1f) as u8)
145 }
146}
147#[doc = "DMA Status Registers\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"]
148pub struct STATUS_SPEC;
149impl crate::RegisterSpec for STATUS_SPEC {
150 type Ux = u32;
151}
152#[doc = "`read()` method returns [status::R](R) reader structure"]
153impl crate::Readable for STATUS_SPEC {
154 type Reader = R;
155}
156#[doc = "`reset()` method sets STATUS to value 0x1007_0000"]
157impl crate::Resettable for STATUS_SPEC {
158 #[inline(always)]
159 fn reset_value() -> Self::Ux {
160 0x1007_0000
161 }
162}