efm32g230_pac/cmu/
hfperclkdiv.rs1#[doc = "Register `HFPERCLKDIV` reader"]
2pub struct R(crate::R<HFPERCLKDIV_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<HFPERCLKDIV_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<HFPERCLKDIV_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<HFPERCLKDIV_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `HFPERCLKDIV` writer"]
17pub struct W(crate::W<HFPERCLKDIV_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<HFPERCLKDIV_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<HFPERCLKDIV_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<HFPERCLKDIV_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "HFPERCLK Divider\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum HFPERCLKDIV_A {
41 #[doc = "0: HFPERCLK = HFCLK."]
42 HFCLK = 0,
43 #[doc = "1: HFPERCLK = HFCLK/2."]
44 HFCLK2 = 1,
45 #[doc = "2: HFPERCLK = HFCLK/4."]
46 HFCLK4 = 2,
47 #[doc = "3: HFPERCLK = HFCLK/8."]
48 HFCLK8 = 3,
49 #[doc = "4: HFPERCLK = HFCLK/16."]
50 HFCLK16 = 4,
51 #[doc = "5: HFPERCLK = HFCLK/32."]
52 HFCLK32 = 5,
53 #[doc = "6: HFPERCLK = HFCLK/64."]
54 HFCLK64 = 6,
55 #[doc = "7: HFPERCLK = HFCLK/128."]
56 HFCLK128 = 7,
57 #[doc = "8: HFPERCLK = HFCLK/256."]
58 HFCLK256 = 8,
59 #[doc = "9: HFPERCLK = HFCLK/512."]
60 HFCLK512 = 9,
61}
62impl From<HFPERCLKDIV_A> for u8 {
63 #[inline(always)]
64 fn from(variant: HFPERCLKDIV_A) -> Self {
65 variant as _
66 }
67}
68#[doc = "Field `HFPERCLKDIV` reader - HFPERCLK Divider"]
69pub type HFPERCLKDIV_R = crate::FieldReader<u8, HFPERCLKDIV_A>;
70impl HFPERCLKDIV_R {
71 #[doc = "Get enumerated values variant"]
72 #[inline(always)]
73 pub fn variant(&self) -> Option<HFPERCLKDIV_A> {
74 match self.bits {
75 0 => Some(HFPERCLKDIV_A::HFCLK),
76 1 => Some(HFPERCLKDIV_A::HFCLK2),
77 2 => Some(HFPERCLKDIV_A::HFCLK4),
78 3 => Some(HFPERCLKDIV_A::HFCLK8),
79 4 => Some(HFPERCLKDIV_A::HFCLK16),
80 5 => Some(HFPERCLKDIV_A::HFCLK32),
81 6 => Some(HFPERCLKDIV_A::HFCLK64),
82 7 => Some(HFPERCLKDIV_A::HFCLK128),
83 8 => Some(HFPERCLKDIV_A::HFCLK256),
84 9 => Some(HFPERCLKDIV_A::HFCLK512),
85 _ => None,
86 }
87 }
88 #[doc = "Checks if the value of the field is `HFCLK`"]
89 #[inline(always)]
90 pub fn is_hfclk(&self) -> bool {
91 *self == HFPERCLKDIV_A::HFCLK
92 }
93 #[doc = "Checks if the value of the field is `HFCLK2`"]
94 #[inline(always)]
95 pub fn is_hfclk2(&self) -> bool {
96 *self == HFPERCLKDIV_A::HFCLK2
97 }
98 #[doc = "Checks if the value of the field is `HFCLK4`"]
99 #[inline(always)]
100 pub fn is_hfclk4(&self) -> bool {
101 *self == HFPERCLKDIV_A::HFCLK4
102 }
103 #[doc = "Checks if the value of the field is `HFCLK8`"]
104 #[inline(always)]
105 pub fn is_hfclk8(&self) -> bool {
106 *self == HFPERCLKDIV_A::HFCLK8
107 }
108 #[doc = "Checks if the value of the field is `HFCLK16`"]
109 #[inline(always)]
110 pub fn is_hfclk16(&self) -> bool {
111 *self == HFPERCLKDIV_A::HFCLK16
112 }
113 #[doc = "Checks if the value of the field is `HFCLK32`"]
114 #[inline(always)]
115 pub fn is_hfclk32(&self) -> bool {
116 *self == HFPERCLKDIV_A::HFCLK32
117 }
118 #[doc = "Checks if the value of the field is `HFCLK64`"]
119 #[inline(always)]
120 pub fn is_hfclk64(&self) -> bool {
121 *self == HFPERCLKDIV_A::HFCLK64
122 }
123 #[doc = "Checks if the value of the field is `HFCLK128`"]
124 #[inline(always)]
125 pub fn is_hfclk128(&self) -> bool {
126 *self == HFPERCLKDIV_A::HFCLK128
127 }
128 #[doc = "Checks if the value of the field is `HFCLK256`"]
129 #[inline(always)]
130 pub fn is_hfclk256(&self) -> bool {
131 *self == HFPERCLKDIV_A::HFCLK256
132 }
133 #[doc = "Checks if the value of the field is `HFCLK512`"]
134 #[inline(always)]
135 pub fn is_hfclk512(&self) -> bool {
136 *self == HFPERCLKDIV_A::HFCLK512
137 }
138}
139#[doc = "Field `HFPERCLKDIV` writer - HFPERCLK Divider"]
140pub type HFPERCLKDIV_W<'a> = crate::FieldWriter<'a, u32, HFPERCLKDIV_SPEC, u8, HFPERCLKDIV_A, 4, 0>;
141impl<'a> HFPERCLKDIV_W<'a> {
142 #[doc = "HFPERCLK = HFCLK."]
143 #[inline(always)]
144 pub fn hfclk(self) -> &'a mut W {
145 self.variant(HFPERCLKDIV_A::HFCLK)
146 }
147 #[doc = "HFPERCLK = HFCLK/2."]
148 #[inline(always)]
149 pub fn hfclk2(self) -> &'a mut W {
150 self.variant(HFPERCLKDIV_A::HFCLK2)
151 }
152 #[doc = "HFPERCLK = HFCLK/4."]
153 #[inline(always)]
154 pub fn hfclk4(self) -> &'a mut W {
155 self.variant(HFPERCLKDIV_A::HFCLK4)
156 }
157 #[doc = "HFPERCLK = HFCLK/8."]
158 #[inline(always)]
159 pub fn hfclk8(self) -> &'a mut W {
160 self.variant(HFPERCLKDIV_A::HFCLK8)
161 }
162 #[doc = "HFPERCLK = HFCLK/16."]
163 #[inline(always)]
164 pub fn hfclk16(self) -> &'a mut W {
165 self.variant(HFPERCLKDIV_A::HFCLK16)
166 }
167 #[doc = "HFPERCLK = HFCLK/32."]
168 #[inline(always)]
169 pub fn hfclk32(self) -> &'a mut W {
170 self.variant(HFPERCLKDIV_A::HFCLK32)
171 }
172 #[doc = "HFPERCLK = HFCLK/64."]
173 #[inline(always)]
174 pub fn hfclk64(self) -> &'a mut W {
175 self.variant(HFPERCLKDIV_A::HFCLK64)
176 }
177 #[doc = "HFPERCLK = HFCLK/128."]
178 #[inline(always)]
179 pub fn hfclk128(self) -> &'a mut W {
180 self.variant(HFPERCLKDIV_A::HFCLK128)
181 }
182 #[doc = "HFPERCLK = HFCLK/256."]
183 #[inline(always)]
184 pub fn hfclk256(self) -> &'a mut W {
185 self.variant(HFPERCLKDIV_A::HFCLK256)
186 }
187 #[doc = "HFPERCLK = HFCLK/512."]
188 #[inline(always)]
189 pub fn hfclk512(self) -> &'a mut W {
190 self.variant(HFPERCLKDIV_A::HFCLK512)
191 }
192}
193#[doc = "Field `HFPERCLKEN` reader - HFPERCLK Enable"]
194pub type HFPERCLKEN_R = crate::BitReader<bool>;
195#[doc = "Field `HFPERCLKEN` writer - HFPERCLK Enable"]
196pub type HFPERCLKEN_W<'a> = crate::BitWriter<'a, u32, HFPERCLKDIV_SPEC, bool, 8>;
197impl R {
198 #[doc = "Bits 0:3 - HFPERCLK Divider"]
199 #[inline(always)]
200 pub fn hfperclkdiv(&self) -> HFPERCLKDIV_R {
201 HFPERCLKDIV_R::new((self.bits & 0x0f) as u8)
202 }
203 #[doc = "Bit 8 - HFPERCLK Enable"]
204 #[inline(always)]
205 pub fn hfperclken(&self) -> HFPERCLKEN_R {
206 HFPERCLKEN_R::new(((self.bits >> 8) & 1) != 0)
207 }
208}
209impl W {
210 #[doc = "Bits 0:3 - HFPERCLK Divider"]
211 #[inline(always)]
212 pub fn hfperclkdiv(&mut self) -> HFPERCLKDIV_W {
213 HFPERCLKDIV_W::new(self)
214 }
215 #[doc = "Bit 8 - HFPERCLK Enable"]
216 #[inline(always)]
217 pub fn hfperclken(&mut self) -> HFPERCLKEN_W {
218 HFPERCLKEN_W::new(self)
219 }
220 #[doc = "Writes raw bits to the register."]
221 #[inline(always)]
222 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
223 self.0.bits(bits);
224 self
225 }
226}
227#[doc = "High Frequency Peripheral Clock Division Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfperclkdiv](index.html) module"]
228pub struct HFPERCLKDIV_SPEC;
229impl crate::RegisterSpec for HFPERCLKDIV_SPEC {
230 type Ux = u32;
231}
232#[doc = "`read()` method returns [hfperclkdiv::R](R) reader structure"]
233impl crate::Readable for HFPERCLKDIV_SPEC {
234 type Reader = R;
235}
236#[doc = "`write(|w| ..)` method takes [hfperclkdiv::W](W) writer structure"]
237impl crate::Writable for HFPERCLKDIV_SPEC {
238 type Writer = W;
239}
240#[doc = "`reset()` method sets HFPERCLKDIV to value 0x0100"]
241impl crate::Resettable for HFPERCLKDIV_SPEC {
242 #[inline(always)]
243 fn reset_value() -> Self::Ux {
244 0x0100
245 }
246}