efm32g230_pac/gpio/
route.rs

1#[doc = "Register `ROUTE` reader"]
2pub struct R(crate::R<ROUTE_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<ROUTE_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<ROUTE_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<ROUTE_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `ROUTE` writer"]
17pub struct W(crate::W<ROUTE_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<ROUTE_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<ROUTE_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<ROUTE_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SWCLKPEN` reader - Serial Wire Clock Pin Enable"]
38pub type SWCLKPEN_R = crate::BitReader<bool>;
39#[doc = "Field `SWCLKPEN` writer - Serial Wire Clock Pin Enable"]
40pub type SWCLKPEN_W<'a> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, 0>;
41#[doc = "Field `SWDIOPEN` reader - Serial Wire Data Pin Enable"]
42pub type SWDIOPEN_R = crate::BitReader<bool>;
43#[doc = "Field `SWDIOPEN` writer - Serial Wire Data Pin Enable"]
44pub type SWDIOPEN_W<'a> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, 1>;
45#[doc = "Field `SWOPEN` reader - Serial Wire Viewer Output Pin Enable"]
46pub type SWOPEN_R = crate::BitReader<bool>;
47#[doc = "Field `SWOPEN` writer - Serial Wire Viewer Output Pin Enable"]
48pub type SWOPEN_W<'a> = crate::BitWriter<'a, u32, ROUTE_SPEC, bool, 2>;
49#[doc = "I/O Location\n\nValue on reset: 0"]
50#[derive(Clone, Copy, Debug, PartialEq)]
51#[repr(u8)]
52pub enum SWLOCATION_A {
53    #[doc = "0: Location 0"]
54    LOC0 = 0,
55    #[doc = "1: Location 1"]
56    LOC1 = 1,
57}
58impl From<SWLOCATION_A> for u8 {
59    #[inline(always)]
60    fn from(variant: SWLOCATION_A) -> Self {
61        variant as _
62    }
63}
64#[doc = "Field `SWLOCATION` reader - I/O Location"]
65pub type SWLOCATION_R = crate::FieldReader<u8, SWLOCATION_A>;
66impl SWLOCATION_R {
67    #[doc = "Get enumerated values variant"]
68    #[inline(always)]
69    pub fn variant(&self) -> Option<SWLOCATION_A> {
70        match self.bits {
71            0 => Some(SWLOCATION_A::LOC0),
72            1 => Some(SWLOCATION_A::LOC1),
73            _ => None,
74        }
75    }
76    #[doc = "Checks if the value of the field is `LOC0`"]
77    #[inline(always)]
78    pub fn is_loc0(&self) -> bool {
79        *self == SWLOCATION_A::LOC0
80    }
81    #[doc = "Checks if the value of the field is `LOC1`"]
82    #[inline(always)]
83    pub fn is_loc1(&self) -> bool {
84        *self == SWLOCATION_A::LOC1
85    }
86}
87#[doc = "Field `SWLOCATION` writer - I/O Location"]
88pub type SWLOCATION_W<'a> = crate::FieldWriter<'a, u32, ROUTE_SPEC, u8, SWLOCATION_A, 2, 8>;
89impl<'a> SWLOCATION_W<'a> {
90    #[doc = "Location 0"]
91    #[inline(always)]
92    pub fn loc0(self) -> &'a mut W {
93        self.variant(SWLOCATION_A::LOC0)
94    }
95    #[doc = "Location 1"]
96    #[inline(always)]
97    pub fn loc1(self) -> &'a mut W {
98        self.variant(SWLOCATION_A::LOC1)
99    }
100}
101impl R {
102    #[doc = "Bit 0 - Serial Wire Clock Pin Enable"]
103    #[inline(always)]
104    pub fn swclkpen(&self) -> SWCLKPEN_R {
105        SWCLKPEN_R::new((self.bits & 1) != 0)
106    }
107    #[doc = "Bit 1 - Serial Wire Data Pin Enable"]
108    #[inline(always)]
109    pub fn swdiopen(&self) -> SWDIOPEN_R {
110        SWDIOPEN_R::new(((self.bits >> 1) & 1) != 0)
111    }
112    #[doc = "Bit 2 - Serial Wire Viewer Output Pin Enable"]
113    #[inline(always)]
114    pub fn swopen(&self) -> SWOPEN_R {
115        SWOPEN_R::new(((self.bits >> 2) & 1) != 0)
116    }
117    #[doc = "Bits 8:9 - I/O Location"]
118    #[inline(always)]
119    pub fn swlocation(&self) -> SWLOCATION_R {
120        SWLOCATION_R::new(((self.bits >> 8) & 3) as u8)
121    }
122}
123impl W {
124    #[doc = "Bit 0 - Serial Wire Clock Pin Enable"]
125    #[inline(always)]
126    pub fn swclkpen(&mut self) -> SWCLKPEN_W {
127        SWCLKPEN_W::new(self)
128    }
129    #[doc = "Bit 1 - Serial Wire Data Pin Enable"]
130    #[inline(always)]
131    pub fn swdiopen(&mut self) -> SWDIOPEN_W {
132        SWDIOPEN_W::new(self)
133    }
134    #[doc = "Bit 2 - Serial Wire Viewer Output Pin Enable"]
135    #[inline(always)]
136    pub fn swopen(&mut self) -> SWOPEN_W {
137        SWOPEN_W::new(self)
138    }
139    #[doc = "Bits 8:9 - I/O Location"]
140    #[inline(always)]
141    pub fn swlocation(&mut self) -> SWLOCATION_W {
142        SWLOCATION_W::new(self)
143    }
144    #[doc = "Writes raw bits to the register."]
145    #[inline(always)]
146    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
147        self.0.bits(bits);
148        self
149    }
150}
151#[doc = "I/O Routing Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [route](index.html) module"]
152pub struct ROUTE_SPEC;
153impl crate::RegisterSpec for ROUTE_SPEC {
154    type Ux = u32;
155}
156#[doc = "`read()` method returns [route::R](R) reader structure"]
157impl crate::Readable for ROUTE_SPEC {
158    type Reader = R;
159}
160#[doc = "`write(|w| ..)` method takes [route::W](W) writer structure"]
161impl crate::Writable for ROUTE_SPEC {
162    type Writer = W;
163}
164#[doc = "`reset()` method sets ROUTE to value 0x03"]
165impl crate::Resettable for ROUTE_SPEC {
166    #[inline(always)]
167    fn reset_value() -> Self::Ux {
168        0x03
169    }
170}
efm32g230_pac/gpio/route.rs

efm32g230_pac/gpio/
route.rs
