efm32g230_pac/dma/
config.rs

1#[doc = "Register `CONFIG` writer"]
2pub struct W(crate::W<CONFIG_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<CONFIG_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<CONFIG_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<CONFIG_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `EN` writer - Enable DMA"]
23pub type EN_W<'a> = crate::BitWriter<'a, u32, CONFIG_SPEC, bool, 0>;
24#[doc = "Field `CHPROT` writer - Channel Protection Control"]
25pub type CHPROT_W<'a> = crate::BitWriter<'a, u32, CONFIG_SPEC, bool, 5>;
26impl W {
27    #[doc = "Bit 0 - Enable DMA"]
28    #[inline(always)]
29    pub fn en(&mut self) -> EN_W {
30        EN_W::new(self)
31    }
32    #[doc = "Bit 5 - Channel Protection Control"]
33    #[inline(always)]
34    pub fn chprot(&mut self) -> CHPROT_W {
35        CHPROT_W::new(self)
36    }
37    #[doc = "Writes raw bits to the register."]
38    #[inline(always)]
39    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
40        self.0.bits(bits);
41        self
42    }
43}
44#[doc = "DMA Configuration Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [config](index.html) module"]
45pub struct CONFIG_SPEC;
46impl crate::RegisterSpec for CONFIG_SPEC {
47    type Ux = u32;
48}
49#[doc = "`write(|w| ..)` method takes [config::W](W) writer structure"]
50impl crate::Writable for CONFIG_SPEC {
51    type Writer = W;
52}
53#[doc = "`reset()` method sets CONFIG to value 0"]
54impl crate::Resettable for CONFIG_SPEC {
55    #[inline(always)]
56    fn reset_value() -> Self::Ux {
57        0
58    }
59}