efm32g230_pac/leuart1/
ifc.rs1#[doc = "Register `IFC` writer"]
2pub struct W(crate::W<IFC_SPEC>);
3impl core::ops::Deref for W {
4 type Target = crate::W<IFC_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl core::ops::DerefMut for W {
11 #[inline(always)]
12 fn deref_mut(&mut self) -> &mut Self::Target {
13 &mut self.0
14 }
15}
16impl From<crate::W<IFC_SPEC>> for W {
17 #[inline(always)]
18 fn from(writer: crate::W<IFC_SPEC>) -> Self {
19 W(writer)
20 }
21}
22#[doc = "Field `TXC` writer - Clear TX Complete Interrupt Flag"]
23pub type TXC_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 0>;
24#[doc = "Field `RXOF` writer - Clear RX Overflow Interrupt Flag"]
25pub type RXOF_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 3>;
26#[doc = "Field `RXUF` writer - Clear RX Underflow Interrupt Flag"]
27pub type RXUF_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 4>;
28#[doc = "Field `TXOF` writer - Clear TX Overflow Interrupt Flag"]
29pub type TXOF_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 5>;
30#[doc = "Field `PERR` writer - Clear Parity Error Interrupt Flag"]
31pub type PERR_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 6>;
32#[doc = "Field `FERR` writer - Clear Framing Error Interrupt Flag"]
33pub type FERR_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 7>;
34#[doc = "Field `MPAF` writer - Clear Multi-Processor Address Frame Interrupt Flag"]
35pub type MPAF_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 8>;
36#[doc = "Field `STARTF` writer - Clear Start-Frame Interrupt Flag"]
37pub type STARTF_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 9>;
38#[doc = "Field `SIGF` writer - Clear Signal-Frame Interrupt Flag"]
39pub type SIGF_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 10>;
40impl W {
41 #[doc = "Bit 0 - Clear TX Complete Interrupt Flag"]
42 #[inline(always)]
43 pub fn txc(&mut self) -> TXC_W {
44 TXC_W::new(self)
45 }
46 #[doc = "Bit 3 - Clear RX Overflow Interrupt Flag"]
47 #[inline(always)]
48 pub fn rxof(&mut self) -> RXOF_W {
49 RXOF_W::new(self)
50 }
51 #[doc = "Bit 4 - Clear RX Underflow Interrupt Flag"]
52 #[inline(always)]
53 pub fn rxuf(&mut self) -> RXUF_W {
54 RXUF_W::new(self)
55 }
56 #[doc = "Bit 5 - Clear TX Overflow Interrupt Flag"]
57 #[inline(always)]
58 pub fn txof(&mut self) -> TXOF_W {
59 TXOF_W::new(self)
60 }
61 #[doc = "Bit 6 - Clear Parity Error Interrupt Flag"]
62 #[inline(always)]
63 pub fn perr(&mut self) -> PERR_W {
64 PERR_W::new(self)
65 }
66 #[doc = "Bit 7 - Clear Framing Error Interrupt Flag"]
67 #[inline(always)]
68 pub fn ferr(&mut self) -> FERR_W {
69 FERR_W::new(self)
70 }
71 #[doc = "Bit 8 - Clear Multi-Processor Address Frame Interrupt Flag"]
72 #[inline(always)]
73 pub fn mpaf(&mut self) -> MPAF_W {
74 MPAF_W::new(self)
75 }
76 #[doc = "Bit 9 - Clear Start-Frame Interrupt Flag"]
77 #[inline(always)]
78 pub fn startf(&mut self) -> STARTF_W {
79 STARTF_W::new(self)
80 }
81 #[doc = "Bit 10 - Clear Signal-Frame Interrupt Flag"]
82 #[inline(always)]
83 pub fn sigf(&mut self) -> SIGF_W {
84 SIGF_W::new(self)
85 }
86 #[doc = "Writes raw bits to the register."]
87 #[inline(always)]
88 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
89 self.0.bits(bits);
90 self
91 }
92}
93#[doc = "Interrupt Flag Clear Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ifc](index.html) module"]
94pub struct IFC_SPEC;
95impl crate::RegisterSpec for IFC_SPEC {
96 type Ux = u32;
97}
98#[doc = "`write(|w| ..)` method takes [ifc::W](W) writer structure"]
99impl crate::Writable for IFC_SPEC {
100 type Writer = W;
101}
102#[doc = "`reset()` method sets IFC to value 0"]
103impl crate::Resettable for IFC_SPEC {
104 #[inline(always)]
105 fn reset_value() -> Self::Ux {
106 0
107 }
108}