efm32g230_pac/dac0/
ctrl.rs

1#[doc = "Register `CTRL` reader"]
2pub struct R(crate::R<CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTRL` writer"]
17pub struct W(crate::W<CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `DIFF` reader - Differential Mode"]
38pub type DIFF_R = crate::BitReader<bool>;
39#[doc = "Field `DIFF` writer - Differential Mode"]
40pub type DIFF_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 0>;
41#[doc = "Field `SINEMODE` reader - Sine Mode"]
42pub type SINEMODE_R = crate::BitReader<bool>;
43#[doc = "Field `SINEMODE` writer - Sine Mode"]
44pub type SINEMODE_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 1>;
45#[doc = "Conversion Mode\n\nValue on reset: 0"]
46#[derive(Clone, Copy, Debug, PartialEq)]
47#[repr(u8)]
48pub enum CONVMODE_A {
49    #[doc = "0: DAC is set in continuous mode"]
50    CONTINUOUS = 0,
51    #[doc = "1: DAC is set in sample/hold mode"]
52    SAMPLEHOLD = 1,
53    #[doc = "2: DAC is set in sample/shut off mode"]
54    SAMPLEOFF = 2,
55}
56impl From<CONVMODE_A> for u8 {
57    #[inline(always)]
58    fn from(variant: CONVMODE_A) -> Self {
59        variant as _
60    }
61}
62#[doc = "Field `CONVMODE` reader - Conversion Mode"]
63pub type CONVMODE_R = crate::FieldReader<u8, CONVMODE_A>;
64impl CONVMODE_R {
65    #[doc = "Get enumerated values variant"]
66    #[inline(always)]
67    pub fn variant(&self) -> Option<CONVMODE_A> {
68        match self.bits {
69            0 => Some(CONVMODE_A::CONTINUOUS),
70            1 => Some(CONVMODE_A::SAMPLEHOLD),
71            2 => Some(CONVMODE_A::SAMPLEOFF),
72            _ => None,
73        }
74    }
75    #[doc = "Checks if the value of the field is `CONTINUOUS`"]
76    #[inline(always)]
77    pub fn is_continuous(&self) -> bool {
78        *self == CONVMODE_A::CONTINUOUS
79    }
80    #[doc = "Checks if the value of the field is `SAMPLEHOLD`"]
81    #[inline(always)]
82    pub fn is_samplehold(&self) -> bool {
83        *self == CONVMODE_A::SAMPLEHOLD
84    }
85    #[doc = "Checks if the value of the field is `SAMPLEOFF`"]
86    #[inline(always)]
87    pub fn is_sampleoff(&self) -> bool {
88        *self == CONVMODE_A::SAMPLEOFF
89    }
90}
91#[doc = "Field `CONVMODE` writer - Conversion Mode"]
92pub type CONVMODE_W<'a> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, CONVMODE_A, 2, 2>;
93impl<'a> CONVMODE_W<'a> {
94    #[doc = "DAC is set in continuous mode"]
95    #[inline(always)]
96    pub fn continuous(self) -> &'a mut W {
97        self.variant(CONVMODE_A::CONTINUOUS)
98    }
99    #[doc = "DAC is set in sample/hold mode"]
100    #[inline(always)]
101    pub fn samplehold(self) -> &'a mut W {
102        self.variant(CONVMODE_A::SAMPLEHOLD)
103    }
104    #[doc = "DAC is set in sample/shut off mode"]
105    #[inline(always)]
106    pub fn sampleoff(self) -> &'a mut W {
107        self.variant(CONVMODE_A::SAMPLEOFF)
108    }
109}
110#[doc = "Output Mode\n\nValue on reset: 1"]
111#[derive(Clone, Copy, Debug, PartialEq)]
112#[repr(u8)]
113pub enum OUTMODE_A {
114    #[doc = "0: DAC output to pin and ADC disabled"]
115    DISABLE = 0,
116    #[doc = "1: DAC output to pin enabled. DAC output to ADC disabled"]
117    PIN = 1,
118    #[doc = "2: DAC output to pin disabled. DAC output to ADC enabled"]
119    ADC = 2,
120    #[doc = "3: DAC output to pin and ADC enabled"]
121    PINADC = 3,
122}
123impl From<OUTMODE_A> for u8 {
124    #[inline(always)]
125    fn from(variant: OUTMODE_A) -> Self {
126        variant as _
127    }
128}
129#[doc = "Field `OUTMODE` reader - Output Mode"]
130pub type OUTMODE_R = crate::FieldReader<u8, OUTMODE_A>;
131impl OUTMODE_R {
132    #[doc = "Get enumerated values variant"]
133    #[inline(always)]
134    pub fn variant(&self) -> OUTMODE_A {
135        match self.bits {
136            0 => OUTMODE_A::DISABLE,
137            1 => OUTMODE_A::PIN,
138            2 => OUTMODE_A::ADC,
139            3 => OUTMODE_A::PINADC,
140            _ => unreachable!(),
141        }
142    }
143    #[doc = "Checks if the value of the field is `DISABLE`"]
144    #[inline(always)]
145    pub fn is_disable(&self) -> bool {
146        *self == OUTMODE_A::DISABLE
147    }
148    #[doc = "Checks if the value of the field is `PIN`"]
149    #[inline(always)]
150    pub fn is_pin(&self) -> bool {
151        *self == OUTMODE_A::PIN
152    }
153    #[doc = "Checks if the value of the field is `ADC`"]
154    #[inline(always)]
155    pub fn is_adc(&self) -> bool {
156        *self == OUTMODE_A::ADC
157    }
158    #[doc = "Checks if the value of the field is `PINADC`"]
159    #[inline(always)]
160    pub fn is_pinadc(&self) -> bool {
161        *self == OUTMODE_A::PINADC
162    }
163}
164#[doc = "Field `OUTMODE` writer - Output Mode"]
165pub type OUTMODE_W<'a> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, OUTMODE_A, 2, 4>;
166impl<'a> OUTMODE_W<'a> {
167    #[doc = "DAC output to pin and ADC disabled"]
168    #[inline(always)]
169    pub fn disable(self) -> &'a mut W {
170        self.variant(OUTMODE_A::DISABLE)
171    }
172    #[doc = "DAC output to pin enabled. DAC output to ADC disabled"]
173    #[inline(always)]
174    pub fn pin(self) -> &'a mut W {
175        self.variant(OUTMODE_A::PIN)
176    }
177    #[doc = "DAC output to pin disabled. DAC output to ADC enabled"]
178    #[inline(always)]
179    pub fn adc(self) -> &'a mut W {
180        self.variant(OUTMODE_A::ADC)
181    }
182    #[doc = "DAC output to pin and ADC enabled"]
183    #[inline(always)]
184    pub fn pinadc(self) -> &'a mut W {
185        self.variant(OUTMODE_A::PINADC)
186    }
187}
188#[doc = "Field `OUTENPRS` reader - PRS Controlled Output Enable"]
189pub type OUTENPRS_R = crate::BitReader<bool>;
190#[doc = "Field `OUTENPRS` writer - PRS Controlled Output Enable"]
191pub type OUTENPRS_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 6>;
192#[doc = "Field `CH0PRESCRST` reader - Channel 0 Start Reset Prescaler"]
193pub type CH0PRESCRST_R = crate::BitReader<bool>;
194#[doc = "Field `CH0PRESCRST` writer - Channel 0 Start Reset Prescaler"]
195pub type CH0PRESCRST_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 7>;
196#[doc = "Reference Selection\n\nValue on reset: 0"]
197#[derive(Clone, Copy, Debug, PartialEq)]
198#[repr(u8)]
199pub enum REFSEL_A {
200    #[doc = "0: Internal 1.25 V bandgap reference"]
201    _1V25 = 0,
202    #[doc = "1: Internal 2.5 V bandgap reference"]
203    _2V5 = 1,
204    #[doc = "2: VDD reference"]
205    VDD = 2,
206}
207impl From<REFSEL_A> for u8 {
208    #[inline(always)]
209    fn from(variant: REFSEL_A) -> Self {
210        variant as _
211    }
212}
213#[doc = "Field `REFSEL` reader - Reference Selection"]
214pub type REFSEL_R = crate::FieldReader<u8, REFSEL_A>;
215impl REFSEL_R {
216    #[doc = "Get enumerated values variant"]
217    #[inline(always)]
218    pub fn variant(&self) -> Option<REFSEL_A> {
219        match self.bits {
220            0 => Some(REFSEL_A::_1V25),
221            1 => Some(REFSEL_A::_2V5),
222            2 => Some(REFSEL_A::VDD),
223            _ => None,
224        }
225    }
226    #[doc = "Checks if the value of the field is `_1V25`"]
227    #[inline(always)]
228    pub fn is_1v25(&self) -> bool {
229        *self == REFSEL_A::_1V25
230    }
231    #[doc = "Checks if the value of the field is `_2V5`"]
232    #[inline(always)]
233    pub fn is_2v5(&self) -> bool {
234        *self == REFSEL_A::_2V5
235    }
236    #[doc = "Checks if the value of the field is `VDD`"]
237    #[inline(always)]
238    pub fn is_vdd(&self) -> bool {
239        *self == REFSEL_A::VDD
240    }
241}
242#[doc = "Field `REFSEL` writer - Reference Selection"]
243pub type REFSEL_W<'a> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, REFSEL_A, 2, 8>;
244impl<'a> REFSEL_W<'a> {
245    #[doc = "Internal 1.25 V bandgap reference"]
246    #[inline(always)]
247    pub fn _1v25(self) -> &'a mut W {
248        self.variant(REFSEL_A::_1V25)
249    }
250    #[doc = "Internal 2.5 V bandgap reference"]
251    #[inline(always)]
252    pub fn _2v5(self) -> &'a mut W {
253        self.variant(REFSEL_A::_2V5)
254    }
255    #[doc = "VDD reference"]
256    #[inline(always)]
257    pub fn vdd(self) -> &'a mut W {
258        self.variant(REFSEL_A::VDD)
259    }
260}
261#[doc = "Prescaler Setting\n\nValue on reset: 0"]
262#[derive(Clone, Copy, Debug, PartialEq)]
263#[repr(u8)]
264pub enum PRESC_A {
265    #[doc = "0: `0`"]
266    NODIVISION = 0,
267}
268impl From<PRESC_A> for u8 {
269    #[inline(always)]
270    fn from(variant: PRESC_A) -> Self {
271        variant as _
272    }
273}
274#[doc = "Field `PRESC` reader - Prescaler Setting"]
275pub type PRESC_R = crate::FieldReader<u8, PRESC_A>;
276impl PRESC_R {
277    #[doc = "Get enumerated values variant"]
278    #[inline(always)]
279    pub fn variant(&self) -> Option<PRESC_A> {
280        match self.bits {
281            0 => Some(PRESC_A::NODIVISION),
282            _ => None,
283        }
284    }
285    #[doc = "Checks if the value of the field is `NODIVISION`"]
286    #[inline(always)]
287    pub fn is_nodivision(&self) -> bool {
288        *self == PRESC_A::NODIVISION
289    }
290}
291#[doc = "Field `PRESC` writer - Prescaler Setting"]
292pub type PRESC_W<'a> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, PRESC_A, 3, 16>;
293impl<'a> PRESC_W<'a> {
294    #[doc = "`0`"]
295    #[inline(always)]
296    pub fn nodivision(self) -> &'a mut W {
297        self.variant(PRESC_A::NODIVISION)
298    }
299}
300#[doc = "Refresh Interval Select\n\nValue on reset: 0"]
301#[derive(Clone, Copy, Debug, PartialEq)]
302#[repr(u8)]
303pub enum REFRSEL_A {
304    #[doc = "0: All channels with enabled refresh are refreshed every 8 prescaled cycles"]
305    _8CYCLES = 0,
306    #[doc = "1: All channels with enabled refresh are refreshed every 16 prescaled cycles"]
307    _16CYCLES = 1,
308    #[doc = "2: All channels with enabled refresh are refreshed every 32 prescaled cycles"]
309    _32CYCLES = 2,
310    #[doc = "3: All channels with enabled refresh are refreshed every 64 prescaled cycles"]
311    _64CYCLES = 3,
312}
313impl From<REFRSEL_A> for u8 {
314    #[inline(always)]
315    fn from(variant: REFRSEL_A) -> Self {
316        variant as _
317    }
318}
319#[doc = "Field `REFRSEL` reader - Refresh Interval Select"]
320pub type REFRSEL_R = crate::FieldReader<u8, REFRSEL_A>;
321impl REFRSEL_R {
322    #[doc = "Get enumerated values variant"]
323    #[inline(always)]
324    pub fn variant(&self) -> REFRSEL_A {
325        match self.bits {
326            0 => REFRSEL_A::_8CYCLES,
327            1 => REFRSEL_A::_16CYCLES,
328            2 => REFRSEL_A::_32CYCLES,
329            3 => REFRSEL_A::_64CYCLES,
330            _ => unreachable!(),
331        }
332    }
333    #[doc = "Checks if the value of the field is `_8CYCLES`"]
334    #[inline(always)]
335    pub fn is_8cycles(&self) -> bool {
336        *self == REFRSEL_A::_8CYCLES
337    }
338    #[doc = "Checks if the value of the field is `_16CYCLES`"]
339    #[inline(always)]
340    pub fn is_16cycles(&self) -> bool {
341        *self == REFRSEL_A::_16CYCLES
342    }
343    #[doc = "Checks if the value of the field is `_32CYCLES`"]
344    #[inline(always)]
345    pub fn is_32cycles(&self) -> bool {
346        *self == REFRSEL_A::_32CYCLES
347    }
348    #[doc = "Checks if the value of the field is `_64CYCLES`"]
349    #[inline(always)]
350    pub fn is_64cycles(&self) -> bool {
351        *self == REFRSEL_A::_64CYCLES
352    }
353}
354#[doc = "Field `REFRSEL` writer - Refresh Interval Select"]
355pub type REFRSEL_W<'a> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, REFRSEL_A, 2, 20>;
356impl<'a> REFRSEL_W<'a> {
357    #[doc = "All channels with enabled refresh are refreshed every 8 prescaled cycles"]
358    #[inline(always)]
359    pub fn _8cycles(self) -> &'a mut W {
360        self.variant(REFRSEL_A::_8CYCLES)
361    }
362    #[doc = "All channels with enabled refresh are refreshed every 16 prescaled cycles"]
363    #[inline(always)]
364    pub fn _16cycles(self) -> &'a mut W {
365        self.variant(REFRSEL_A::_16CYCLES)
366    }
367    #[doc = "All channels with enabled refresh are refreshed every 32 prescaled cycles"]
368    #[inline(always)]
369    pub fn _32cycles(self) -> &'a mut W {
370        self.variant(REFRSEL_A::_32CYCLES)
371    }
372    #[doc = "All channels with enabled refresh are refreshed every 64 prescaled cycles"]
373    #[inline(always)]
374    pub fn _64cycles(self) -> &'a mut W {
375        self.variant(REFRSEL_A::_64CYCLES)
376    }
377}
378impl R {
379    #[doc = "Bit 0 - Differential Mode"]
380    #[inline(always)]
381    pub fn diff(&self) -> DIFF_R {
382        DIFF_R::new((self.bits & 1) != 0)
383    }
384    #[doc = "Bit 1 - Sine Mode"]
385    #[inline(always)]
386    pub fn sinemode(&self) -> SINEMODE_R {
387        SINEMODE_R::new(((self.bits >> 1) & 1) != 0)
388    }
389    #[doc = "Bits 2:3 - Conversion Mode"]
390    #[inline(always)]
391    pub fn convmode(&self) -> CONVMODE_R {
392        CONVMODE_R::new(((self.bits >> 2) & 3) as u8)
393    }
394    #[doc = "Bits 4:5 - Output Mode"]
395    #[inline(always)]
396    pub fn outmode(&self) -> OUTMODE_R {
397        OUTMODE_R::new(((self.bits >> 4) & 3) as u8)
398    }
399    #[doc = "Bit 6 - PRS Controlled Output Enable"]
400    #[inline(always)]
401    pub fn outenprs(&self) -> OUTENPRS_R {
402        OUTENPRS_R::new(((self.bits >> 6) & 1) != 0)
403    }
404    #[doc = "Bit 7 - Channel 0 Start Reset Prescaler"]
405    #[inline(always)]
406    pub fn ch0prescrst(&self) -> CH0PRESCRST_R {
407        CH0PRESCRST_R::new(((self.bits >> 7) & 1) != 0)
408    }
409    #[doc = "Bits 8:9 - Reference Selection"]
410    #[inline(always)]
411    pub fn refsel(&self) -> REFSEL_R {
412        REFSEL_R::new(((self.bits >> 8) & 3) as u8)
413    }
414    #[doc = "Bits 16:18 - Prescaler Setting"]
415    #[inline(always)]
416    pub fn presc(&self) -> PRESC_R {
417        PRESC_R::new(((self.bits >> 16) & 7) as u8)
418    }
419    #[doc = "Bits 20:21 - Refresh Interval Select"]
420    #[inline(always)]
421    pub fn refrsel(&self) -> REFRSEL_R {
422        REFRSEL_R::new(((self.bits >> 20) & 3) as u8)
423    }
424}
425impl W {
426    #[doc = "Bit 0 - Differential Mode"]
427    #[inline(always)]
428    pub fn diff(&mut self) -> DIFF_W {
429        DIFF_W::new(self)
430    }
431    #[doc = "Bit 1 - Sine Mode"]
432    #[inline(always)]
433    pub fn sinemode(&mut self) -> SINEMODE_W {
434        SINEMODE_W::new(self)
435    }
436    #[doc = "Bits 2:3 - Conversion Mode"]
437    #[inline(always)]
438    pub fn convmode(&mut self) -> CONVMODE_W {
439        CONVMODE_W::new(self)
440    }
441    #[doc = "Bits 4:5 - Output Mode"]
442    #[inline(always)]
443    pub fn outmode(&mut self) -> OUTMODE_W {
444        OUTMODE_W::new(self)
445    }
446    #[doc = "Bit 6 - PRS Controlled Output Enable"]
447    #[inline(always)]
448    pub fn outenprs(&mut self) -> OUTENPRS_W {
449        OUTENPRS_W::new(self)
450    }
451    #[doc = "Bit 7 - Channel 0 Start Reset Prescaler"]
452    #[inline(always)]
453    pub fn ch0prescrst(&mut self) -> CH0PRESCRST_W {
454        CH0PRESCRST_W::new(self)
455    }
456    #[doc = "Bits 8:9 - Reference Selection"]
457    #[inline(always)]
458    pub fn refsel(&mut self) -> REFSEL_W {
459        REFSEL_W::new(self)
460    }
461    #[doc = "Bits 16:18 - Prescaler Setting"]
462    #[inline(always)]
463    pub fn presc(&mut self) -> PRESC_W {
464        PRESC_W::new(self)
465    }
466    #[doc = "Bits 20:21 - Refresh Interval Select"]
467    #[inline(always)]
468    pub fn refrsel(&mut self) -> REFRSEL_W {
469        REFRSEL_W::new(self)
470    }
471    #[doc = "Writes raw bits to the register."]
472    #[inline(always)]
473    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
474        self.0.bits(bits);
475        self
476    }
477}
478#[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"]
479pub struct CTRL_SPEC;
480impl crate::RegisterSpec for CTRL_SPEC {
481    type Ux = u32;
482}
483#[doc = "`read()` method returns [ctrl::R](R) reader structure"]
484impl crate::Readable for CTRL_SPEC {
485    type Reader = R;
486}
487#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"]
488impl crate::Writable for CTRL_SPEC {
489    type Writer = W;
490}
491#[doc = "`reset()` method sets CTRL to value 0x10"]
492impl crate::Resettable for CTRL_SPEC {
493    #[inline(always)]
494    fn reset_value() -> Self::Ux {
495        0x10
496    }
497}
efm32g230_pac/dac0/ctrl.rs

efm32g230_pac/dac0/
ctrl.rs
