efm32g230_pac/dma/
altctrlbase.rs1#[doc = "Register `ALTCTRLBASE` reader"]
2pub struct R(crate::R<ALTCTRLBASE_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<ALTCTRLBASE_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<ALTCTRLBASE_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<ALTCTRLBASE_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Field `ALTCTRLBASE` reader - Channel Alternate Control Data Base Pointer"]
17pub type ALTCTRLBASE_R = crate::FieldReader<u32, u32>;
18impl R {
19 #[doc = "Bits 0:31 - Channel Alternate Control Data Base Pointer"]
20 #[inline(always)]
21 pub fn altctrlbase(&self) -> ALTCTRLBASE_R {
22 ALTCTRLBASE_R::new(self.bits)
23 }
24}
25#[doc = "Channel Alternate Control Data Base Pointer Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [altctrlbase](index.html) module"]
26pub struct ALTCTRLBASE_SPEC;
27impl crate::RegisterSpec for ALTCTRLBASE_SPEC {
28 type Ux = u32;
29}
30#[doc = "`read()` method returns [altctrlbase::R](R) reader structure"]
31impl crate::Readable for ALTCTRLBASE_SPEC {
32 type Reader = R;
33}
34#[doc = "`reset()` method sets ALTCTRLBASE to value 0x80"]
35impl crate::Resettable for ALTCTRLBASE_SPEC {
36 #[inline(always)]
37 fn reset_value() -> Self::Ux {
38 0x80
39 }
40}