1#[doc = "Register `IFC` writer"]
2pub struct W(crate::W<IFC_SPEC>);
3impl core::ops::Deref for W {
4 type Target = crate::W<IFC_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl core::ops::DerefMut for W {
11 #[inline(always)]
12 fn deref_mut(&mut self) -> &mut Self::Target {
13 &mut self.0
14 }
15}
16impl From<crate::W<IFC_SPEC>> for W {
17 #[inline(always)]
18 fn from(writer: crate::W<IFC_SPEC>) -> Self {
19 W(writer)
20 }
21}
22#[doc = "Field `CH0DONE` writer - DMA Channel 0 Complete Interrupt Flag Clear"]
23pub type CH0DONE_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 0>;
24#[doc = "Field `CH1DONE` writer - DMA Channel 1 Complete Interrupt Flag Clear"]
25pub type CH1DONE_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 1>;
26#[doc = "Field `CH2DONE` writer - DMA Channel 2 Complete Interrupt Flag Clear"]
27pub type CH2DONE_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 2>;
28#[doc = "Field `CH3DONE` writer - DMA Channel 3 Complete Interrupt Flag Clear"]
29pub type CH3DONE_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 3>;
30#[doc = "Field `CH4DONE` writer - DMA Channel 4 Complete Interrupt Flag Clear"]
31pub type CH4DONE_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 4>;
32#[doc = "Field `CH5DONE` writer - DMA Channel 5 Complete Interrupt Flag Clear"]
33pub type CH5DONE_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 5>;
34#[doc = "Field `CH6DONE` writer - DMA Channel 6 Complete Interrupt Flag Clear"]
35pub type CH6DONE_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 6>;
36#[doc = "Field `CH7DONE` writer - DMA Channel 7 Complete Interrupt Flag Clear"]
37pub type CH7DONE_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 7>;
38#[doc = "Field `ERR` writer - DMA Error Interrupt Flag Clear"]
39pub type ERR_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 31>;
40impl W {
41 #[doc = "Bit 0 - DMA Channel 0 Complete Interrupt Flag Clear"]
42 #[inline(always)]
43 pub fn ch0done(&mut self) -> CH0DONE_W {
44 CH0DONE_W::new(self)
45 }
46 #[doc = "Bit 1 - DMA Channel 1 Complete Interrupt Flag Clear"]
47 #[inline(always)]
48 pub fn ch1done(&mut self) -> CH1DONE_W {
49 CH1DONE_W::new(self)
50 }
51 #[doc = "Bit 2 - DMA Channel 2 Complete Interrupt Flag Clear"]
52 #[inline(always)]
53 pub fn ch2done(&mut self) -> CH2DONE_W {
54 CH2DONE_W::new(self)
55 }
56 #[doc = "Bit 3 - DMA Channel 3 Complete Interrupt Flag Clear"]
57 #[inline(always)]
58 pub fn ch3done(&mut self) -> CH3DONE_W {
59 CH3DONE_W::new(self)
60 }
61 #[doc = "Bit 4 - DMA Channel 4 Complete Interrupt Flag Clear"]
62 #[inline(always)]
63 pub fn ch4done(&mut self) -> CH4DONE_W {
64 CH4DONE_W::new(self)
65 }
66 #[doc = "Bit 5 - DMA Channel 5 Complete Interrupt Flag Clear"]
67 #[inline(always)]
68 pub fn ch5done(&mut self) -> CH5DONE_W {
69 CH5DONE_W::new(self)
70 }
71 #[doc = "Bit 6 - DMA Channel 6 Complete Interrupt Flag Clear"]
72 #[inline(always)]
73 pub fn ch6done(&mut self) -> CH6DONE_W {
74 CH6DONE_W::new(self)
75 }
76 #[doc = "Bit 7 - DMA Channel 7 Complete Interrupt Flag Clear"]
77 #[inline(always)]
78 pub fn ch7done(&mut self) -> CH7DONE_W {
79 CH7DONE_W::new(self)
80 }
81 #[doc = "Bit 31 - DMA Error Interrupt Flag Clear"]
82 #[inline(always)]
83 pub fn err(&mut self) -> ERR_W {
84 ERR_W::new(self)
85 }
86 #[doc = "Writes raw bits to the register."]
87 #[inline(always)]
88 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
89 self.0.bits(bits);
90 self
91 }
92}
93#[doc = "Interrupt Flag Clear Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ifc](index.html) module"]
94pub struct IFC_SPEC;
95impl crate::RegisterSpec for IFC_SPEC {
96 type Ux = u32;
97}
98#[doc = "`write(|w| ..)` method takes [ifc::W](W) writer structure"]
99impl crate::Writable for IFC_SPEC {
100 type Writer = W;
101}
102#[doc = "`reset()` method sets IFC to value 0"]
103impl crate::Resettable for IFC_SPEC {
104 #[inline(always)]
105 fn reset_value() -> Self::Ux {
106 0
107 }
108}