/*
(c) (2016-2024), Cypress Semiconductor Corporation (an Infineon company)
or an affiliate of Cypress Semiconductor Corporation.
SPDX-License-Identifier: Apache-2.0
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
// Generated from SVD 1.0, with svd2pac 0.6.0 on Tue, 27 May 2025 19:21:54 +0000
#![allow(clippy::identity_op)]
#![allow(clippy::module_inception)]
#![allow(clippy::derivable_impls)]
#[allow(unused_imports)]
use crate::common::sealed;
#[allow(unused_imports)]
use crate::common::*;
#[doc = r"Datawire Controller"]
unsafe impl ::core::marker::Send for super::Dw {}
unsafe impl ::core::marker::Sync for super::Dw {}
impl super::Dw {
#[allow(unused)]
#[inline(always)]
pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
self.ptr
}
#[doc = "Control"]
#[inline(always)]
pub const fn ctl(&self) -> &'static crate::common::Reg<self::Ctl_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<self::Ctl_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0usize),
)
}
}
#[doc = "Status"]
#[inline(always)]
pub const fn status(&self) -> &'static crate::common::Reg<self::Status_SPEC, crate::common::R> {
unsafe {
crate::common::Reg::<self::Status_SPEC, crate::common::R>::from_ptr(
self._svd2pac_as_ptr().add(4usize),
)
}
}
#[doc = "Pending channels"]
#[inline(always)]
pub const fn pending(
&self,
) -> &'static crate::common::Reg<self::Pending_SPEC, crate::common::R> {
unsafe {
crate::common::Reg::<self::Pending_SPEC, crate::common::R>::from_ptr(
self._svd2pac_as_ptr().add(8usize),
)
}
}
#[doc = "System interrupt control"]
#[inline(always)]
pub const fn status_intr(
&self,
) -> &'static crate::common::Reg<self::StatusIntr_SPEC, crate::common::R> {
unsafe {
crate::common::Reg::<self::StatusIntr_SPEC, crate::common::R>::from_ptr(
self._svd2pac_as_ptr().add(16usize),
)
}
}
#[doc = "Status of interrupts masked"]
#[inline(always)]
pub const fn status_intr_masked(
&self,
) -> &'static crate::common::Reg<self::StatusIntrMasked_SPEC, crate::common::R> {
unsafe {
crate::common::Reg::<self::StatusIntrMasked_SPEC, crate::common::R>::from_ptr(
self._svd2pac_as_ptr().add(20usize),
)
}
}
#[doc = "Active descriptor control"]
#[inline(always)]
pub const fn act_descr_ctl(
&self,
) -> &'static crate::common::Reg<self::ActDescrCtl_SPEC, crate::common::R> {
unsafe {
crate::common::Reg::<self::ActDescrCtl_SPEC, crate::common::R>::from_ptr(
self._svd2pac_as_ptr().add(32usize),
)
}
}
#[doc = "Active descriptor source"]
#[inline(always)]
pub const fn act_descr_src(
&self,
) -> &'static crate::common::Reg<self::ActDescrSrc_SPEC, crate::common::R> {
unsafe {
crate::common::Reg::<self::ActDescrSrc_SPEC, crate::common::R>::from_ptr(
self._svd2pac_as_ptr().add(36usize),
)
}
}
#[doc = "Active descriptor destination"]
#[inline(always)]
pub const fn act_descr_dst(
&self,
) -> &'static crate::common::Reg<self::ActDescrDst_SPEC, crate::common::R> {
unsafe {
crate::common::Reg::<self::ActDescrDst_SPEC, crate::common::R>::from_ptr(
self._svd2pac_as_ptr().add(40usize),
)
}
}
#[doc = "Active descriptor X loop control"]
#[inline(always)]
pub const fn act_descr_x_ctl(
&self,
) -> &'static crate::common::Reg<self::ActDescrXCtl_SPEC, crate::common::R> {
unsafe {
crate::common::Reg::<self::ActDescrXCtl_SPEC, crate::common::R>::from_ptr(
self._svd2pac_as_ptr().add(48usize),
)
}
}
#[doc = "Active descriptor Y loop control"]
#[inline(always)]
pub const fn act_descr_y_ctl(
&self,
) -> &'static crate::common::Reg<self::ActDescrYCtl_SPEC, crate::common::R> {
unsafe {
crate::common::Reg::<self::ActDescrYCtl_SPEC, crate::common::R>::from_ptr(
self._svd2pac_as_ptr().add(52usize),
)
}
}
#[doc = "Active descriptor next pointer"]
#[inline(always)]
pub const fn act_descr_next_ptr(
&self,
) -> &'static crate::common::Reg<self::ActDescrNextPtr_SPEC, crate::common::R> {
unsafe {
crate::common::Reg::<self::ActDescrNextPtr_SPEC, crate::common::R>::from_ptr(
self._svd2pac_as_ptr().add(56usize),
)
}
}
#[doc = "Active source"]
#[inline(always)]
pub const fn act_src(
&self,
) -> &'static crate::common::Reg<self::ActSrc_SPEC, crate::common::R> {
unsafe {
crate::common::Reg::<self::ActSrc_SPEC, crate::common::R>::from_ptr(
self._svd2pac_as_ptr().add(64usize),
)
}
}
#[doc = "Active destination"]
#[inline(always)]
pub const fn act_dst(
&self,
) -> &'static crate::common::Reg<self::ActDst_SPEC, crate::common::R> {
unsafe {
crate::common::Reg::<self::ActDst_SPEC, crate::common::R>::from_ptr(
self._svd2pac_as_ptr().add(68usize),
)
}
}
#[doc = "DW channel structure"]
#[inline(always)]
pub fn ch_struct(
self,
) -> &'static crate::common::ClusterRegisterArray<crate::dw::_ChStruct, 16, 0x20> {
unsafe {
crate::common::ClusterRegisterArray::from_ptr(self._svd2pac_as_ptr().add(0x800usize))
}
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Ctl_SPEC;
impl crate::sealed::RegSpec for Ctl_SPEC {
type DataType = u32;
}
#[doc = "Control"]
pub type Ctl = crate::RegValueT<Ctl_SPEC>;
impl Ctl {
#[doc = "IP enable:\n\'0\': Disabled. Disabling the IP activates the IP\'s Active logic reset: Active logic and non-retention MMIO registers are reset (retention MMIO registers are not affected).\n\'1\': Enabled."]
#[inline(always)]
pub fn enabled(
self,
) -> crate::common::RegisterFieldBool<31, 1, 0, Ctl_SPEC, crate::common::RW> {
crate::common::RegisterFieldBool::<31, 1, 0, Ctl_SPEC, crate::common::RW>::from_register(
self, 0,
)
}
}
impl ::core::default::Default for Ctl {
#[inline(always)]
fn default() -> Ctl {
<crate::RegValueT<Ctl_SPEC> as RegisterValue<_>>::new(0)
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Status_SPEC;
impl crate::sealed::RegSpec for Status_SPEC {
type DataType = u32;
}
#[doc = "Status"]
pub type Status = crate::RegValueT<Status_SPEC>;
impl Status {
#[doc = "Active channel, user/privileged access control:\n\'0\': user mode.\n\'1\': privileged mode."]
#[inline(always)]
pub fn p(self) -> crate::common::RegisterFieldBool<0, 1, 0, Status_SPEC, crate::common::R> {
crate::common::RegisterFieldBool::<0, 1, 0, Status_SPEC, crate::common::R>::from_register(
self, 0,
)
}
#[doc = "Active channel, secure/non-secure access control:\n\'0\': secure.\n\'1\': non-secure."]
#[inline(always)]
pub fn ns(self) -> crate::common::RegisterFieldBool<1, 1, 0, Status_SPEC, crate::common::R> {
crate::common::RegisterFieldBool::<1, 1, 0, Status_SPEC, crate::common::R>::from_register(
self, 0,
)
}
#[doc = "Active channel, non-bufferable/bufferable access control:\n\'0\': non-bufferable\n\'1\': bufferable."]
#[inline(always)]
pub fn b(self) -> crate::common::RegisterFieldBool<2, 1, 0, Status_SPEC, crate::common::R> {
crate::common::RegisterFieldBool::<2, 1, 0, Status_SPEC, crate::common::R>::from_register(
self, 0,
)
}
#[doc = "Active channel protection context."]
#[inline(always)]
pub fn pc(
self,
) -> crate::common::RegisterField<4, 0xf, 1, 0, u8, u8, Status_SPEC, crate::common::R> {
crate::common::RegisterField::<4,0xf,1,0,u8,u8,Status_SPEC,crate::common::R>::from_register(self,0)
}
#[doc = "Active channel index."]
#[inline(always)]
pub fn ch_idx(
self,
) -> crate::common::RegisterField<8, 0x1f, 1, 0, u8, u8, Status_SPEC, crate::common::R> {
crate::common::RegisterField::<8,0x1f,1,0,u8,u8,Status_SPEC,crate::common::R>::from_register(self,0)
}
#[doc = "Active channel priority."]
#[inline(always)]
pub fn prio(
self,
) -> crate::common::RegisterField<16, 0x3, 1, 0, u8, u8, Status_SPEC, crate::common::R> {
crate::common::RegisterField::<16,0x3,1,0,u8,u8,Status_SPEC,crate::common::R>::from_register(self,0)
}
#[doc = "Active channel preemptable."]
#[inline(always)]
pub fn preemptable(
self,
) -> crate::common::RegisterFieldBool<18, 1, 0, Status_SPEC, crate::common::R> {
crate::common::RegisterFieldBool::<18, 1, 0, Status_SPEC, crate::common::R>::from_register(
self, 0,
)
}
#[doc = "State of the DW controller. \n\'0\': Default/inactive state.\n\'1\': Loading descriptor.\n\'2\': Loading data element from source location.\n\'3\': Storing data element to destination location.\n\'4\': Update of active control information (e.g. source and destination addresses).\n\'5\': Wait for trigger de-activation."]
#[inline(always)]
pub fn state(
self,
) -> crate::common::RegisterField<20, 0x7, 1, 0, u8, u8, Status_SPEC, crate::common::R> {
crate::common::RegisterField::<20,0x7,1,0,u8,u8,Status_SPEC,crate::common::R>::from_register(self,0)
}
#[doc = "Active channel present: \n\'0\': No.\n\'1\': Yes."]
#[inline(always)]
pub fn active(
self,
) -> crate::common::RegisterFieldBool<31, 1, 0, Status_SPEC, crate::common::R> {
crate::common::RegisterFieldBool::<31, 1, 0, Status_SPEC, crate::common::R>::from_register(
self, 0,
)
}
}
impl ::core::default::Default for Status {
#[inline(always)]
fn default() -> Status {
<crate::RegValueT<Status_SPEC> as RegisterValue<_>>::new(0)
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Pending_SPEC;
impl crate::sealed::RegSpec for Pending_SPEC {
type DataType = u32;
}
#[doc = "Pending channels"]
pub type Pending = crate::RegValueT<Pending_SPEC>;
impl Pending {
#[doc = "Specifies pending DW channels; i.e. enabled channels whose trigger got activated. This field includes all channels that are in the pending state (not scheduled) or active state (scheduled and performing data transfer(s))."]
#[inline(always)]
pub fn ch_pending(
self,
) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, Pending_SPEC, crate::common::R>
{
crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,Pending_SPEC,crate::common::R>::from_register(self,0)
}
}
impl ::core::default::Default for Pending {
#[inline(always)]
fn default() -> Pending {
<crate::RegValueT<Pending_SPEC> as RegisterValue<_>>::new(0)
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct StatusIntr_SPEC;
impl crate::sealed::RegSpec for StatusIntr_SPEC {
type DataType = u32;
}
#[doc = "System interrupt control"]
pub type StatusIntr = crate::RegValueT<StatusIntr_SPEC>;
impl StatusIntr {
#[doc = "Reflects the INTR.CH bit fields of all channels."]
#[inline(always)]
pub fn ch(
self,
) -> crate::common::RegisterField<
0,
0xffffffff,
1,
0,
u32,
u32,
StatusIntr_SPEC,
crate::common::R,
> {
crate::common::RegisterField::<
0,
0xffffffff,
1,
0,
u32,
u32,
StatusIntr_SPEC,
crate::common::R,
>::from_register(self, 0)
}
}
impl ::core::default::Default for StatusIntr {
#[inline(always)]
fn default() -> StatusIntr {
<crate::RegValueT<StatusIntr_SPEC> as RegisterValue<_>>::new(0)
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct StatusIntrMasked_SPEC;
impl crate::sealed::RegSpec for StatusIntrMasked_SPEC {
type DataType = u32;
}
#[doc = "Status of interrupts masked"]
pub type StatusIntrMasked = crate::RegValueT<StatusIntrMasked_SPEC>;
impl StatusIntrMasked {
#[doc = "Reflects the INTR_MASKED.CH bit fields of all channels."]
#[inline(always)]
pub fn ch(
self,
) -> crate::common::RegisterField<
0,
0xffffffff,
1,
0,
u32,
u32,
StatusIntrMasked_SPEC,
crate::common::R,
> {
crate::common::RegisterField::<
0,
0xffffffff,
1,
0,
u32,
u32,
StatusIntrMasked_SPEC,
crate::common::R,
>::from_register(self, 0)
}
}
impl ::core::default::Default for StatusIntrMasked {
#[inline(always)]
fn default() -> StatusIntrMasked {
<crate::RegValueT<StatusIntrMasked_SPEC> as RegisterValue<_>>::new(0)
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct ActDescrCtl_SPEC;
impl crate::sealed::RegSpec for ActDescrCtl_SPEC {
type DataType = u32;
}
#[doc = "Active descriptor control"]
pub type ActDescrCtl = crate::RegValueT<ActDescrCtl_SPEC>;
impl ActDescrCtl {
#[doc = "Copy of DESCR_CTL of the currently active descriptor."]
#[inline(always)]
pub fn data(
self,
) -> crate::common::RegisterField<
0,
0xffffffff,
1,
0,
u32,
u32,
ActDescrCtl_SPEC,
crate::common::R,
> {
crate::common::RegisterField::<
0,
0xffffffff,
1,
0,
u32,
u32,
ActDescrCtl_SPEC,
crate::common::R,
>::from_register(self, 0)
}
}
impl ::core::default::Default for ActDescrCtl {
#[inline(always)]
fn default() -> ActDescrCtl {
<crate::RegValueT<ActDescrCtl_SPEC> as RegisterValue<_>>::new(0)
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct ActDescrSrc_SPEC;
impl crate::sealed::RegSpec for ActDescrSrc_SPEC {
type DataType = u32;
}
#[doc = "Active descriptor source"]
pub type ActDescrSrc = crate::RegValueT<ActDescrSrc_SPEC>;
impl ActDescrSrc {
#[doc = "Copy of DESCR_SRC of the currently active descriptor."]
#[inline(always)]
pub fn data(
self,
) -> crate::common::RegisterField<
0,
0xffffffff,
1,
0,
u32,
u32,
ActDescrSrc_SPEC,
crate::common::R,
> {
crate::common::RegisterField::<
0,
0xffffffff,
1,
0,
u32,
u32,
ActDescrSrc_SPEC,
crate::common::R,
>::from_register(self, 0)
}
}
impl ::core::default::Default for ActDescrSrc {
#[inline(always)]
fn default() -> ActDescrSrc {
<crate::RegValueT<ActDescrSrc_SPEC> as RegisterValue<_>>::new(0)
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct ActDescrDst_SPEC;
impl crate::sealed::RegSpec for ActDescrDst_SPEC {
type DataType = u32;
}
#[doc = "Active descriptor destination"]
pub type ActDescrDst = crate::RegValueT<ActDescrDst_SPEC>;
impl ActDescrDst {
#[doc = "Copy of DESCR_DST of the currently active descriptor."]
#[inline(always)]
pub fn data(
self,
) -> crate::common::RegisterField<
0,
0xffffffff,
1,
0,
u32,
u32,
ActDescrDst_SPEC,
crate::common::R,
> {
crate::common::RegisterField::<
0,
0xffffffff,
1,
0,
u32,
u32,
ActDescrDst_SPEC,
crate::common::R,
>::from_register(self, 0)
}
}
impl ::core::default::Default for ActDescrDst {
#[inline(always)]
fn default() -> ActDescrDst {
<crate::RegValueT<ActDescrDst_SPEC> as RegisterValue<_>>::new(0)
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct ActDescrXCtl_SPEC;
impl crate::sealed::RegSpec for ActDescrXCtl_SPEC {
type DataType = u32;
}
#[doc = "Active descriptor X loop control"]
pub type ActDescrXCtl = crate::RegValueT<ActDescrXCtl_SPEC>;
impl ActDescrXCtl {
#[doc = "Copy of DESCR_X_CTL of the currently active descriptor."]
#[inline(always)]
pub fn data(
self,
) -> crate::common::RegisterField<
0,
0xffffffff,
1,
0,
u32,
u32,
ActDescrXCtl_SPEC,
crate::common::R,
> {
crate::common::RegisterField::<
0,
0xffffffff,
1,
0,
u32,
u32,
ActDescrXCtl_SPEC,
crate::common::R,
>::from_register(self, 0)
}
}
impl ::core::default::Default for ActDescrXCtl {
#[inline(always)]
fn default() -> ActDescrXCtl {
<crate::RegValueT<ActDescrXCtl_SPEC> as RegisterValue<_>>::new(0)
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct ActDescrYCtl_SPEC;
impl crate::sealed::RegSpec for ActDescrYCtl_SPEC {
type DataType = u32;
}
#[doc = "Active descriptor Y loop control"]
pub type ActDescrYCtl = crate::RegValueT<ActDescrYCtl_SPEC>;
impl ActDescrYCtl {
#[doc = "Copy of DESCR_Y_CTL of the currently active descriptor."]
#[inline(always)]
pub fn data(
self,
) -> crate::common::RegisterField<
0,
0xffffffff,
1,
0,
u32,
u32,
ActDescrYCtl_SPEC,
crate::common::R,
> {
crate::common::RegisterField::<
0,
0xffffffff,
1,
0,
u32,
u32,
ActDescrYCtl_SPEC,
crate::common::R,
>::from_register(self, 0)
}
}
impl ::core::default::Default for ActDescrYCtl {
#[inline(always)]
fn default() -> ActDescrYCtl {
<crate::RegValueT<ActDescrYCtl_SPEC> as RegisterValue<_>>::new(0)
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct ActDescrNextPtr_SPEC;
impl crate::sealed::RegSpec for ActDescrNextPtr_SPEC {
type DataType = u32;
}
#[doc = "Active descriptor next pointer"]
pub type ActDescrNextPtr = crate::RegValueT<ActDescrNextPtr_SPEC>;
impl ActDescrNextPtr {
#[doc = "Copy of DESCR_NEXT_PTR of the currently active descriptor."]
#[inline(always)]
pub fn addr(
self,
) -> crate::common::RegisterField<
2,
0x3fffffff,
1,
0,
u32,
u32,
ActDescrNextPtr_SPEC,
crate::common::R,
> {
crate::common::RegisterField::<
2,
0x3fffffff,
1,
0,
u32,
u32,
ActDescrNextPtr_SPEC,
crate::common::R,
>::from_register(self, 0)
}
}
impl ::core::default::Default for ActDescrNextPtr {
#[inline(always)]
fn default() -> ActDescrNextPtr {
<crate::RegValueT<ActDescrNextPtr_SPEC> as RegisterValue<_>>::new(0)
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct ActSrc_SPEC;
impl crate::sealed::RegSpec for ActSrc_SPEC {
type DataType = u32;
}
#[doc = "Active source"]
pub type ActSrc = crate::RegValueT<ActSrc_SPEC>;
impl ActSrc {
#[doc = "Current address of source location."]
#[inline(always)]
pub fn src_addr(
self,
) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, ActSrc_SPEC, crate::common::R>
{
crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,ActSrc_SPEC,crate::common::R>::from_register(self,0)
}
}
impl ::core::default::Default for ActSrc {
#[inline(always)]
fn default() -> ActSrc {
<crate::RegValueT<ActSrc_SPEC> as RegisterValue<_>>::new(0)
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct ActDst_SPEC;
impl crate::sealed::RegSpec for ActDst_SPEC {
type DataType = u32;
}
#[doc = "Active destination"]
pub type ActDst = crate::RegValueT<ActDst_SPEC>;
impl ActDst {
#[doc = "Current address of destination location."]
#[inline(always)]
pub fn dst_addr(
self,
) -> crate::common::RegisterField<0, 0xffffffff, 1, 0, u32, u32, ActDst_SPEC, crate::common::R>
{
crate::common::RegisterField::<0,0xffffffff,1,0,u32,u32,ActDst_SPEC,crate::common::R>::from_register(self,0)
}
}
impl ::core::default::Default for ActDst {
#[inline(always)]
fn default() -> ActDst {
<crate::RegValueT<ActDst_SPEC> as RegisterValue<_>>::new(0)
}
}
#[doc = "DW channel structure"]
#[non_exhaustive]
pub struct _ChStruct;
#[doc = "DW channel structure"]
pub type ChStruct = &'static _ChStruct;
unsafe impl ::core::marker::Sync for _ChStruct {}
impl _ChStruct {
#[allow(unused)]
#[inline(always)]
pub(crate) const unsafe fn _svd2pac_from_ptr(ptr: *mut u8) -> &'static Self {
&*(ptr as *const _)
}
#[allow(unused)]
#[inline(always)]
pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
self as *const Self as *mut u8
}
#[doc = "Channel control"]
#[inline(always)]
pub const fn ch_ctl(
&self,
) -> &'static crate::common::Reg<ch_struct::ChCtl_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<ch_struct::ChCtl_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(0usize),
)
}
}
#[doc = "Channel status"]
#[inline(always)]
pub const fn ch_status(
&self,
) -> &'static crate::common::Reg<ch_struct::ChStatus_SPEC, crate::common::R> {
unsafe {
crate::common::Reg::<ch_struct::ChStatus_SPEC, crate::common::R>::from_ptr(
self._svd2pac_as_ptr().add(4usize),
)
}
}
#[doc = "Channel current indices"]
#[inline(always)]
pub const fn ch_idx(
&self,
) -> &'static crate::common::Reg<ch_struct::ChIdx_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<ch_struct::ChIdx_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(8usize),
)
}
}
#[doc = "Channel current descriptor pointer"]
#[inline(always)]
pub const fn ch_curr_ptr(
&self,
) -> &'static crate::common::Reg<ch_struct::ChCurrPtr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<ch_struct::ChCurrPtr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(12usize),
)
}
}
#[doc = "Interrupt"]
#[inline(always)]
pub const fn intr(
&self,
) -> &'static crate::common::Reg<ch_struct::Intr_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<ch_struct::Intr_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(16usize),
)
}
}
#[doc = "Interrupt set"]
#[inline(always)]
pub const fn intr_set(
&self,
) -> &'static crate::common::Reg<ch_struct::IntrSet_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<ch_struct::IntrSet_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(20usize),
)
}
}
#[doc = "Interrupt mask"]
#[inline(always)]
pub const fn intr_mask(
&self,
) -> &'static crate::common::Reg<ch_struct::IntrMask_SPEC, crate::common::RW> {
unsafe {
crate::common::Reg::<ch_struct::IntrMask_SPEC, crate::common::RW>::from_ptr(
self._svd2pac_as_ptr().add(24usize),
)
}
}
#[doc = "Interrupt masked"]
#[inline(always)]
pub const fn intr_masked(
&self,
) -> &'static crate::common::Reg<ch_struct::IntrMasked_SPEC, crate::common::R> {
unsafe {
crate::common::Reg::<ch_struct::IntrMasked_SPEC, crate::common::R>::from_ptr(
self._svd2pac_as_ptr().add(28usize),
)
}
}
}
pub mod ch_struct {
#[allow(unused_imports)]
use crate::common::*;
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct ChCtl_SPEC;
impl crate::sealed::RegSpec for ChCtl_SPEC {
type DataType = u32;
}
#[doc = "Channel control"]
pub type ChCtl = crate::RegValueT<ChCtl_SPEC>;
impl ChCtl {
#[doc = "User/privileged access control:\n\'0\': user mode.\n\'1\': privileged mode.\n\nThis field is set with the user/privileged access control of the transaction that writes this register; i.e. the \'write data\' is ignored and instead the access control is inherited from the write transaction (note the field attributes should be HW:RW, SW:R).\n\nAll transactions for this channel use the P field for the user/privileged access control (\'hprot\\[1\\]\')."]
#[inline(always)]
pub fn p(self) -> crate::common::RegisterFieldBool<0, 1, 0, ChCtl_SPEC, crate::common::RW> {
crate::common::RegisterFieldBool::<0,1,0,ChCtl_SPEC,crate::common::RW>::from_register(self,0)
}
#[doc = "Secure/on-secure access control:\n\'0\': secure.\n\'1\': non-secure.\n\nThis field is set with the secure/non-secure access control of the transaction that writes this register; i.e. the \'write data\' is ignored and instead the access control is inherited from the write transaction (note the field attributes should be HW:RW, SW:R).\n\nAll transactions for this channel use the NS field for the secure/non-secure access control (\'hprot\\[4\\]\')."]
#[inline(always)]
pub fn ns(
self,
) -> crate::common::RegisterFieldBool<1, 1, 0, ChCtl_SPEC, crate::common::RW> {
crate::common::RegisterFieldBool::<1,1,0,ChCtl_SPEC,crate::common::RW>::from_register(self,0)
}
#[doc = "Non-bufferable/bufferable access control:\n\'0\': non-bufferable.\n\'1\': bufferable.\n\nThis field is used to indicate to an AMBA bridge that a write transaction can complete without waiting for the destination to accept the write transaction data.\n\nAll transactions for this channel uses the B field for the non-bufferable/bufferable access control (\'hprot\\[2\\]\')."]
#[inline(always)]
pub fn b(self) -> crate::common::RegisterFieldBool<2, 1, 0, ChCtl_SPEC, crate::common::RW> {
crate::common::RegisterFieldBool::<2,1,0,ChCtl_SPEC,crate::common::RW>::from_register(self,0)
}
#[doc = "Protection context.\n\nThis field is set with the protection context of the transaction that writes this register; i.e. the \'write data\' is ignored and instead the context is inherited from the write transaction (note the field attributes should be HW:RW, SW:R).\n\nAll transactions for this channel uses the PC field for the protection context."]
#[inline(always)]
pub fn pc(
self,
) -> crate::common::RegisterField<4, 0xf, 1, 0, u8, u8, ChCtl_SPEC, crate::common::RW>
{
crate::common::RegisterField::<4,0xf,1,0,u8,u8,ChCtl_SPEC,crate::common::RW>::from_register(self,0)
}
#[doc = "Channel priority:\n\'0\': highest priority.\n\'1\'\n\'2\'\n\'3\': lowest priority.\n\nChannels with the same priority constitute a priority group. Priority decoding determines the highest priority pending channel. This channel is determined as follows. First, the highest priority group with pending channels is identified. Second, within this priority group, round robin arbitration is applied. Round robin arbitration (within a priority group) gives the highest priority to the lower channel indices (within the priority group)."]
#[inline(always)]
pub fn prio(
self,
) -> crate::common::RegisterField<16, 0x3, 1, 0, u8, u8, ChCtl_SPEC, crate::common::RW>
{
crate::common::RegisterField::<16,0x3,1,0,u8,u8,ChCtl_SPEC,crate::common::RW>::from_register(self,0)
}
#[doc = "Specifies if the channel is preemptable.\n\'0\': Not preemptable.\n\'1\': Preemptable. This field allows higher priority pending channels (from a higher priority group; i.e. an active channel can NOT be preempted by a pending channel in the same priority group) to preempt the active channel in between \'single transfers\' (a 1D transfer consists out of X_COUNT single transfers; a 2D transfer consists out of X_COUNT*Y_COUNT single transfers). Preemption will NOT affect the pending status of channel. As a result, after completion of a higher priority activated channel, the current channel may be reactivated."]
#[inline(always)]
pub fn preemptable(
self,
) -> crate::common::RegisterFieldBool<18, 1, 0, ChCtl_SPEC, crate::common::RW> {
crate::common::RegisterFieldBool::<18,1,0,ChCtl_SPEC,crate::common::RW>::from_register(self,0)
}
#[doc = "Channel enable:\n\'0\': Disabled. The channel\'s trigger is ignored and the channel cannot be made pending and therefore cannot be made active. If a pending channel is disabled, the channel is made non pending. If the activate channel is disabled, the channel is de-activated (bus transactions are completed). \n\'1\': Enabled.\n\nSW sets this field to \'1\' to enable a specific channel.\n\nHW sets this field to \'0\' on an error interrupt cause (the specific error is specified by CH_STATUS.INTR_CAUSE)."]
#[inline(always)]
pub fn enabled(
self,
) -> crate::common::RegisterFieldBool<31, 1, 0, ChCtl_SPEC, crate::common::RW> {
crate::common::RegisterFieldBool::<31,1,0,ChCtl_SPEC,crate::common::RW>::from_register(self,0)
}
}
impl ::core::default::Default for ChCtl {
#[inline(always)]
fn default() -> ChCtl {
<crate::RegValueT<ChCtl_SPEC> as RegisterValue<_>>::new(2)
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct ChStatus_SPEC;
impl crate::sealed::RegSpec for ChStatus_SPEC {
type DataType = u32;
}
#[doc = "Channel status"]
pub type ChStatus = crate::RegValueT<ChStatus_SPEC>;
impl ChStatus {
#[doc = "Specifies the source of the interrupt cause:\n\'0\': NO_INTR\n\'1\': COMPLETION\n\'2\': SRC_BUS_ERROR\n\'3\': DST_BUS_ERROR\n\'4\': SRC_MISAL\n\'5\': DST_MISAL\n\'6\': CURR_PTR_NULL\n\'7\': ACTIVE_CH_DISABLED\n\'8\': DESCR_BUS_ERROR\n\'9\'-\'15\': Not used.\n\nFor error related interrupt causes (INTR_CAUSE is \'2\', \'3\', ..., \'8\'), the channel is disabled (HW sets CH_CTL.ENABLED to \'0\')."]
#[inline(always)]
pub fn intr_cause(
self,
) -> crate::common::RegisterField<0, 0xf, 1, 0, u8, u8, ChStatus_SPEC, crate::common::R>
{
crate::common::RegisterField::<0,0xf,1,0,u8,u8,ChStatus_SPEC,crate::common::R>::from_register(self,0)
}
}
impl ::core::default::Default for ChStatus {
#[inline(always)]
fn default() -> ChStatus {
<crate::RegValueT<ChStatus_SPEC> as RegisterValue<_>>::new(0)
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct ChIdx_SPEC;
impl crate::sealed::RegSpec for ChIdx_SPEC {
type DataType = u32;
}
#[doc = "Channel current indices"]
pub type ChIdx = crate::RegValueT<ChIdx_SPEC>;
impl ChIdx {
#[doc = "Specifies the X loop index. In the range of \\[0, X_COUNT\\], with X_COUNT taken from the current descriptor. \n\nNote: HW sets this field to \'0\' when it updates the current descriptor pointer CH_CURR_PTR with DESCR_NEXT_PTR after execution of the current descriptor. \n\nNote: SW should set this field to \'0\' when it updates CH_CURR_PTR."]
#[inline(always)]
pub fn x_idx(
self,
) -> crate::common::RegisterField<0, 0xff, 1, 0, u8, u8, ChIdx_SPEC, crate::common::RW>
{
crate::common::RegisterField::<0,0xff,1,0,u8,u8,ChIdx_SPEC,crate::common::RW>::from_register(self,0)
}
#[doc = "Specifies the Y loop index, with X_COUNT taken from the current descriptor. \n\nNote: HW sets this field to \'0\' when it updates the current descriptor pointer CH_CURR_PTR with DESCR_NEXT_PTR after execution of the current descriptor. \n\nNote: SW should set this field to \'0\' when it updates CH_CURR_PTR."]
#[inline(always)]
pub fn y_idx(
self,
) -> crate::common::RegisterField<8, 0xff, 1, 0, u8, u8, ChIdx_SPEC, crate::common::RW>
{
crate::common::RegisterField::<8,0xff,1,0,u8,u8,ChIdx_SPEC,crate::common::RW>::from_register(self,0)
}
}
impl ::core::default::Default for ChIdx {
#[inline(always)]
fn default() -> ChIdx {
<crate::RegValueT<ChIdx_SPEC> as RegisterValue<_>>::new(0)
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct ChCurrPtr_SPEC;
impl crate::sealed::RegSpec for ChCurrPtr_SPEC {
type DataType = u32;
}
#[doc = "Channel current descriptor pointer"]
pub type ChCurrPtr = crate::RegValueT<ChCurrPtr_SPEC>;
impl ChCurrPtr {
#[doc = "Address of current descriptor. When this field is \'0\', there is no valid descriptor.\n\nNote: HW updates the current descriptor pointer CH_CURR_PTR with DESCR_NEXT_PTR after execution of the current descriptor. \n\nNote: Typically, when SW updates the current descriptor pointer CH_CURR_PTR, it also sets CH_IDX.X_IDX and CH_IDX.Y_IDX to \'0\'."]
#[inline(always)]
pub fn addr(
self,
) -> crate::common::RegisterField<
2,
0x3fffffff,
1,
0,
u32,
u32,
ChCurrPtr_SPEC,
crate::common::RW,
> {
crate::common::RegisterField::<
2,
0x3fffffff,
1,
0,
u32,
u32,
ChCurrPtr_SPEC,
crate::common::RW,
>::from_register(self, 0)
}
}
impl ::core::default::Default for ChCurrPtr {
#[inline(always)]
fn default() -> ChCurrPtr {
<crate::RegValueT<ChCurrPtr_SPEC> as RegisterValue<_>>::new(0)
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Intr_SPEC;
impl crate::sealed::RegSpec for Intr_SPEC {
type DataType = u32;
}
#[doc = "Interrupt"]
pub type Intr = crate::RegValueT<Intr_SPEC>;
impl Intr {
#[doc = "Set to \'1\', when event (as specified by CH_STATUS.INTR_CAUSE) is detected. Write INTR.CH field with \'1\', to clear bit. Write INTR_SET.CH field with \'1\', to set bit."]
#[inline(always)]
pub fn ch(self) -> crate::common::RegisterFieldBool<0, 1, 0, Intr_SPEC, crate::common::RW> {
crate::common::RegisterFieldBool::<0, 1, 0, Intr_SPEC, crate::common::RW>::from_register(
self, 0,
)
}
}
impl ::core::default::Default for Intr {
#[inline(always)]
fn default() -> Intr {
<crate::RegValueT<Intr_SPEC> as RegisterValue<_>>::new(0)
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct IntrSet_SPEC;
impl crate::sealed::RegSpec for IntrSet_SPEC {
type DataType = u32;
}
#[doc = "Interrupt set"]
pub type IntrSet = crate::RegValueT<IntrSet_SPEC>;
impl IntrSet {
#[doc = "Write INTR_SET field with \'1\' to set corresponding INTR.CH field (a write of \'0\' has no effect)."]
#[inline(always)]
pub fn ch(
self,
) -> crate::common::RegisterFieldBool<0, 1, 0, IntrSet_SPEC, crate::common::RW> {
crate::common::RegisterFieldBool::<0,1,0,IntrSet_SPEC,crate::common::RW>::from_register(self,0)
}
}
impl ::core::default::Default for IntrSet {
#[inline(always)]
fn default() -> IntrSet {
<crate::RegValueT<IntrSet_SPEC> as RegisterValue<_>>::new(0)
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct IntrMask_SPEC;
impl crate::sealed::RegSpec for IntrMask_SPEC {
type DataType = u32;
}
#[doc = "Interrupt mask"]
pub type IntrMask = crate::RegValueT<IntrMask_SPEC>;
impl IntrMask {
#[doc = "Mask for corresponding field in INTR register."]
#[inline(always)]
pub fn ch(
self,
) -> crate::common::RegisterFieldBool<0, 1, 0, IntrMask_SPEC, crate::common::RW> {
crate::common::RegisterFieldBool::<0,1,0,IntrMask_SPEC,crate::common::RW>::from_register(self,0)
}
}
impl ::core::default::Default for IntrMask {
#[inline(always)]
fn default() -> IntrMask {
<crate::RegValueT<IntrMask_SPEC> as RegisterValue<_>>::new(0)
}
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct IntrMasked_SPEC;
impl crate::sealed::RegSpec for IntrMasked_SPEC {
type DataType = u32;
}
#[doc = "Interrupt masked"]
pub type IntrMasked = crate::RegValueT<IntrMasked_SPEC>;
impl IntrMasked {
#[doc = "Logical and of corresponding INTR and INTR_MASK fields."]
#[inline(always)]
pub fn ch(
self,
) -> crate::common::RegisterFieldBool<0, 1, 0, IntrMasked_SPEC, crate::common::R> {
crate::common::RegisterFieldBool::<0,1,0,IntrMasked_SPEC,crate::common::R>::from_register(self,0)
}
}
impl ::core::default::Default for IntrMasked {
#[inline(always)]
fn default() -> IntrMasked {
<crate::RegValueT<IntrMasked_SPEC> as RegisterValue<_>>::new(0)
}
}
}