mtb_pac_psoc6_01 0.1.1

/*
(c) (2016-2024), Cypress Semiconductor Corporation (an Infineon company)

    or an affiliate of Cypress Semiconductor Corporation.



    SPDX-License-Identifier: Apache-2.0



    Licensed under the Apache License, Version 2.0 (the "License");

    you may not use this file except in compliance with the License.

    You may obtain a copy of the License at



      http://www.apache.org/licenses/LICENSE-2.0



    Unless required by applicable law or agreed to in writing, software

    distributed under the License is distributed on an "AS IS" BASIS,

    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

    See the License for the specific language governing permissions and

    limitations under the License.
*/
// Generated from SVD 1.0, with svd2pac 0.6.0 on Tue, 27 May 2025 19:21:54 +0000

#![allow(clippy::identity_op)]
#![allow(clippy::module_inception)]
#![allow(clippy::derivable_impls)]
#[allow(unused_imports)]
use crate::common::sealed;
#[allow(unused_imports)]
use crate::common::*;
#[doc = r"Continuous Time Block Mini"]
unsafe impl ::core::marker::Send for super::Ctbm {}
unsafe impl ::core::marker::Sync for super::Ctbm {}
impl super::Ctbm {
    #[allow(unused)]
    #[inline(always)]
    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
        self.ptr
    }

    #[doc = "global CTB and power control"]
    #[inline(always)]
    pub const fn ctb_ctrl(
        &self,
    ) -> &'static crate::common::Reg<self::CtbCtrl_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::CtbCtrl_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(0usize),
            )
        }
    }

    #[doc = "Opamp0 and resistor0 control"]
    #[inline(always)]
    pub const fn oa_res0_ctrl(
        &self,
    ) -> &'static crate::common::Reg<self::OaRes0Ctrl_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::OaRes0Ctrl_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(4usize),
            )
        }
    }

    #[doc = "Opamp1 and resistor1 control"]
    #[inline(always)]
    pub const fn oa_res1_ctrl(
        &self,
    ) -> &'static crate::common::Reg<self::OaRes1Ctrl_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::OaRes1Ctrl_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(8usize),
            )
        }
    }

    #[doc = "Comparator status"]
    #[inline(always)]
    pub const fn comp_stat(
        &self,
    ) -> &'static crate::common::Reg<self::CompStat_SPEC, crate::common::R> {
        unsafe {
            crate::common::Reg::<self::CompStat_SPEC, crate::common::R>::from_ptr(
                self._svd2pac_as_ptr().add(12usize),
            )
        }
    }

    #[doc = "Interrupt request register"]
    #[inline(always)]
    pub const fn intr(&self) -> &'static crate::common::Reg<self::Intr_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Intr_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(32usize),
            )
        }
    }

    #[doc = "Interrupt request set register"]
    #[inline(always)]
    pub const fn intr_set(
        &self,
    ) -> &'static crate::common::Reg<self::IntrSet_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::IntrSet_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(36usize),
            )
        }
    }

    #[doc = "Interrupt request mask"]
    #[inline(always)]
    pub const fn intr_mask(
        &self,
    ) -> &'static crate::common::Reg<self::IntrMask_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::IntrMask_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(40usize),
            )
        }
    }

    #[doc = "Interrupt request masked"]
    #[inline(always)]
    pub const fn intr_masked(
        &self,
    ) -> &'static crate::common::Reg<self::IntrMasked_SPEC, crate::common::R> {
        unsafe {
            crate::common::Reg::<self::IntrMasked_SPEC, crate::common::R>::from_ptr(
                self._svd2pac_as_ptr().add(44usize),
            )
        }
    }

    #[doc = "Opamp0 switch control"]
    #[inline(always)]
    pub const fn oa0_sw(&self) -> &'static crate::common::Reg<self::Oa0Sw_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Oa0Sw_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(128usize),
            )
        }
    }

    #[doc = "Opamp0 switch control clear"]
    #[inline(always)]
    pub const fn oa0_sw_clear(
        &self,
    ) -> &'static crate::common::Reg<self::Oa0SwClear_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Oa0SwClear_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(132usize),
            )
        }
    }

    #[doc = "Opamp1 switch control"]
    #[inline(always)]
    pub const fn oa1_sw(&self) -> &'static crate::common::Reg<self::Oa1Sw_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Oa1Sw_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(136usize),
            )
        }
    }

    #[doc = "Opamp1 switch control clear"]
    #[inline(always)]
    pub const fn oa1_sw_clear(
        &self,
    ) -> &'static crate::common::Reg<self::Oa1SwClear_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Oa1SwClear_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(140usize),
            )
        }
    }

    #[doc = "CTDAC connection switch control"]
    #[inline(always)]
    pub const fn ctd_sw(&self) -> &'static crate::common::Reg<self::CtdSw_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::CtdSw_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(160usize),
            )
        }
    }

    #[doc = "CTDAC connection switch control clear"]
    #[inline(always)]
    pub const fn ctd_sw_clear(
        &self,
    ) -> &'static crate::common::Reg<self::CtdSwClear_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::CtdSwClear_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(164usize),
            )
        }
    }

    #[doc = "CTB bus switch control"]
    #[inline(always)]
    pub const fn ctb_sw_ds_ctrl(
        &self,
    ) -> &'static crate::common::Reg<self::CtbSwDsCtrl_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::CtbSwDsCtrl_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(192usize),
            )
        }
    }

    #[doc = "CTB bus switch Sar Sequencer control"]
    #[inline(always)]
    pub const fn ctb_sw_sq_ctrl(
        &self,
    ) -> &'static crate::common::Reg<self::CtbSwSqCtrl_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::CtbSwSqCtrl_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(196usize),
            )
        }
    }

    #[doc = "CTB bus switch control status"]
    #[inline(always)]
    pub const fn ctb_sw_status(
        &self,
    ) -> &'static crate::common::Reg<self::CtbSwStatus_SPEC, crate::common::R> {
        unsafe {
            crate::common::Reg::<self::CtbSwStatus_SPEC, crate::common::R>::from_ptr(
                self._svd2pac_as_ptr().add(200usize),
            )
        }
    }

    #[doc = "Opamp0 trim control"]
    #[inline(always)]
    pub const fn oa0_offset_trim(
        &self,
    ) -> &'static crate::common::Reg<self::Oa0OffsetTrim_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Oa0OffsetTrim_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(3840usize),
            )
        }
    }

    #[doc = "Opamp0 trim control"]
    #[inline(always)]
    pub const fn oa0_slope_offset_trim(
        &self,
    ) -> &'static crate::common::Reg<self::Oa0SlopeOffsetTrim_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Oa0SlopeOffsetTrim_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(3844usize),
            )
        }
    }

    #[doc = "Opamp0 trim control"]
    #[inline(always)]
    pub const fn oa0_comp_trim(
        &self,
    ) -> &'static crate::common::Reg<self::Oa0CompTrim_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Oa0CompTrim_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(3848usize),
            )
        }
    }

    #[doc = "Opamp1 trim control"]
    #[inline(always)]
    pub const fn oa1_offset_trim(
        &self,
    ) -> &'static crate::common::Reg<self::Oa1OffsetTrim_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Oa1OffsetTrim_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(3852usize),
            )
        }
    }

    #[doc = "Opamp1 trim control"]
    #[inline(always)]
    pub const fn oa1_slope_offset_trim(
        &self,
    ) -> &'static crate::common::Reg<self::Oa1SlopeOffsetTrim_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Oa1SlopeOffsetTrim_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(3856usize),
            )
        }
    }

    #[doc = "Opamp1 trim control"]
    #[inline(always)]
    pub const fn oa1_comp_trim(
        &self,
    ) -> &'static crate::common::Reg<self::Oa1CompTrim_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Oa1CompTrim_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(3860usize),
            )
        }
    }
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct CtbCtrl_SPEC;
impl crate::sealed::RegSpec for CtbCtrl_SPEC {
    type DataType = u32;
}

#[doc = "global CTB and power control"]
pub type CtbCtrl = crate::RegValueT<CtbCtrl_SPEC>;

impl CtbCtrl {
    #[doc = "- 0: CTBm is disabled during DeepSleep power mode\n- 1: CTBm remains enabled during DeepSleep power mode (if ENABLED=1)"]
    #[inline(always)]
    pub fn deepsleep_on(
        self,
    ) -> crate::common::RegisterFieldBool<30, 1, 0, CtbCtrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<30, 1, 0, CtbCtrl_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "- 0: CTBm disabled (put analog in power down, open all switches)\n- 1: CTBm enabled"]
    #[inline(always)]
    pub fn enabled(
        self,
    ) -> crate::common::RegisterFieldBool<31, 1, 0, CtbCtrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<31, 1, 0, CtbCtrl_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }
}
impl ::core::default::Default for CtbCtrl {
    #[inline(always)]
    fn default() -> CtbCtrl {
        <crate::RegValueT<CtbCtrl_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct OaRes0Ctrl_SPEC;
impl crate::sealed::RegSpec for OaRes0Ctrl_SPEC {
    type DataType = u32;
}

#[doc = "Opamp0 and resistor0 control"]
pub type OaRes0Ctrl = crate::RegValueT<OaRes0Ctrl_SPEC>;

impl OaRes0Ctrl {
    #[doc = "Opamp power level. Reduced power levels also reduce gain-bandwidth (GBW). See the \'Opamp Specifications\' table in the device Datasheet for more details."]
    #[inline(always)]
    pub fn oa0_pwr_mode(
        self,
    ) -> crate::common::RegisterField<
        0,
        0x7,
        1,
        0,
        oa_res0_ctrl::Oa0PwrMode,
        oa_res0_ctrl::Oa0PwrMode,
        OaRes0Ctrl_SPEC,
        crate::common::RW,
    > {
        crate::common::RegisterField::<
            0,
            0x7,
            1,
            0,
            oa_res0_ctrl::Oa0PwrMode,
            oa_res0_ctrl::Oa0PwrMode,
            OaRes0Ctrl_SPEC,
            crate::common::RW,
        >::from_register(self, 0)
    }

    #[doc = "Opamp output drive strength: 0=1x, 1=10x. See the device Datasheet for exact current ranges and related specifications.This setting sets specific requirements for OA0_BOOST_EN and OA0_COMP_TRIM."]
    #[inline(always)]
    pub fn oa0_drive_str_sel(
        self,
    ) -> crate::common::RegisterFieldBool<3, 1, 0, OaRes0Ctrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<3,1,0,OaRes0Ctrl_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "N/A"]
    #[inline(always)]
    pub fn oa0_comp_en(
        self,
    ) -> crate::common::RegisterFieldBool<4, 1, 0, OaRes0Ctrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<4,1,0,OaRes0Ctrl_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Opamp hysteresis enable. See the device Datasheet for hysteresis specifications."]
    #[inline(always)]
    pub fn oa0_hyst_en(
        self,
    ) -> crate::common::RegisterFieldBool<5, 1, 0, OaRes0Ctrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<5,1,0,OaRes0Ctrl_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Opamp bypass comparator output synchronization for trigger output: 0=synchronize (level or pulse), 1=bypass (asynchronous output)."]
    #[inline(always)]
    pub fn oa0_bypass_dsi_sync(
        self,
    ) -> crate::common::RegisterFieldBool<6, 1, 0, OaRes0Ctrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<6,1,0,OaRes0Ctrl_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Opamp comparator trigger output level : \n0=pulse, each time an edge is detected (see OA0_COMPINT) a pulse is sent out on trigger\n1=level,  trigger output is a synchronized version of the comparator output"]
    #[inline(always)]
    pub fn oa0_dsi_level(
        self,
    ) -> crate::common::RegisterFieldBool<7, 1, 0, OaRes0Ctrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<7,1,0,OaRes0Ctrl_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Opamp comparator edge detect for interrupt and pulse mode of trigger"]
    #[inline(always)]
    pub fn oa0_compint(
        self,
    ) -> crate::common::RegisterField<
        8,
        0x3,
        1,
        0,
        oa_res0_ctrl::Oa0Compint,
        oa_res0_ctrl::Oa0Compint,
        OaRes0Ctrl_SPEC,
        crate::common::RW,
    > {
        crate::common::RegisterField::<
            8,
            0x3,
            1,
            0,
            oa_res0_ctrl::Oa0Compint,
            oa_res0_ctrl::Oa0Compint,
            OaRes0Ctrl_SPEC,
            crate::common::RW,
        >::from_register(self, 0)
    }

    #[doc = "N/A"]
    #[inline(always)]
    pub fn oa0_pump_en(
        self,
    ) -> crate::common::RegisterFieldBool<11, 1, 0, OaRes0Ctrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<11,1,0,OaRes0Ctrl_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "N/A"]
    #[inline(always)]
    pub fn oa0_boost_en(
        self,
    ) -> crate::common::RegisterFieldBool<12, 1, 0, OaRes0Ctrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<12,1,0,OaRes0Ctrl_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for OaRes0Ctrl {
    #[inline(always)]
    fn default() -> OaRes0Ctrl {
        <crate::RegValueT<OaRes0Ctrl_SPEC> as RegisterValue<_>>::new(0)
    }
}
pub mod oa_res0_ctrl {

    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Oa0PwrMode_SPEC;
    pub type Oa0PwrMode = crate::EnumBitfieldStruct<u8, Oa0PwrMode_SPEC>;
    impl Oa0PwrMode {
        #[doc = "Off"]
        pub const OFF: Self = Self::new(0);

        #[doc = "Low power mode (IDD: 350uA, GBW: 1MHz for both 1x/10x)"]
        pub const LOW: Self = Self::new(1);

        #[doc = "Medium power mode (IDD: 600uA, GBW: 3MHz for 1x & 2.5MHz for 10x)"]
        pub const MEDIUM: Self = Self::new(2);

        #[doc = "High power mode for highest GBW (IDD: 1500uA, GBW: 8MHz for 1x & 6MHz for 10x)"]
        pub const HIGH: Self = Self::new(3);

        #[doc = "N/A"]
        pub const RSVD: Self = Self::new(4);

        #[doc = "Power Saver Low power mode (IDD: ~20uA with 1uA bias from AREF, GBW: ~100kHz for 1x/10x, offset correcting IDAC is disabled)"]
        pub const PS_LOW: Self = Self::new(5);

        #[doc = "Power Saver Medium power mode (IDD: ~40uA with 1uA bias from AREF, GBW: ~100kHz for 1x/10x, offset correcting IDAC is enabled)"]
        pub const PS_MEDIUM: Self = Self::new(6);

        #[doc = "Power Saver Medium power mode (IDD: ~60uA with 1uA bias from AREF, GBW: ~200kHz for 1x/10x, offset correcting IDAC is enabled)"]
        pub const PS_HIGH: Self = Self::new(7);
    }
    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Oa0Compint_SPEC;
    pub type Oa0Compint = crate::EnumBitfieldStruct<u8, Oa0Compint_SPEC>;
    impl Oa0Compint {
        #[doc = "Disabled, no interrupts will be detected"]
        pub const DISABLE: Self = Self::new(0);

        #[doc = "Rising edge"]
        pub const RISING: Self = Self::new(1);

        #[doc = "Falling edge"]
        pub const FALLING: Self = Self::new(2);

        #[doc = "Both rising and falling edges"]
        pub const BOTH: Self = Self::new(3);
    }
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct OaRes1Ctrl_SPEC;
impl crate::sealed::RegSpec for OaRes1Ctrl_SPEC {
    type DataType = u32;
}

#[doc = "Opamp1 and resistor1 control"]
pub type OaRes1Ctrl = crate::RegValueT<OaRes1Ctrl_SPEC>;

impl OaRes1Ctrl {
    #[doc = "Opamp power level. Reduced power levels also reduce gain-bandwidth (GBW). See the \'Opamp Specifications\' table in the device Datasheet for more details."]
    #[inline(always)]
    pub fn oa1_pwr_mode(
        self,
    ) -> crate::common::RegisterField<0, 0x7, 1, 0, u8, u8, OaRes1Ctrl_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<0,0x7,1,0,u8,u8,OaRes1Ctrl_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Opamp output drive strength: 0=1x, 1=10x. See the device Datasheet for exact current ranges and related specifications.This setting sets specific requirements for OA1_BOOST_EN and OA1_COMP_TRIM"]
    #[inline(always)]
    pub fn oa1_drive_str_sel(
        self,
    ) -> crate::common::RegisterFieldBool<3, 1, 0, OaRes1Ctrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<3,1,0,OaRes1Ctrl_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "N/A"]
    #[inline(always)]
    pub fn oa1_comp_en(
        self,
    ) -> crate::common::RegisterFieldBool<4, 1, 0, OaRes1Ctrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<4,1,0,OaRes1Ctrl_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Opamp hysteresis enable. See the device Datasheet for hysteresis specifications."]
    #[inline(always)]
    pub fn oa1_hyst_en(
        self,
    ) -> crate::common::RegisterFieldBool<5, 1, 0, OaRes1Ctrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<5,1,0,OaRes1Ctrl_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Opamp bypass comparator output synchronization for trigger output: 0=synchronize (level or pulse), 1=bypass (asynchronous output)."]
    #[inline(always)]
    pub fn oa1_bypass_dsi_sync(
        self,
    ) -> crate::common::RegisterFieldBool<6, 1, 0, OaRes1Ctrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<6,1,0,OaRes1Ctrl_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Opamp comparator trigger output level : \n0=pulse, each time an edge is detected (see OA1_COMPINT) a pulse is sent out on trigger\n1=level,  trigger output is a synchronized version of the comparator output"]
    #[inline(always)]
    pub fn oa1_dsi_level(
        self,
    ) -> crate::common::RegisterFieldBool<7, 1, 0, OaRes1Ctrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<7,1,0,OaRes1Ctrl_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Opamp comparator edge detect for interrupt and pulse mode of trigger"]
    #[inline(always)]
    pub fn oa1_compint(
        self,
    ) -> crate::common::RegisterField<
        8,
        0x3,
        1,
        0,
        oa_res1_ctrl::Oa1Compint,
        oa_res1_ctrl::Oa1Compint,
        OaRes1Ctrl_SPEC,
        crate::common::RW,
    > {
        crate::common::RegisterField::<
            8,
            0x3,
            1,
            0,
            oa_res1_ctrl::Oa1Compint,
            oa_res1_ctrl::Oa1Compint,
            OaRes1Ctrl_SPEC,
            crate::common::RW,
        >::from_register(self, 0)
    }

    #[doc = "N/A"]
    #[inline(always)]
    pub fn oa1_pump_en(
        self,
    ) -> crate::common::RegisterFieldBool<11, 1, 0, OaRes1Ctrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<11,1,0,OaRes1Ctrl_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "N/A"]
    #[inline(always)]
    pub fn oa1_boost_en(
        self,
    ) -> crate::common::RegisterFieldBool<12, 1, 0, OaRes1Ctrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<12,1,0,OaRes1Ctrl_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for OaRes1Ctrl {
    #[inline(always)]
    fn default() -> OaRes1Ctrl {
        <crate::RegValueT<OaRes1Ctrl_SPEC> as RegisterValue<_>>::new(0)
    }
}
pub mod oa_res1_ctrl {

    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct Oa1Compint_SPEC;
    pub type Oa1Compint = crate::EnumBitfieldStruct<u8, Oa1Compint_SPEC>;
    impl Oa1Compint {
        #[doc = "Disabled, no interrupts will be detected"]
        pub const DISABLE: Self = Self::new(0);

        #[doc = "Rising edge"]
        pub const RISING: Self = Self::new(1);

        #[doc = "Falling edge"]
        pub const FALLING: Self = Self::new(2);

        #[doc = "Both rising and falling edges"]
        pub const BOTH: Self = Self::new(3);
    }
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct CompStat_SPEC;
impl crate::sealed::RegSpec for CompStat_SPEC {
    type DataType = u32;
}

#[doc = "Comparator status"]
pub type CompStat = crate::RegValueT<CompStat_SPEC>;

impl CompStat {
    #[doc = "Opamp0 current comparator status"]
    #[inline(always)]
    pub fn oa0_comp(
        self,
    ) -> crate::common::RegisterFieldBool<0, 1, 0, CompStat_SPEC, crate::common::R> {
        crate::common::RegisterFieldBool::<0, 1, 0, CompStat_SPEC, crate::common::R>::from_register(
            self, 0,
        )
    }

    #[doc = "Opamp1 current comparator status"]
    #[inline(always)]
    pub fn oa1_comp(
        self,
    ) -> crate::common::RegisterFieldBool<16, 1, 0, CompStat_SPEC, crate::common::R> {
        crate::common::RegisterFieldBool::<16, 1, 0, CompStat_SPEC, crate::common::R>::from_register(
            self, 0,
        )
    }
}
impl ::core::default::Default for CompStat {
    #[inline(always)]
    fn default() -> CompStat {
        <crate::RegValueT<CompStat_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Intr_SPEC;
impl crate::sealed::RegSpec for Intr_SPEC {
    type DataType = u32;
}

#[doc = "Interrupt request register"]
pub type Intr = crate::RegValueT<Intr_SPEC>;

impl Intr {
    #[doc = "Comparator 0 Interrupt: hardware sets this interrupt when comparator 0 triggers. Write with \'1\' to clear bit."]
    #[inline(always)]
    pub fn comp0(self) -> crate::common::RegisterFieldBool<0, 1, 0, Intr_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<0, 1, 0, Intr_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Comparator 1 Interrupt: hardware sets this interrupt when comparator 1 triggers. Write with \'1\' to clear bit."]
    #[inline(always)]
    pub fn comp1(self) -> crate::common::RegisterFieldBool<1, 1, 0, Intr_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<1, 1, 0, Intr_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }
}
impl ::core::default::Default for Intr {
    #[inline(always)]
    fn default() -> Intr {
        <crate::RegValueT<Intr_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct IntrSet_SPEC;
impl crate::sealed::RegSpec for IntrSet_SPEC {
    type DataType = u32;
}

#[doc = "Interrupt request set register"]
pub type IntrSet = crate::RegValueT<IntrSet_SPEC>;

impl IntrSet {
    #[doc = "Write with \'1\' to set corresponding bit in interrupt request register."]
    #[inline(always)]
    pub fn comp0_set(
        self,
    ) -> crate::common::RegisterFieldBool<0, 1, 0, IntrSet_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<0, 1, 0, IntrSet_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Write with \'1\' to set corresponding bit in interrupt request register."]
    #[inline(always)]
    pub fn comp1_set(
        self,
    ) -> crate::common::RegisterFieldBool<1, 1, 0, IntrSet_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<1, 1, 0, IntrSet_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }
}
impl ::core::default::Default for IntrSet {
    #[inline(always)]
    fn default() -> IntrSet {
        <crate::RegValueT<IntrSet_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct IntrMask_SPEC;
impl crate::sealed::RegSpec for IntrMask_SPEC {
    type DataType = u32;
}

#[doc = "Interrupt request mask"]
pub type IntrMask = crate::RegValueT<IntrMask_SPEC>;

impl IntrMask {
    #[doc = "Mask bit for corresponding bit in interrupt request register."]
    #[inline(always)]
    pub fn comp0_mask(
        self,
    ) -> crate::common::RegisterFieldBool<0, 1, 0, IntrMask_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<0, 1, 0, IntrMask_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Mask bit for corresponding bit in interrupt request register."]
    #[inline(always)]
    pub fn comp1_mask(
        self,
    ) -> crate::common::RegisterFieldBool<1, 1, 0, IntrMask_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<1, 1, 0, IntrMask_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }
}
impl ::core::default::Default for IntrMask {
    #[inline(always)]
    fn default() -> IntrMask {
        <crate::RegValueT<IntrMask_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct IntrMasked_SPEC;
impl crate::sealed::RegSpec for IntrMasked_SPEC {
    type DataType = u32;
}

#[doc = "Interrupt request masked"]
pub type IntrMasked = crate::RegValueT<IntrMasked_SPEC>;

impl IntrMasked {
    #[doc = "Logical and of corresponding request and mask bits."]
    #[inline(always)]
    pub fn comp0_masked(
        self,
    ) -> crate::common::RegisterFieldBool<0, 1, 0, IntrMasked_SPEC, crate::common::R> {
        crate::common::RegisterFieldBool::<0,1,0,IntrMasked_SPEC,crate::common::R>::from_register(self,0)
    }

    #[doc = "Logical and of corresponding request and mask bits."]
    #[inline(always)]
    pub fn comp1_masked(
        self,
    ) -> crate::common::RegisterFieldBool<1, 1, 0, IntrMasked_SPEC, crate::common::R> {
        crate::common::RegisterFieldBool::<1,1,0,IntrMasked_SPEC,crate::common::R>::from_register(self,0)
    }
}
impl ::core::default::Default for IntrMasked {
    #[inline(always)]
    fn default() -> IntrMasked {
        <crate::RegValueT<IntrMasked_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Oa0Sw_SPEC;
impl crate::sealed::RegSpec for Oa0Sw_SPEC {
    type DataType = u32;
}

#[doc = "Opamp0 switch control"]
pub type Oa0Sw = crate::RegValueT<Oa0Sw_SPEC>;

impl Oa0Sw {
    #[doc = "Switch that connects Opamp\'s non-inverting terminal to AMUXBUS A."]
    #[inline(always)]
    pub fn oa0p_a00(
        self,
    ) -> crate::common::RegisterFieldBool<0, 1, 0, Oa0Sw_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<0, 1, 0, Oa0Sw_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Switch that connects Opamp\'s non-inverting terminal to pin 0 of CTBm port. See the device Datasheet for the location of CTBm port."]
    #[inline(always)]
    pub fn oa0p_a20(
        self,
    ) -> crate::common::RegisterFieldBool<2, 1, 0, Oa0Sw_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<2, 1, 0, Oa0Sw_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Switch that connects Opamp\'s non-inverting terminal to pin 6 of CTBm port. Note that this bus can have additional connections to or from the CTDAC. See the Architecture TRM for details."]
    #[inline(always)]
    pub fn oa0p_a30(
        self,
    ) -> crate::common::RegisterFieldBool<3, 1, 0, Oa0Sw_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<3, 1, 0, Oa0Sw_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Switch that connects Opamp\'s inverting terminal to pin 1 of CTBm port ."]
    #[inline(always)]
    pub fn oa0m_a11(
        self,
    ) -> crate::common::RegisterFieldBool<8, 1, 0, Oa0Sw_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<8, 1, 0, Oa0Sw_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Switch that connects Opamp\'s inverting terminal to Opamp\'s output for follower mode."]
    #[inline(always)]
    pub fn oa0m_a81(
        self,
    ) -> crate::common::RegisterFieldBool<14, 1, 0, Oa0Sw_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<14, 1, 0, Oa0Sw_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Switch that connects Opamp\'s output to SARBUS 0."]
    #[inline(always)]
    pub fn oa0o_d51(
        self,
    ) -> crate::common::RegisterFieldBool<18, 1, 0, Oa0Sw_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<18, 1, 0, Oa0Sw_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Switch that shorts Opamp\'s 1x and 10x outputs."]
    #[inline(always)]
    pub fn oa0o_d81(
        self,
    ) -> crate::common::RegisterFieldBool<21, 1, 0, Oa0Sw_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<21, 1, 0, Oa0Sw_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }
}
impl ::core::default::Default for Oa0Sw {
    #[inline(always)]
    fn default() -> Oa0Sw {
        <crate::RegValueT<Oa0Sw_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Oa0SwClear_SPEC;
impl crate::sealed::RegSpec for Oa0SwClear_SPEC {
    type DataType = u32;
}

#[doc = "Opamp0 switch control clear"]
pub type Oa0SwClear = crate::RegValueT<Oa0SwClear_SPEC>;

impl Oa0SwClear {
    #[doc = "see corresponding bit in OA0_SW"]
    #[inline(always)]
    pub fn oa0p_a00(
        self,
    ) -> crate::common::RegisterFieldBool<0, 1, 0, Oa0SwClear_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<0,1,0,Oa0SwClear_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "see corresponding bit in OA0_SW"]
    #[inline(always)]
    pub fn oa0p_a20(
        self,
    ) -> crate::common::RegisterFieldBool<2, 1, 0, Oa0SwClear_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<2,1,0,Oa0SwClear_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "see corresponding bit in OA0_SW"]
    #[inline(always)]
    pub fn oa0p_a30(
        self,
    ) -> crate::common::RegisterFieldBool<3, 1, 0, Oa0SwClear_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<3,1,0,Oa0SwClear_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "see corresponding bit in OA0_SW"]
    #[inline(always)]
    pub fn oa0m_a11(
        self,
    ) -> crate::common::RegisterFieldBool<8, 1, 0, Oa0SwClear_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<8,1,0,Oa0SwClear_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "see corresponding bit in OA0_SW"]
    #[inline(always)]
    pub fn oa0m_a81(
        self,
    ) -> crate::common::RegisterFieldBool<14, 1, 0, Oa0SwClear_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<14,1,0,Oa0SwClear_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "see corresponding bit in OA0_SW"]
    #[inline(always)]
    pub fn oa0o_d51(
        self,
    ) -> crate::common::RegisterFieldBool<18, 1, 0, Oa0SwClear_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<18,1,0,Oa0SwClear_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "see corresponding bit in OA0_SW"]
    #[inline(always)]
    pub fn oa0o_d81(
        self,
    ) -> crate::common::RegisterFieldBool<21, 1, 0, Oa0SwClear_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<21,1,0,Oa0SwClear_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Oa0SwClear {
    #[inline(always)]
    fn default() -> Oa0SwClear {
        <crate::RegValueT<Oa0SwClear_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Oa1Sw_SPEC;
impl crate::sealed::RegSpec for Oa1Sw_SPEC {
    type DataType = u32;
}

#[doc = "Opamp1 switch control"]
pub type Oa1Sw = crate::RegValueT<Oa1Sw_SPEC>;

impl Oa1Sw {
    #[doc = "Switch that connects Opamp\'s non-inverting terminal to AMUXBUS B."]
    #[inline(always)]
    pub fn oa1p_a03(
        self,
    ) -> crate::common::RegisterFieldBool<0, 1, 0, Oa1Sw_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<0, 1, 0, Oa1Sw_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Switch that connects Opamp\'s non-inverting terminal to pin 5 of CTBm port. See the device Datasheet for the location of CTBm port."]
    #[inline(always)]
    pub fn oa1p_a13(
        self,
    ) -> crate::common::RegisterFieldBool<1, 1, 0, Oa1Sw_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<1, 1, 0, Oa1Sw_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Switch that connects Opamp\'s non-inverting terminal to pin 7 of CTBm port."]
    #[inline(always)]
    pub fn oa1p_a43(
        self,
    ) -> crate::common::RegisterFieldBool<4, 1, 0, Oa1Sw_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<4, 1, 0, Oa1Sw_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Switch that connects Opamp\'s non-inverting terminal to VREF."]
    #[inline(always)]
    pub fn oa1p_a73(
        self,
    ) -> crate::common::RegisterFieldBool<7, 1, 0, Oa1Sw_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<7, 1, 0, Oa1Sw_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Switch that connects Opamp\'s inverting terminal to pin 4 of CTBm port."]
    #[inline(always)]
    pub fn oa1m_a22(
        self,
    ) -> crate::common::RegisterFieldBool<8, 1, 0, Oa1Sw_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<8, 1, 0, Oa1Sw_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Switch that connects Opamp\'s inverting terminal to Opamp\'s output for follower mode."]
    #[inline(always)]
    pub fn oa1m_a82(
        self,
    ) -> crate::common::RegisterFieldBool<14, 1, 0, Oa1Sw_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<14, 1, 0, Oa1Sw_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Switch that connects Opamp\'s output to SARBUS 0."]
    #[inline(always)]
    pub fn oa1o_d52(
        self,
    ) -> crate::common::RegisterFieldBool<18, 1, 0, Oa1Sw_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<18, 1, 0, Oa1Sw_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Switch that connects Opamp\'s output to SARBUS 1."]
    #[inline(always)]
    pub fn oa1o_d62(
        self,
    ) -> crate::common::RegisterFieldBool<19, 1, 0, Oa1Sw_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<19, 1, 0, Oa1Sw_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Switch that shorts Opamp\'s 1x and 10x outputs."]
    #[inline(always)]
    pub fn oa1o_d82(
        self,
    ) -> crate::common::RegisterFieldBool<21, 1, 0, Oa1Sw_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<21, 1, 0, Oa1Sw_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }
}
impl ::core::default::Default for Oa1Sw {
    #[inline(always)]
    fn default() -> Oa1Sw {
        <crate::RegValueT<Oa1Sw_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Oa1SwClear_SPEC;
impl crate::sealed::RegSpec for Oa1SwClear_SPEC {
    type DataType = u32;
}

#[doc = "Opamp1 switch control clear"]
pub type Oa1SwClear = crate::RegValueT<Oa1SwClear_SPEC>;

impl Oa1SwClear {
    #[doc = "see corresponding bit in OA1_SW"]
    #[inline(always)]
    pub fn oa1p_a03(
        self,
    ) -> crate::common::RegisterFieldBool<0, 1, 0, Oa1SwClear_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<0,1,0,Oa1SwClear_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "see corresponding bit in OA1_SW"]
    #[inline(always)]
    pub fn oa1p_a13(
        self,
    ) -> crate::common::RegisterFieldBool<1, 1, 0, Oa1SwClear_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<1,1,0,Oa1SwClear_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "see corresponding bit in OA1_SW"]
    #[inline(always)]
    pub fn oa1p_a43(
        self,
    ) -> crate::common::RegisterFieldBool<4, 1, 0, Oa1SwClear_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<4,1,0,Oa1SwClear_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "see corresponding bit in OA1_SW"]
    #[inline(always)]
    pub fn oa1p_a73(
        self,
    ) -> crate::common::RegisterFieldBool<7, 1, 0, Oa1SwClear_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<7,1,0,Oa1SwClear_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "see corresponding bit in OA1_SW"]
    #[inline(always)]
    pub fn oa1m_a22(
        self,
    ) -> crate::common::RegisterFieldBool<8, 1, 0, Oa1SwClear_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<8,1,0,Oa1SwClear_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "see corresponding bit in OA1_SW"]
    #[inline(always)]
    pub fn oa1m_a82(
        self,
    ) -> crate::common::RegisterFieldBool<14, 1, 0, Oa1SwClear_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<14,1,0,Oa1SwClear_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "see corresponding bit in OA1_SW"]
    #[inline(always)]
    pub fn oa1o_d52(
        self,
    ) -> crate::common::RegisterFieldBool<18, 1, 0, Oa1SwClear_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<18,1,0,Oa1SwClear_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "see corresponding bit in OA1_SW"]
    #[inline(always)]
    pub fn oa1o_d62(
        self,
    ) -> crate::common::RegisterFieldBool<19, 1, 0, Oa1SwClear_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<19,1,0,Oa1SwClear_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "see corresponding bit in OA1_SW"]
    #[inline(always)]
    pub fn oa1o_d82(
        self,
    ) -> crate::common::RegisterFieldBool<21, 1, 0, Oa1SwClear_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<21,1,0,Oa1SwClear_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Oa1SwClear {
    #[inline(always)]
    fn default() -> Oa1SwClear {
        <crate::RegValueT<Oa1SwClear_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct CtdSw_SPEC;
impl crate::sealed::RegSpec for CtdSw_SPEC {
    type DataType = u32;
}

#[doc = "CTDAC connection switch control"]
pub type CtdSw = crate::RegValueT<CtdSw_SPEC>;

impl CtdSw {
    #[doc = "Switch that connects Opamp1\'s output to ctdrefdrive (CTDAC Reference Drive)."]
    #[inline(always)]
    pub fn ctdd_crd(
        self,
    ) -> crate::common::RegisterFieldBool<1, 1, 0, CtdSw_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<1, 1, 0, CtdSw_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Switch that connects Opamp1\'s inverting input to ctdrefsense (CTDAC Reference Sense)."]
    #[inline(always)]
    pub fn ctds_crs(
        self,
    ) -> crate::common::RegisterFieldBool<4, 1, 0, CtdSw_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<4, 1, 0, CtdSw_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Switch that connects Opamp1\'s inverting input to ctdvout (CTDAC Vout)."]
    #[inline(always)]
    pub fn ctds_cor(
        self,
    ) -> crate::common::RegisterFieldBool<5, 1, 0, CtdSw_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<5, 1, 0, CtdSw_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Switch that connects pin 6 of the CTBm port to ctdvout (CTDAC Vout). See the device Datasheet for the location of CTBm port."]
    #[inline(always)]
    pub fn ctdo_c6h(
        self,
    ) -> crate::common::RegisterFieldBool<8, 1, 0, CtdSw_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<8, 1, 0, CtdSw_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Switch that connects ctdvout to the internal hold capacitor (Sampling Switch). Note this switch will temporarily be opened for deglitching if CTDAC.DEGLITCH_COS is set."]
    #[inline(always)]
    pub fn ctdo_cos(
        self,
    ) -> crate::common::RegisterFieldBool<9, 1, 0, CtdSw_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<9, 1, 0, CtdSw_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Switch that connects hold capacitor to Opamp0\'s output. Used during hold mode in Sample and Hold operation."]
    #[inline(always)]
    pub fn ctdh_cob(
        self,
    ) -> crate::common::RegisterFieldBool<10, 1, 0, CtdSw_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<10, 1, 0, CtdSw_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "N/A"]
    #[inline(always)]
    pub fn ctdh_chd(
        self,
    ) -> crate::common::RegisterFieldBool<12, 1, 0, CtdSw_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<12, 1, 0, CtdSw_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Switch that connects hold capacitor to Opamp0\'s non-inverting input."]
    #[inline(always)]
    pub fn ctdh_ca0(
        self,
    ) -> crate::common::RegisterFieldBool<13, 1, 0, CtdSw_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<13, 1, 0, CtdSw_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Switch that isolates hold capacitor from other inputs connected to Opamp0\'s non-inverting input."]
    #[inline(always)]
    pub fn ctdh_cis(
        self,
    ) -> crate::common::RegisterFieldBool<14, 1, 0, CtdSw_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<14, 1, 0, CtdSw_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "Switch that shorts Opamp0\'s inverting and non-inverting inputs to reduce hold capacitor leakage."]
    #[inline(always)]
    pub fn ctdh_ilr(
        self,
    ) -> crate::common::RegisterFieldBool<15, 1, 0, CtdSw_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<15, 1, 0, CtdSw_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }
}
impl ::core::default::Default for CtdSw {
    #[inline(always)]
    fn default() -> CtdSw {
        <crate::RegValueT<CtdSw_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct CtdSwClear_SPEC;
impl crate::sealed::RegSpec for CtdSwClear_SPEC {
    type DataType = u32;
}

#[doc = "CTDAC connection switch control clear"]
pub type CtdSwClear = crate::RegValueT<CtdSwClear_SPEC>;

impl CtdSwClear {
    #[doc = "see corresponding bit in CTD_SW"]
    #[inline(always)]
    pub fn ctdd_crd(
        self,
    ) -> crate::common::RegisterFieldBool<1, 1, 0, CtdSwClear_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<1,1,0,CtdSwClear_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "see corresponding bit in CTD_SW"]
    #[inline(always)]
    pub fn ctds_crs(
        self,
    ) -> crate::common::RegisterFieldBool<4, 1, 0, CtdSwClear_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<4,1,0,CtdSwClear_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "see corresponding bit in CTD_SW"]
    #[inline(always)]
    pub fn ctds_cor(
        self,
    ) -> crate::common::RegisterFieldBool<5, 1, 0, CtdSwClear_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<5,1,0,CtdSwClear_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "see corresponding bit in CTD_SW"]
    #[inline(always)]
    pub fn ctdo_c6h(
        self,
    ) -> crate::common::RegisterFieldBool<8, 1, 0, CtdSwClear_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<8,1,0,CtdSwClear_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "see corresponding bit in CTD_SW"]
    #[inline(always)]
    pub fn ctdo_cos(
        self,
    ) -> crate::common::RegisterFieldBool<9, 1, 0, CtdSwClear_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<9,1,0,CtdSwClear_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "see corresponding bit in CTD_SW"]
    #[inline(always)]
    pub fn ctdh_cob(
        self,
    ) -> crate::common::RegisterFieldBool<10, 1, 0, CtdSwClear_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<10,1,0,CtdSwClear_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "see corresponding bit in CTD_SW"]
    #[inline(always)]
    pub fn ctdh_chd(
        self,
    ) -> crate::common::RegisterFieldBool<12, 1, 0, CtdSwClear_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<12,1,0,CtdSwClear_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "see corresponding bit in CTD_SW"]
    #[inline(always)]
    pub fn ctdh_ca0(
        self,
    ) -> crate::common::RegisterFieldBool<13, 1, 0, CtdSwClear_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<13,1,0,CtdSwClear_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "see corresponding bit in CTD_SW"]
    #[inline(always)]
    pub fn ctdh_cis(
        self,
    ) -> crate::common::RegisterFieldBool<14, 1, 0, CtdSwClear_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<14,1,0,CtdSwClear_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "see corresponding bit in CTD_SW"]
    #[inline(always)]
    pub fn ctdh_ilr(
        self,
    ) -> crate::common::RegisterFieldBool<15, 1, 0, CtdSwClear_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<15,1,0,CtdSwClear_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for CtdSwClear {
    #[inline(always)]
    fn default() -> CtdSwClear {
        <crate::RegValueT<CtdSwClear_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct CtbSwDsCtrl_SPEC;
impl crate::sealed::RegSpec for CtbSwDsCtrl_SPEC {
    type DataType = u32;
}

#[doc = "CTB bus switch control"]
pub type CtbSwDsCtrl = crate::RegValueT<CtbSwDsCtrl_SPEC>;

impl CtbSwDsCtrl {
    #[doc = "N/A"]
    #[inline(always)]
    pub fn p2_ds_ctrl23(
        self,
    ) -> crate::common::RegisterFieldBool<10, 1, 0, CtbSwDsCtrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<10,1,0,CtbSwDsCtrl_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "N/A"]
    #[inline(always)]
    pub fn p3_ds_ctrl23(
        self,
    ) -> crate::common::RegisterFieldBool<11, 1, 0, CtbSwDsCtrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<11,1,0,CtbSwDsCtrl_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "N/A"]
    #[inline(always)]
    pub fn ctd_cos_ds_ctrl(
        self,
    ) -> crate::common::RegisterFieldBool<31, 1, 0, CtbSwDsCtrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<31,1,0,CtbSwDsCtrl_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for CtbSwDsCtrl {
    #[inline(always)]
    fn default() -> CtbSwDsCtrl {
        <crate::RegValueT<CtbSwDsCtrl_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct CtbSwSqCtrl_SPEC;
impl crate::sealed::RegSpec for CtbSwSqCtrl_SPEC {
    type DataType = u32;
}

#[doc = "CTB bus switch Sar Sequencer control"]
pub type CtbSwSqCtrl = crate::RegValueT<CtbSwSqCtrl_SPEC>;

impl CtbSwSqCtrl {
    #[doc = "for D51"]
    #[inline(always)]
    pub fn p2_sq_ctrl23(
        self,
    ) -> crate::common::RegisterFieldBool<10, 1, 0, CtbSwSqCtrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<10,1,0,CtbSwSqCtrl_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "for D52, D62"]
    #[inline(always)]
    pub fn p3_sq_ctrl23(
        self,
    ) -> crate::common::RegisterFieldBool<11, 1, 0, CtbSwSqCtrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<11,1,0,CtbSwSqCtrl_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for CtbSwSqCtrl {
    #[inline(always)]
    fn default() -> CtbSwSqCtrl {
        <crate::RegValueT<CtbSwSqCtrl_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct CtbSwStatus_SPEC;
impl crate::sealed::RegSpec for CtbSwStatus_SPEC {
    type DataType = u32;
}

#[doc = "CTB bus switch control status"]
pub type CtbSwStatus = crate::RegValueT<CtbSwStatus_SPEC>;

impl CtbSwStatus {
    #[doc = "see OA0O_D51 bit in OA0_SW"]
    #[inline(always)]
    pub fn oa0o_d51_stat(
        self,
    ) -> crate::common::RegisterFieldBool<28, 1, 0, CtbSwStatus_SPEC, crate::common::R> {
        crate::common::RegisterFieldBool::<28,1,0,CtbSwStatus_SPEC,crate::common::R>::from_register(self,0)
    }

    #[doc = "see OA1O_D52 bit in OA1_SW"]
    #[inline(always)]
    pub fn oa1o_d52_stat(
        self,
    ) -> crate::common::RegisterFieldBool<29, 1, 0, CtbSwStatus_SPEC, crate::common::R> {
        crate::common::RegisterFieldBool::<29,1,0,CtbSwStatus_SPEC,crate::common::R>::from_register(self,0)
    }

    #[doc = "see OA1O_D62 bit in OA1_SW"]
    #[inline(always)]
    pub fn oa1o_d62_stat(
        self,
    ) -> crate::common::RegisterFieldBool<30, 1, 0, CtbSwStatus_SPEC, crate::common::R> {
        crate::common::RegisterFieldBool::<30,1,0,CtbSwStatus_SPEC,crate::common::R>::from_register(self,0)
    }

    #[doc = "see COS bit in CTD_SW"]
    #[inline(always)]
    pub fn ctd_cos_stat(
        self,
    ) -> crate::common::RegisterFieldBool<31, 1, 0, CtbSwStatus_SPEC, crate::common::R> {
        crate::common::RegisterFieldBool::<31,1,0,CtbSwStatus_SPEC,crate::common::R>::from_register(self,0)
    }
}
impl ::core::default::Default for CtbSwStatus {
    #[inline(always)]
    fn default() -> CtbSwStatus {
        <crate::RegValueT<CtbSwStatus_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Oa0OffsetTrim_SPEC;
impl crate::sealed::RegSpec for Oa0OffsetTrim_SPEC {
    type DataType = u32;
}

#[doc = "Opamp0 trim control"]
pub type Oa0OffsetTrim = crate::RegValueT<Oa0OffsetTrim_SPEC>;

impl Oa0OffsetTrim {
    #[doc = "Opamp0 offset trim"]
    #[inline(always)]
    pub fn oa0_offset_trim(
        self,
    ) -> crate::common::RegisterField<0, 0x3f, 1, 0, u8, u8, Oa0OffsetTrim_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<0,0x3f,1,0,u8,u8,Oa0OffsetTrim_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Oa0OffsetTrim {
    #[inline(always)]
    fn default() -> Oa0OffsetTrim {
        <crate::RegValueT<Oa0OffsetTrim_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Oa0SlopeOffsetTrim_SPEC;
impl crate::sealed::RegSpec for Oa0SlopeOffsetTrim_SPEC {
    type DataType = u32;
}

#[doc = "Opamp0 trim control"]
pub type Oa0SlopeOffsetTrim = crate::RegValueT<Oa0SlopeOffsetTrim_SPEC>;

impl Oa0SlopeOffsetTrim {
    #[doc = "Opamp0 slope offset drift trim"]
    #[inline(always)]
    pub fn oa0_slope_offset_trim(
        self,
    ) -> crate::common::RegisterField<
        0,
        0x3f,
        1,
        0,
        u8,
        u8,
        Oa0SlopeOffsetTrim_SPEC,
        crate::common::RW,
    > {
        crate::common::RegisterField::<
            0,
            0x3f,
            1,
            0,
            u8,
            u8,
            Oa0SlopeOffsetTrim_SPEC,
            crate::common::RW,
        >::from_register(self, 0)
    }
}
impl ::core::default::Default for Oa0SlopeOffsetTrim {
    #[inline(always)]
    fn default() -> Oa0SlopeOffsetTrim {
        <crate::RegValueT<Oa0SlopeOffsetTrim_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Oa0CompTrim_SPEC;
impl crate::sealed::RegSpec for Oa0CompTrim_SPEC {
    type DataType = u32;
}

#[doc = "Opamp0 trim control"]
pub type Oa0CompTrim = crate::RegValueT<Oa0CompTrim_SPEC>;

impl Oa0CompTrim {
    #[doc = "Opamp0 Compensation Capacitor Trim. \nValue depends on the drive strength setting - 1x mode: set to 01; 10x mode: set to 11"]
    #[inline(always)]
    pub fn oa0_comp_trim(
        self,
    ) -> crate::common::RegisterField<0, 0x3, 1, 0, u8, u8, Oa0CompTrim_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<0,0x3,1,0,u8,u8,Oa0CompTrim_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Oa0CompTrim {
    #[inline(always)]
    fn default() -> Oa0CompTrim {
        <crate::RegValueT<Oa0CompTrim_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Oa1OffsetTrim_SPEC;
impl crate::sealed::RegSpec for Oa1OffsetTrim_SPEC {
    type DataType = u32;
}

#[doc = "Opamp1 trim control"]
pub type Oa1OffsetTrim = crate::RegValueT<Oa1OffsetTrim_SPEC>;

impl Oa1OffsetTrim {
    #[doc = "Opamp1 offset trim"]
    #[inline(always)]
    pub fn oa1_offset_trim(
        self,
    ) -> crate::common::RegisterField<0, 0x3f, 1, 0, u8, u8, Oa1OffsetTrim_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<0,0x3f,1,0,u8,u8,Oa1OffsetTrim_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Oa1OffsetTrim {
    #[inline(always)]
    fn default() -> Oa1OffsetTrim {
        <crate::RegValueT<Oa1OffsetTrim_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Oa1SlopeOffsetTrim_SPEC;
impl crate::sealed::RegSpec for Oa1SlopeOffsetTrim_SPEC {
    type DataType = u32;
}

#[doc = "Opamp1 trim control"]
pub type Oa1SlopeOffsetTrim = crate::RegValueT<Oa1SlopeOffsetTrim_SPEC>;

impl Oa1SlopeOffsetTrim {
    #[doc = "Opamp1 slope offset drift trim"]
    #[inline(always)]
    pub fn oa1_slope_offset_trim(
        self,
    ) -> crate::common::RegisterField<
        0,
        0x3f,
        1,
        0,
        u8,
        u8,
        Oa1SlopeOffsetTrim_SPEC,
        crate::common::RW,
    > {
        crate::common::RegisterField::<
            0,
            0x3f,
            1,
            0,
            u8,
            u8,
            Oa1SlopeOffsetTrim_SPEC,
            crate::common::RW,
        >::from_register(self, 0)
    }
}
impl ::core::default::Default for Oa1SlopeOffsetTrim {
    #[inline(always)]
    fn default() -> Oa1SlopeOffsetTrim {
        <crate::RegValueT<Oa1SlopeOffsetTrim_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Oa1CompTrim_SPEC;
impl crate::sealed::RegSpec for Oa1CompTrim_SPEC {
    type DataType = u32;
}

#[doc = "Opamp1 trim control"]
pub type Oa1CompTrim = crate::RegValueT<Oa1CompTrim_SPEC>;

impl Oa1CompTrim {
    #[doc = "Opamp1 Compensation Capacitor Trim. \nValue depends on the drive strength setting - 1x mode: set to 01; 10x mode: set to 11"]
    #[inline(always)]
    pub fn oa1_comp_trim(
        self,
    ) -> crate::common::RegisterField<0, 0x3, 1, 0, u8, u8, Oa1CompTrim_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<0,0x3,1,0,u8,u8,Oa1CompTrim_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for Oa1CompTrim {
    #[inline(always)]
    fn default() -> Oa1CompTrim {
        <crate::RegValueT<Oa1CompTrim_SPEC> as RegisterValue<_>>::new(0)
    }
}