mtb_pac_psoc6_01 0.1.1

/*
(c) (2016-2024), Cypress Semiconductor Corporation (an Infineon company)

    or an affiliate of Cypress Semiconductor Corporation.



    SPDX-License-Identifier: Apache-2.0



    Licensed under the Apache License, Version 2.0 (the "License");

    you may not use this file except in compliance with the License.

    You may obtain a copy of the License at



      http://www.apache.org/licenses/LICENSE-2.0



    Unless required by applicable law or agreed to in writing, software

    distributed under the License is distributed on an "AS IS" BASIS,

    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

    See the License for the specific language governing permissions and

    limitations under the License.
*/
// Generated from SVD 1.0, with svd2pac 0.6.0 on Tue, 27 May 2025 19:21:54 +0000

#![allow(clippy::identity_op)]
#![allow(clippy::module_inception)]
#![allow(clippy::derivable_impls)]
#[allow(unused_imports)]
use crate::common::sealed;
#[allow(unused_imports)]
use crate::common::*;
#[doc = r"Continuous Time DAC"]
unsafe impl ::core::marker::Send for super::Ctdac {}
unsafe impl ::core::marker::Sync for super::Ctdac {}
impl super::Ctdac {
    #[allow(unused)]
    #[inline(always)]
    pub(crate) const fn _svd2pac_as_ptr(&self) -> *mut u8 {
        self.ptr
    }

    #[doc = "Global CTDAC control"]
    #[inline(always)]
    pub const fn ctdac_ctrl(
        &self,
    ) -> &'static crate::common::Reg<self::CtdacCtrl_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::CtdacCtrl_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(0usize),
            )
        }
    }

    #[doc = "Interrupt request register"]
    #[inline(always)]
    pub const fn intr(&self) -> &'static crate::common::Reg<self::Intr_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::Intr_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(32usize),
            )
        }
    }

    #[doc = "Interrupt request set register"]
    #[inline(always)]
    pub const fn intr_set(
        &self,
    ) -> &'static crate::common::Reg<self::IntrSet_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::IntrSet_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(36usize),
            )
        }
    }

    #[doc = "Interrupt request mask"]
    #[inline(always)]
    pub const fn intr_mask(
        &self,
    ) -> &'static crate::common::Reg<self::IntrMask_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::IntrMask_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(40usize),
            )
        }
    }

    #[doc = "Interrupt request masked"]
    #[inline(always)]
    pub const fn intr_masked(
        &self,
    ) -> &'static crate::common::Reg<self::IntrMasked_SPEC, crate::common::R> {
        unsafe {
            crate::common::Reg::<self::IntrMasked_SPEC, crate::common::R>::from_ptr(
                self._svd2pac_as_ptr().add(44usize),
            )
        }
    }

    #[doc = "CTDAC switch control"]
    #[inline(always)]
    pub const fn ctdac_sw(
        &self,
    ) -> &'static crate::common::Reg<self::CtdacSw_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::CtdacSw_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(176usize),
            )
        }
    }

    #[doc = "CTDAC switch control clear"]
    #[inline(always)]
    pub const fn ctdac_sw_clear(
        &self,
    ) -> &'static crate::common::Reg<self::CtdacSwClear_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::CtdacSwClear_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(180usize),
            )
        }
    }

    #[doc = "DAC Value"]
    #[inline(always)]
    pub const fn ctdac_val(
        &self,
    ) -> &'static crate::common::Reg<self::CtdacVal_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::CtdacVal_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(256usize),
            )
        }
    }

    #[doc = "Next DAC value (double buffering)"]
    #[inline(always)]
    pub const fn ctdac_val_nxt(
        &self,
    ) -> &'static crate::common::Reg<self::CtdacValNxt_SPEC, crate::common::RW> {
        unsafe {
            crate::common::Reg::<self::CtdacValNxt_SPEC, crate::common::RW>::from_ptr(
                self._svd2pac_as_ptr().add(260usize),
            )
        }
    }
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct CtdacCtrl_SPEC;
impl crate::sealed::RegSpec for CtdacCtrl_SPEC {
    type DataType = u32;
}

#[doc = "Global CTDAC control"]
pub type CtdacCtrl = crate::RegValueT<CtdacCtrl_SPEC>;

impl CtdacCtrl {
    #[doc = "To prevent glitches after VALUE changes from propagating the output switch can be opened for DEGLITCH_CNT+1 clk_peri clock cycles."]
    #[inline(always)]
    pub fn deglitch_cnt(
        self,
    ) -> crate::common::RegisterField<0, 0x3f, 1, 0, u8, u8, CtdacCtrl_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<0,0x3f,1,0,u8,u8,CtdacCtrl_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Force CTDAC.CO6 switch open after each VALUE change for the set number of clock cycles."]
    #[inline(always)]
    pub fn deglitch_co6(
        self,
    ) -> crate::common::RegisterFieldBool<8, 1, 0, CtdacCtrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<8,1,0,CtdacCtrl_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Force CTB.COS switch open after each VALUE change for the set number of clock cycles."]
    #[inline(always)]
    pub fn deglitch_cos(
        self,
    ) -> crate::common::RegisterFieldBool<9, 1, 0, CtdacCtrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<9,1,0,CtdacCtrl_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Output enable, intended to be used during the Hold phase of the Sample and Hold when power cycling :\n0: output disabled, the output is either: \n       - Tri-state (DISABLED_MODE=0) \n       - or Vssa (DISABLED_MODE=1 && CTDAC_RANGE=0)  \n       - or Vref (DISABLED_MODE=1 && CTDAC_RANGE=1) \n1: output enabled, CTDAC output drives the programmed VALUE"]
    #[inline(always)]
    pub fn out_en(
        self,
    ) -> crate::common::RegisterFieldBool<22, 1, 0, CtdacCtrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<22,1,0,CtdacCtrl_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "By closing the bottom switch in the R2R network the output is lifted by one LSB, effectively adding 1\n0: Range is \\[0, 4095\\] * Vref / 4096 \n1: Range is \\[1, 4096\\] * Vref / 4096"]
    #[inline(always)]
    pub fn ctdac_range(
        self,
    ) -> crate::common::RegisterFieldBool<23, 1, 0, CtdacCtrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<23,1,0,CtdacCtrl_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "DAC mode, this determines the Value decoding"]
    #[inline(always)]
    pub fn ctdac_mode(
        self,
    ) -> crate::common::RegisterField<
        24,
        0x3,
        1,
        0,
        ctdac_ctrl::CtdacMode,
        ctdac_ctrl::CtdacMode,
        CtdacCtrl_SPEC,
        crate::common::RW,
    > {
        crate::common::RegisterField::<
            24,
            0x3,
            1,
            0,
            ctdac_ctrl::CtdacMode,
            ctdac_ctrl::CtdacMode,
            CtdacCtrl_SPEC,
            crate::common::RW,
        >::from_register(self, 0)
    }

    #[doc = "Select the output value when the output is disabled (OUT_EN=0) (for risk mitigation)\n0: Tri-state CTDAC output when disabled\n1: output Vssa or Vref when disabled (see OUT_EN description)"]
    #[inline(always)]
    pub fn disabled_mode(
        self,
    ) -> crate::common::RegisterFieldBool<27, 1, 0, CtdacCtrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<27,1,0,CtdacCtrl_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "DSI strobe input Enable. This enables CTDAC updates to be further throttled by DSI.\n0: Ignore DSI strobe input\n1: Only do a CTDAC update if allowed by the DSI strobe (throttle), see below for level or edge"]
    #[inline(always)]
    pub fn dsi_strobe_en(
        self,
    ) -> crate::common::RegisterFieldBool<28, 1, 0, CtdacCtrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<28,1,0,CtdacCtrl_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "Select level or edge detect for DSI strobe\n- 0: DSI strobe signal is a pulse input, after a positive edge is detected on the DSI strobe signal the next DAC value update is done on the next CTDAC clock\n- 1: DSI strobe signal is a level input, as long as the DSI strobe signal remains high the CTDAC will do a next DAC value update on each CTDAC clock."]
    #[inline(always)]
    pub fn dsi_strobe_level(
        self,
    ) -> crate::common::RegisterFieldBool<29, 1, 0, CtdacCtrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<29,1,0,CtdacCtrl_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "- 0: CTDAC IP disabled off during DeepSleep power mode\n- 1: CTDAC IP remains enabled during DeepSleep power mode (if ENABLED=1)"]
    #[inline(always)]
    pub fn deepsleep_on(
        self,
    ) -> crate::common::RegisterFieldBool<30, 1, 0, CtdacCtrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<30,1,0,CtdacCtrl_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "0: CTDAC IP disabled (put analog in power down, open all switches)\n1: CTDAC IP enabled"]
    #[inline(always)]
    pub fn enabled(
        self,
    ) -> crate::common::RegisterFieldBool<31, 1, 0, CtdacCtrl_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<31,1,0,CtdacCtrl_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for CtdacCtrl {
    #[inline(always)]
    fn default() -> CtdacCtrl {
        <crate::RegValueT<CtdacCtrl_SPEC> as RegisterValue<_>>::new(0)
    }
}
pub mod ctdac_ctrl {

    #[derive(Clone, Copy, Eq, PartialEq, Ord, PartialOrd)]
    pub struct CtdacMode_SPEC;
    pub type CtdacMode = crate::EnumBitfieldStruct<u8, CtdacMode_SPEC>;
    impl CtdacMode {
        #[doc = "Unsigned 12-bit VDAC, i.e. no value decoding."]
        pub const UNSIGNED_12: Self = Self::new(0);

        #[doc = "Virtual signed 12-bits\' VDAC. Value decoding: \nadd 0x800 to the 12-bit Value (=invert MSB), to convert the lowest signed number 0x800 to the lowest unsigned number 0x000. This is the same as the SAR handles 12-bit \'virtual\' signed numbers."]
        pub const VIRT_SIGNED_12: Self = Self::new(1);

        #[doc = "N/A"]
        pub const RSVD_2: Self = Self::new(2);

        #[doc = "N/A"]
        pub const RSVD_3: Self = Self::new(3);
    }
}
#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Intr_SPEC;
impl crate::sealed::RegSpec for Intr_SPEC {
    type DataType = u32;
}

#[doc = "Interrupt request register"]
pub type Intr = crate::RegValueT<Intr_SPEC>;

impl Intr {
    #[doc = "VDAC Interrupt: hardware sets this interrupt when VDAC next value field is empty, i.e. was copied to the current VALUE. Write with \'1\' to clear bit."]
    #[inline(always)]
    pub fn vdac_empty(
        self,
    ) -> crate::common::RegisterFieldBool<0, 1, 0, Intr_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<0, 1, 0, Intr_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }
}
impl ::core::default::Default for Intr {
    #[inline(always)]
    fn default() -> Intr {
        <crate::RegValueT<Intr_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct IntrSet_SPEC;
impl crate::sealed::RegSpec for IntrSet_SPEC {
    type DataType = u32;
}

#[doc = "Interrupt request set register"]
pub type IntrSet = crate::RegValueT<IntrSet_SPEC>;

impl IntrSet {
    #[doc = "Write with \'1\' to set corresponding bit in interrupt request register."]
    #[inline(always)]
    pub fn vdac_empty_set(
        self,
    ) -> crate::common::RegisterFieldBool<0, 1, 0, IntrSet_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<0, 1, 0, IntrSet_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }
}
impl ::core::default::Default for IntrSet {
    #[inline(always)]
    fn default() -> IntrSet {
        <crate::RegValueT<IntrSet_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct IntrMask_SPEC;
impl crate::sealed::RegSpec for IntrMask_SPEC {
    type DataType = u32;
}

#[doc = "Interrupt request mask"]
pub type IntrMask = crate::RegValueT<IntrMask_SPEC>;

impl IntrMask {
    #[doc = "Mask bit for corresponding bit in interrupt request register."]
    #[inline(always)]
    pub fn vdac_empty_mask(
        self,
    ) -> crate::common::RegisterFieldBool<0, 1, 0, IntrMask_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<0, 1, 0, IntrMask_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }
}
impl ::core::default::Default for IntrMask {
    #[inline(always)]
    fn default() -> IntrMask {
        <crate::RegValueT<IntrMask_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct IntrMasked_SPEC;
impl crate::sealed::RegSpec for IntrMasked_SPEC {
    type DataType = u32;
}

#[doc = "Interrupt request masked"]
pub type IntrMasked = crate::RegValueT<IntrMasked_SPEC>;

impl IntrMasked {
    #[doc = "Logical and of corresponding request and mask bits."]
    #[inline(always)]
    pub fn vdac_empty_masked(
        self,
    ) -> crate::common::RegisterFieldBool<0, 1, 0, IntrMasked_SPEC, crate::common::R> {
        crate::common::RegisterFieldBool::<0,1,0,IntrMasked_SPEC,crate::common::R>::from_register(self,0)
    }
}
impl ::core::default::Default for IntrMasked {
    #[inline(always)]
    fn default() -> IntrMasked {
        <crate::RegValueT<IntrMasked_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct CtdacSw_SPEC;
impl crate::sealed::RegSpec for CtdacSw_SPEC {
    type DataType = u32;
}

#[doc = "CTDAC switch control"]
pub type CtdacSw = crate::RegValueT<CtdacSw_SPEC>;

impl CtdacSw {
    #[doc = "VDDA supply to ctdrefdrive"]
    #[inline(always)]
    pub fn ctdd_cvd(
        self,
    ) -> crate::common::RegisterFieldBool<0, 1, 0, CtdacSw_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<0, 1, 0, CtdacSw_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }

    #[doc = "ctdvout to P6 pin. Note this switch will temporarily be opened for deglitching if DEGLITCH_CO6 is set"]
    #[inline(always)]
    pub fn ctdo_co6(
        self,
    ) -> crate::common::RegisterFieldBool<8, 1, 0, CtdacSw_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<8, 1, 0, CtdacSw_SPEC, crate::common::RW>::from_register(
            self, 0,
        )
    }
}
impl ::core::default::Default for CtdacSw {
    #[inline(always)]
    fn default() -> CtdacSw {
        <crate::RegValueT<CtdacSw_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct CtdacSwClear_SPEC;
impl crate::sealed::RegSpec for CtdacSwClear_SPEC {
    type DataType = u32;
}

#[doc = "CTDAC switch control clear"]
pub type CtdacSwClear = crate::RegValueT<CtdacSwClear_SPEC>;

impl CtdacSwClear {
    #[doc = "see corresponding bit in CTD_SW"]
    #[inline(always)]
    pub fn ctdd_cvd(
        self,
    ) -> crate::common::RegisterFieldBool<0, 1, 0, CtdacSwClear_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<0,1,0,CtdacSwClear_SPEC,crate::common::RW>::from_register(self,0)
    }

    #[doc = "see corresponding bit in CTD_SW"]
    #[inline(always)]
    pub fn ctdo_co6(
        self,
    ) -> crate::common::RegisterFieldBool<8, 1, 0, CtdacSwClear_SPEC, crate::common::RW> {
        crate::common::RegisterFieldBool::<8,1,0,CtdacSwClear_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for CtdacSwClear {
    #[inline(always)]
    fn default() -> CtdacSwClear {
        <crate::RegValueT<CtdacSwClear_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct CtdacVal_SPEC;
impl crate::sealed::RegSpec for CtdacVal_SPEC {
    type DataType = u32;
}

#[doc = "DAC Value"]
pub type CtdacVal = crate::RegValueT<CtdacVal_SPEC>;

impl CtdacVal {
    #[doc = "Value, in CTDAC_MODE 1 this value is decoded"]
    #[inline(always)]
    pub fn value(
        self,
    ) -> crate::common::RegisterField<0, 0xfff, 1, 0, u16, u16, CtdacVal_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<0,0xfff,1,0,u16,u16,CtdacVal_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for CtdacVal {
    #[inline(always)]
    fn default() -> CtdacVal {
        <crate::RegValueT<CtdacVal_SPEC> as RegisterValue<_>>::new(0)
    }
}

#[doc(hidden)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct CtdacValNxt_SPEC;
impl crate::sealed::RegSpec for CtdacValNxt_SPEC {
    type DataType = u32;
}

#[doc = "Next DAC value (double buffering)"]
pub type CtdacValNxt = crate::RegValueT<CtdacValNxt_SPEC>;

impl CtdacValNxt {
    #[doc = "Next value for CTDAC_VAL.VALUE"]
    #[inline(always)]
    pub fn value(
        self,
    ) -> crate::common::RegisterField<0, 0xfff, 1, 0, u16, u16, CtdacValNxt_SPEC, crate::common::RW>
    {
        crate::common::RegisterField::<0,0xfff,1,0,u16,u16,CtdacValNxt_SPEC,crate::common::RW>::from_register(self,0)
    }
}
impl ::core::default::Default for CtdacValNxt {
    #[inline(always)]
    fn default() -> CtdacValNxt {
        <crate::RegValueT<CtdacValNxt_SPEC> as RegisterValue<_>>::new(0)
    }
}