1#[doc = "Register `INT_RAW` reader"]
2pub type R = crate::R<INT_RAW_SPEC>;
3#[doc = "Register `INT_RAW` writer"]
4pub type W = crate::W<INT_RAW_SPEC>;
5#[doc = "Field `JTAG_IN_FLUSH` reader - The raw interrupt bit turns to high level when flush cmd is received for IN endpoint 2 of JTAG."]
6pub type JTAG_IN_FLUSH_R = crate::BitReader;
7#[doc = "Field `JTAG_IN_FLUSH` writer - The raw interrupt bit turns to high level when flush cmd is received for IN endpoint 2 of JTAG."]
8pub type JTAG_IN_FLUSH_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `SOF` reader - The raw interrupt bit turns to high level when SOF frame is received."]
10pub type SOF_R = crate::BitReader;
11#[doc = "Field `SOF` writer - The raw interrupt bit turns to high level when SOF frame is received."]
12pub type SOF_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `SERIAL_OUT_RECV_PKT` reader - The raw interrupt bit turns to high level when Serial Port OUT Endpoint received one packet."]
14pub type SERIAL_OUT_RECV_PKT_R = crate::BitReader;
15#[doc = "Field `SERIAL_OUT_RECV_PKT` writer - The raw interrupt bit turns to high level when Serial Port OUT Endpoint received one packet."]
16pub type SERIAL_OUT_RECV_PKT_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `SERIAL_IN_EMPTY` reader - The raw interrupt bit turns to high level when Serial Port IN Endpoint is empty."]
18pub type SERIAL_IN_EMPTY_R = crate::BitReader;
19#[doc = "Field `SERIAL_IN_EMPTY` writer - The raw interrupt bit turns to high level when Serial Port IN Endpoint is empty."]
20pub type SERIAL_IN_EMPTY_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `PID_ERR` reader - The raw interrupt bit turns to high level when pid error is detected."]
22pub type PID_ERR_R = crate::BitReader;
23#[doc = "Field `PID_ERR` writer - The raw interrupt bit turns to high level when pid error is detected."]
24pub type PID_ERR_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `CRC5_ERR` reader - The raw interrupt bit turns to high level when CRC5 error is detected."]
26pub type CRC5_ERR_R = crate::BitReader;
27#[doc = "Field `CRC5_ERR` writer - The raw interrupt bit turns to high level when CRC5 error is detected."]
28pub type CRC5_ERR_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `CRC16_ERR` reader - The raw interrupt bit turns to high level when CRC16 error is detected."]
30pub type CRC16_ERR_R = crate::BitReader;
31#[doc = "Field `CRC16_ERR` writer - The raw interrupt bit turns to high level when CRC16 error is detected."]
32pub type CRC16_ERR_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `STUFF_ERR` reader - The raw interrupt bit turns to high level when stuff error is detected."]
34pub type STUFF_ERR_R = crate::BitReader;
35#[doc = "Field `STUFF_ERR` writer - The raw interrupt bit turns to high level when stuff error is detected."]
36pub type STUFF_ERR_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `IN_TOKEN_REC_IN_EP1` reader - The raw interrupt bit turns to high level when IN token for IN endpoint 1 is received."]
38pub type IN_TOKEN_REC_IN_EP1_R = crate::BitReader;
39#[doc = "Field `IN_TOKEN_REC_IN_EP1` writer - The raw interrupt bit turns to high level when IN token for IN endpoint 1 is received."]
40pub type IN_TOKEN_REC_IN_EP1_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `USB_BUS_RESET` reader - The raw interrupt bit turns to high level when usb bus reset is detected."]
42pub type USB_BUS_RESET_R = crate::BitReader;
43#[doc = "Field `USB_BUS_RESET` writer - The raw interrupt bit turns to high level when usb bus reset is detected."]
44pub type USB_BUS_RESET_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `OUT_EP1_ZERO_PAYLOAD` reader - The raw interrupt bit turns to high level when OUT endpoint 1 received packet with zero palyload."]
46pub type OUT_EP1_ZERO_PAYLOAD_R = crate::BitReader;
47#[doc = "Field `OUT_EP1_ZERO_PAYLOAD` writer - The raw interrupt bit turns to high level when OUT endpoint 1 received packet with zero palyload."]
48pub type OUT_EP1_ZERO_PAYLOAD_W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `OUT_EP2_ZERO_PAYLOAD` reader - The raw interrupt bit turns to high level when OUT endpoint 2 received packet with zero palyload."]
50pub type OUT_EP2_ZERO_PAYLOAD_R = crate::BitReader;
51#[doc = "Field `OUT_EP2_ZERO_PAYLOAD` writer - The raw interrupt bit turns to high level when OUT endpoint 2 received packet with zero palyload."]
52pub type OUT_EP2_ZERO_PAYLOAD_W<'a, REG> = crate::BitWriter<'a, REG>;
53impl R {
54#[doc = "Bit 0 - The raw interrupt bit turns to high level when flush cmd is received for IN endpoint 2 of JTAG."]
55 #[inline(always)]
56pub fn jtag_in_flush(&self) -> JTAG_IN_FLUSH_R {
57 JTAG_IN_FLUSH_R::new((self.bits & 1) != 0)
58 }
59#[doc = "Bit 1 - The raw interrupt bit turns to high level when SOF frame is received."]
60 #[inline(always)]
61pub fn sof(&self) -> SOF_R {
62 SOF_R::new(((self.bits >> 1) & 1) != 0)
63 }
64#[doc = "Bit 2 - The raw interrupt bit turns to high level when Serial Port OUT Endpoint received one packet."]
65 #[inline(always)]
66pub fn serial_out_recv_pkt(&self) -> SERIAL_OUT_RECV_PKT_R {
67 SERIAL_OUT_RECV_PKT_R::new(((self.bits >> 2) & 1) != 0)
68 }
69#[doc = "Bit 3 - The raw interrupt bit turns to high level when Serial Port IN Endpoint is empty."]
70 #[inline(always)]
71pub fn serial_in_empty(&self) -> SERIAL_IN_EMPTY_R {
72 SERIAL_IN_EMPTY_R::new(((self.bits >> 3) & 1) != 0)
73 }
74#[doc = "Bit 4 - The raw interrupt bit turns to high level when pid error is detected."]
75 #[inline(always)]
76pub fn pid_err(&self) -> PID_ERR_R {
77 PID_ERR_R::new(((self.bits >> 4) & 1) != 0)
78 }
79#[doc = "Bit 5 - The raw interrupt bit turns to high level when CRC5 error is detected."]
80 #[inline(always)]
81pub fn crc5_err(&self) -> CRC5_ERR_R {
82 CRC5_ERR_R::new(((self.bits >> 5) & 1) != 0)
83 }
84#[doc = "Bit 6 - The raw interrupt bit turns to high level when CRC16 error is detected."]
85 #[inline(always)]
86pub fn crc16_err(&self) -> CRC16_ERR_R {
87 CRC16_ERR_R::new(((self.bits >> 6) & 1) != 0)
88 }
89#[doc = "Bit 7 - The raw interrupt bit turns to high level when stuff error is detected."]
90 #[inline(always)]
91pub fn stuff_err(&self) -> STUFF_ERR_R {
92 STUFF_ERR_R::new(((self.bits >> 7) & 1) != 0)
93 }
94#[doc = "Bit 8 - The raw interrupt bit turns to high level when IN token for IN endpoint 1 is received."]
95 #[inline(always)]
96pub fn in_token_rec_in_ep1(&self) -> IN_TOKEN_REC_IN_EP1_R {
97 IN_TOKEN_REC_IN_EP1_R::new(((self.bits >> 8) & 1) != 0)
98 }
99#[doc = "Bit 9 - The raw interrupt bit turns to high level when usb bus reset is detected."]
100 #[inline(always)]
101pub fn usb_bus_reset(&self) -> USB_BUS_RESET_R {
102 USB_BUS_RESET_R::new(((self.bits >> 9) & 1) != 0)
103 }
104#[doc = "Bit 10 - The raw interrupt bit turns to high level when OUT endpoint 1 received packet with zero palyload."]
105 #[inline(always)]
106pub fn out_ep1_zero_payload(&self) -> OUT_EP1_ZERO_PAYLOAD_R {
107 OUT_EP1_ZERO_PAYLOAD_R::new(((self.bits >> 10) & 1) != 0)
108 }
109#[doc = "Bit 11 - The raw interrupt bit turns to high level when OUT endpoint 2 received packet with zero palyload."]
110 #[inline(always)]
111pub fn out_ep2_zero_payload(&self) -> OUT_EP2_ZERO_PAYLOAD_R {
112 OUT_EP2_ZERO_PAYLOAD_R::new(((self.bits >> 11) & 1) != 0)
113 }
114}
115#[cfg(feature = "impl-register-debug")]
116impl core::fmt::Debug for R {
117fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
118 f.debug_struct("INT_RAW")
119 .field("jtag_in_flush", &self.jtag_in_flush())
120 .field("sof", &self.sof())
121 .field("serial_out_recv_pkt", &self.serial_out_recv_pkt())
122 .field("serial_in_empty", &self.serial_in_empty())
123 .field("pid_err", &self.pid_err())
124 .field("crc5_err", &self.crc5_err())
125 .field("crc16_err", &self.crc16_err())
126 .field("stuff_err", &self.stuff_err())
127 .field("in_token_rec_in_ep1", &self.in_token_rec_in_ep1())
128 .field("usb_bus_reset", &self.usb_bus_reset())
129 .field("out_ep1_zero_payload", &self.out_ep1_zero_payload())
130 .field("out_ep2_zero_payload", &self.out_ep2_zero_payload())
131 .finish()
132 }
133}
134impl W {
135#[doc = "Bit 0 - The raw interrupt bit turns to high level when flush cmd is received for IN endpoint 2 of JTAG."]
136 #[inline(always)]
137pub fn jtag_in_flush(&mut self) -> JTAG_IN_FLUSH_W<INT_RAW_SPEC> {
138 JTAG_IN_FLUSH_W::new(self, 0)
139 }
140#[doc = "Bit 1 - The raw interrupt bit turns to high level when SOF frame is received."]
141 #[inline(always)]
142pub fn sof(&mut self) -> SOF_W<INT_RAW_SPEC> {
143 SOF_W::new(self, 1)
144 }
145#[doc = "Bit 2 - The raw interrupt bit turns to high level when Serial Port OUT Endpoint received one packet."]
146 #[inline(always)]
147pub fn serial_out_recv_pkt(&mut self) -> SERIAL_OUT_RECV_PKT_W<INT_RAW_SPEC> {
148 SERIAL_OUT_RECV_PKT_W::new(self, 2)
149 }
150#[doc = "Bit 3 - The raw interrupt bit turns to high level when Serial Port IN Endpoint is empty."]
151 #[inline(always)]
152pub fn serial_in_empty(&mut self) -> SERIAL_IN_EMPTY_W<INT_RAW_SPEC> {
153 SERIAL_IN_EMPTY_W::new(self, 3)
154 }
155#[doc = "Bit 4 - The raw interrupt bit turns to high level when pid error is detected."]
156 #[inline(always)]
157pub fn pid_err(&mut self) -> PID_ERR_W<INT_RAW_SPEC> {
158 PID_ERR_W::new(self, 4)
159 }
160#[doc = "Bit 5 - The raw interrupt bit turns to high level when CRC5 error is detected."]
161 #[inline(always)]
162pub fn crc5_err(&mut self) -> CRC5_ERR_W<INT_RAW_SPEC> {
163 CRC5_ERR_W::new(self, 5)
164 }
165#[doc = "Bit 6 - The raw interrupt bit turns to high level when CRC16 error is detected."]
166 #[inline(always)]
167pub fn crc16_err(&mut self) -> CRC16_ERR_W<INT_RAW_SPEC> {
168 CRC16_ERR_W::new(self, 6)
169 }
170#[doc = "Bit 7 - The raw interrupt bit turns to high level when stuff error is detected."]
171 #[inline(always)]
172pub fn stuff_err(&mut self) -> STUFF_ERR_W<INT_RAW_SPEC> {
173 STUFF_ERR_W::new(self, 7)
174 }
175#[doc = "Bit 8 - The raw interrupt bit turns to high level when IN token for IN endpoint 1 is received."]
176 #[inline(always)]
177pub fn in_token_rec_in_ep1(&mut self) -> IN_TOKEN_REC_IN_EP1_W<INT_RAW_SPEC> {
178 IN_TOKEN_REC_IN_EP1_W::new(self, 8)
179 }
180#[doc = "Bit 9 - The raw interrupt bit turns to high level when usb bus reset is detected."]
181 #[inline(always)]
182pub fn usb_bus_reset(&mut self) -> USB_BUS_RESET_W<INT_RAW_SPEC> {
183 USB_BUS_RESET_W::new(self, 9)
184 }
185#[doc = "Bit 10 - The raw interrupt bit turns to high level when OUT endpoint 1 received packet with zero palyload."]
186 #[inline(always)]
187pub fn out_ep1_zero_payload(&mut self) -> OUT_EP1_ZERO_PAYLOAD_W<INT_RAW_SPEC> {
188 OUT_EP1_ZERO_PAYLOAD_W::new(self, 10)
189 }
190#[doc = "Bit 11 - The raw interrupt bit turns to high level when OUT endpoint 2 received packet with zero palyload."]
191 #[inline(always)]
192pub fn out_ep2_zero_payload(&mut self) -> OUT_EP2_ZERO_PAYLOAD_W<INT_RAW_SPEC> {
193 OUT_EP2_ZERO_PAYLOAD_W::new(self, 11)
194 }
195}
196#[doc = "USB_DEVICE_INT_RAW_REG.\n\nYou can [`read`](crate::Reg::read) this register and get [`int_raw::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_raw::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
197pub struct INT_RAW_SPEC;
198impl crate::RegisterSpec for INT_RAW_SPEC {
199type Ux = u32;
200}
201#[doc = "`read()` method returns [`int_raw::R`](R) reader structure"]
202impl crate::Readable for INT_RAW_SPEC {}
203#[doc = "`write(|w| ..)` method takes [`int_raw::W`](W) writer structure"]
204impl crate::Writable for INT_RAW_SPEC {
205type Safety = crate::Unsafe;
206const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
207const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
208}
209#[doc = "`reset()` method sets INT_RAW to value 0x08"]
210impl crate::Resettable for INT_RAW_SPEC {
211const RESET_VALUE: u32 = 0x08;
212}