1#[doc = r"Enumeration of all the interrupts."]
2#[cfg_attr(feature = "defmt", derive(defmt::Format))]
3#[derive(Copy, Clone, Debug, PartialEq, Eq)]
4#[repr(u16)]
5pub enum Interrupt {
6 #[doc = "0 - WIFI_MAC"]
7 WIFI_MAC = 0,
8 #[doc = "1 - WIFI_MAC_NMI"]
9 WIFI_MAC_NMI = 1,
10 #[doc = "2 - WIFI_PWR"]
11 WIFI_PWR = 2,
12 #[doc = "3 - WIFI_BB"]
13 WIFI_BB = 3,
14 #[doc = "4 - BT_MAC"]
15 BT_MAC = 4,
16 #[doc = "5 - BT_BB"]
17 BT_BB = 5,
18 #[doc = "6 - BT_BB_NMI"]
19 BT_BB_NMI = 6,
20 #[doc = "7 - RWBT"]
21 RWBT = 7,
22 #[doc = "8 - RWBLE"]
23 RWBLE = 8,
24 #[doc = "9 - RWBT_NMI"]
25 RWBT_NMI = 9,
26 #[doc = "10 - RWBLE_NMI"]
27 RWBLE_NMI = 10,
28 #[doc = "11 - I2C_MASTER"]
29 I2C_MASTER = 11,
30 #[doc = "12 - SLC0"]
31 SLC0 = 12,
32 #[doc = "13 - SLC1"]
33 SLC1 = 13,
34 #[doc = "14 - APB_CTRL"]
35 APB_CTRL = 14,
36 #[doc = "15 - UHCI0"]
37 UHCI0 = 15,
38 #[doc = "16 - GPIO"]
39 GPIO = 16,
40 #[doc = "17 - GPIO_NMI"]
41 GPIO_NMI = 17,
42 #[doc = "18 - SPI1"]
43 SPI1 = 18,
44 #[doc = "19 - SPI2"]
45 SPI2 = 19,
46 #[doc = "20 - I2S0"]
47 I2S0 = 20,
48 #[doc = "21 - UART0"]
49 UART0 = 21,
50 #[doc = "22 - UART1"]
51 UART1 = 22,
52 #[doc = "23 - LEDC"]
53 LEDC = 23,
54 #[doc = "24 - EFUSE"]
55 EFUSE = 24,
56 #[doc = "25 - TWAI0"]
57 TWAI0 = 25,
58 #[doc = "26 - USB_DEVICE"]
59 USB_DEVICE = 26,
60 #[doc = "27 - RTC_CORE"]
61 RTC_CORE = 27,
62 #[doc = "28 - RMT"]
63 RMT = 28,
64 #[doc = "29 - I2C_EXT0"]
65 I2C_EXT0 = 29,
66 #[doc = "30 - TIMER1"]
67 TIMER1 = 30,
68 #[doc = "31 - TIMER2"]
69 TIMER2 = 31,
70 #[doc = "32 - TG0_T0_LEVEL"]
71 TG0_T0_LEVEL = 32,
72 #[doc = "33 - TG0_WDT_LEVEL"]
73 TG0_WDT_LEVEL = 33,
74 #[doc = "34 - TG1_T0_LEVEL"]
75 TG1_T0_LEVEL = 34,
76 #[doc = "35 - TG1_WDT_LEVEL"]
77 TG1_WDT_LEVEL = 35,
78 #[doc = "36 - CACHE_IA"]
79 CACHE_IA = 36,
80 #[doc = "37 - SYSTIMER_TARGET0"]
81 SYSTIMER_TARGET0 = 37,
82 #[doc = "38 - SYSTIMER_TARGET1"]
83 SYSTIMER_TARGET1 = 38,
84 #[doc = "39 - SYSTIMER_TARGET2"]
85 SYSTIMER_TARGET2 = 39,
86 #[doc = "40 - SPI_MEM_REJECT_CACHE"]
87 SPI_MEM_REJECT_CACHE = 40,
88 #[doc = "41 - ICACHE_PRELOAD0"]
89 ICACHE_PRELOAD0 = 41,
90 #[doc = "42 - ICACHE_SYNC0"]
91 ICACHE_SYNC0 = 42,
92 #[doc = "43 - APB_ADC"]
93 APB_ADC = 43,
94 #[doc = "44 - DMA_CH0"]
95 DMA_CH0 = 44,
96 #[doc = "45 - DMA_CH1"]
97 DMA_CH1 = 45,
98 #[doc = "46 - DMA_CH2"]
99 DMA_CH2 = 46,
100 #[doc = "47 - RSA"]
101 RSA = 47,
102 #[doc = "48 - AES"]
103 AES = 48,
104 #[doc = "49 - SHA"]
105 SHA = 49,
106 #[doc = "50 - FROM_CPU_INTR0"]
107 FROM_CPU_INTR0 = 50,
108 #[doc = "51 - FROM_CPU_INTR1"]
109 FROM_CPU_INTR1 = 51,
110 #[doc = "52 - FROM_CPU_INTR2"]
111 FROM_CPU_INTR2 = 52,
112 #[doc = "53 - FROM_CPU_INTR3"]
113 FROM_CPU_INTR3 = 53,
114 #[doc = "54 - ASSIST_DEBUG"]
115 ASSIST_DEBUG = 54,
116 #[doc = "55 - DMA_APBPERI_PMS"]
117 DMA_APBPERI_PMS = 55,
118 #[doc = "56 - CORE0_IRAM0_PMS"]
119 CORE0_IRAM0_PMS = 56,
120 #[doc = "57 - CORE0_DRAM0_PMS"]
121 CORE0_DRAM0_PMS = 57,
122 #[doc = "58 - CORE0_PIF_PMS"]
123 CORE0_PIF_PMS = 58,
124 #[doc = "59 - CORE0_PIF_PMS_SIZE"]
125 CORE0_PIF_PMS_SIZE = 59,
126 #[doc = "60 - BAK_PMS_VIOLATE"]
127 BAK_PMS_VIOLATE = 60,
128 #[doc = "61 - CACHE_CORE0_ACS"]
129 CACHE_CORE0_ACS = 61,
130}
131#[doc = r" TryFromInterruptError"]
132#[cfg_attr(feature = "defmt", derive(defmt::Format))]
133#[derive(Debug, Copy, Clone)]
134pub struct TryFromInterruptError(());
135impl Interrupt {
136 #[doc = r" Attempt to convert a given value into an `Interrupt`"]
137 #[inline]
138 pub fn try_from(value: u8) -> Result<Self, TryFromInterruptError> {
139 match value {
140 0 => Ok(Interrupt::WIFI_MAC),
141 1 => Ok(Interrupt::WIFI_MAC_NMI),
142 2 => Ok(Interrupt::WIFI_PWR),
143 3 => Ok(Interrupt::WIFI_BB),
144 4 => Ok(Interrupt::BT_MAC),
145 5 => Ok(Interrupt::BT_BB),
146 6 => Ok(Interrupt::BT_BB_NMI),
147 7 => Ok(Interrupt::RWBT),
148 8 => Ok(Interrupt::RWBLE),
149 9 => Ok(Interrupt::RWBT_NMI),
150 10 => Ok(Interrupt::RWBLE_NMI),
151 11 => Ok(Interrupt::I2C_MASTER),
152 12 => Ok(Interrupt::SLC0),
153 13 => Ok(Interrupt::SLC1),
154 14 => Ok(Interrupt::APB_CTRL),
155 15 => Ok(Interrupt::UHCI0),
156 16 => Ok(Interrupt::GPIO),
157 17 => Ok(Interrupt::GPIO_NMI),
158 18 => Ok(Interrupt::SPI1),
159 19 => Ok(Interrupt::SPI2),
160 20 => Ok(Interrupt::I2S0),
161 21 => Ok(Interrupt::UART0),
162 22 => Ok(Interrupt::UART1),
163 23 => Ok(Interrupt::LEDC),
164 24 => Ok(Interrupt::EFUSE),
165 25 => Ok(Interrupt::TWAI0),
166 26 => Ok(Interrupt::USB_DEVICE),
167 27 => Ok(Interrupt::RTC_CORE),
168 28 => Ok(Interrupt::RMT),
169 29 => Ok(Interrupt::I2C_EXT0),
170 30 => Ok(Interrupt::TIMER1),
171 31 => Ok(Interrupt::TIMER2),
172 32 => Ok(Interrupt::TG0_T0_LEVEL),
173 33 => Ok(Interrupt::TG0_WDT_LEVEL),
174 34 => Ok(Interrupt::TG1_T0_LEVEL),
175 35 => Ok(Interrupt::TG1_WDT_LEVEL),
176 36 => Ok(Interrupt::CACHE_IA),
177 37 => Ok(Interrupt::SYSTIMER_TARGET0),
178 38 => Ok(Interrupt::SYSTIMER_TARGET1),
179 39 => Ok(Interrupt::SYSTIMER_TARGET2),
180 40 => Ok(Interrupt::SPI_MEM_REJECT_CACHE),
181 41 => Ok(Interrupt::ICACHE_PRELOAD0),
182 42 => Ok(Interrupt::ICACHE_SYNC0),
183 43 => Ok(Interrupt::APB_ADC),
184 44 => Ok(Interrupt::DMA_CH0),
185 45 => Ok(Interrupt::DMA_CH1),
186 46 => Ok(Interrupt::DMA_CH2),
187 47 => Ok(Interrupt::RSA),
188 48 => Ok(Interrupt::AES),
189 49 => Ok(Interrupt::SHA),
190 50 => Ok(Interrupt::FROM_CPU_INTR0),
191 51 => Ok(Interrupt::FROM_CPU_INTR1),
192 52 => Ok(Interrupt::FROM_CPU_INTR2),
193 53 => Ok(Interrupt::FROM_CPU_INTR3),
194 54 => Ok(Interrupt::ASSIST_DEBUG),
195 55 => Ok(Interrupt::DMA_APBPERI_PMS),
196 56 => Ok(Interrupt::CORE0_IRAM0_PMS),
197 57 => Ok(Interrupt::CORE0_DRAM0_PMS),
198 58 => Ok(Interrupt::CORE0_PIF_PMS),
199 59 => Ok(Interrupt::CORE0_PIF_PMS_SIZE),
200 60 => Ok(Interrupt::BAK_PMS_VIOLATE),
201 61 => Ok(Interrupt::CACHE_CORE0_ACS),
202 _ => Err(TryFromInterruptError(())),
203 }
204 }
205}
206#[cfg(feature = "rt")]
207#[macro_export]
208#[doc = r" Assigns a handler to an interrupt"]
209#[doc = r""]
210#[doc = r" This macro takes two arguments: the name of an interrupt and the path to the"]
211#[doc = r" function that will be used as the handler of that interrupt. That function"]
212#[doc = r" must have signature `fn()`."]
213#[doc = r""]
214#[doc = r" Optionally, a third argument may be used to declare interrupt local data."]
215#[doc = r" The handler will have exclusive access to these *local* variables on each"]
216#[doc = r" invocation. If the third argument is used then the signature of the handler"]
217#[doc = r" function must be `fn(&mut $NAME::Locals)` where `$NAME` is the first argument"]
218#[doc = r" passed to the macro."]
219#[doc = r""]
220#[doc = r" # Example"]
221#[doc = r""]
222#[doc = r" ``` ignore"]
223#[doc = r" interrupt!(TIM2, periodic);"]
224#[doc = r""]
225#[doc = r" fn periodic() {"]
226#[doc = r#" print!(".");"#]
227#[doc = r" }"]
228#[doc = r""]
229#[doc = r" interrupt!(TIM3, tick, locals: {"]
230#[doc = r" tick: bool = false;"]
231#[doc = r" });"]
232#[doc = r""]
233#[doc = r" fn tick(locals: &mut TIM3::Locals) {"]
234#[doc = r" locals.tick = !locals.tick;"]
235#[doc = r""]
236#[doc = r" if locals.tick {"]
237#[doc = r#" println!("Tick");"#]
238#[doc = r" } else {"]
239#[doc = r#" println!("Tock");"#]
240#[doc = r" }"]
241#[doc = r" }"]
242#[doc = r" ```"]
243macro_rules ! interrupt { ($ NAME : ident , $ path : path , locals : { $ ($ lvar : ident : $ lty : ty = $ lval : expr ;) * }) => { # [allow (non_snake_case)] mod $ NAME { pub struct Locals { $ (pub $ lvar : $ lty ,) * } } # [allow (non_snake_case)] # [no_mangle] pub extern "C" fn $ NAME () { let _ = $ crate :: interrupt :: Interrupt :: $ NAME ; static mut LOCALS : self :: $ NAME :: Locals = self :: $ NAME :: Locals { $ ($ lvar : $ lval ,) * } ; let f : fn (& mut self :: $ NAME :: Locals) = $ path ; f (unsafe { & mut LOCALS }) ; } } ; ($ NAME : ident , $ path : path) => { # [allow (non_snake_case)] # [no_mangle] pub extern "C" fn $ NAME () { let _ = $ crate :: interrupt :: Interrupt :: $ NAME ; let f : fn () = $ path ; f () ; } } }