esp32c3/
interrupt_core0.rs

1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5    mac_intr_map: MAC_INTR_MAP,
6    mac_nmi_map: MAC_NMI_MAP,
7    pwr_intr_map: PWR_INTR_MAP,
8    bb_int_map: BB_INT_MAP,
9    bt_mac_int_map: BT_MAC_INT_MAP,
10    bt_bb_int_map: BT_BB_INT_MAP,
11    bt_bb_nmi_map: BT_BB_NMI_MAP,
12    rwbt_irq_map: RWBT_IRQ_MAP,
13    rwble_irq_map: RWBLE_IRQ_MAP,
14    rwbt_nmi_map: RWBT_NMI_MAP,
15    rwble_nmi_map: RWBLE_NMI_MAP,
16    i2c_mst_int_map: I2C_MST_INT_MAP,
17    slc0_intr_map: SLC0_INTR_MAP,
18    slc1_intr_map: SLC1_INTR_MAP,
19    apb_ctrl_intr_map: APB_CTRL_INTR_MAP,
20    uhci0_intr_map: UHCI0_INTR_MAP,
21    gpio_interrupt_pro_map: GPIO_INTERRUPT_PRO_MAP,
22    gpio_interrupt_pro_nmi_map: GPIO_INTERRUPT_PRO_NMI_MAP,
23    spi_intr_1_map: SPI_INTR_1_MAP,
24    spi_intr_2_map: SPI_INTR_2_MAP,
25    i2s1_int_map: I2S1_INT_MAP,
26    uart_intr_map: UART_INTR_MAP,
27    uart1_intr_map: UART1_INTR_MAP,
28    ledc_int_map: LEDC_INT_MAP,
29    efuse_int_map: EFUSE_INT_MAP,
30    can_int_map: CAN_INT_MAP,
31    usb_intr_map: USB_INTR_MAP,
32    rtc_core_intr_map: RTC_CORE_INTR_MAP,
33    rmt_intr_map: RMT_INTR_MAP,
34    i2c_ext0_intr_map: I2C_EXT0_INTR_MAP,
35    timer_int1_map: TIMER_INT1_MAP,
36    timer_int2_map: TIMER_INT2_MAP,
37    tg_t0_int_map: TG_T0_INT_MAP,
38    tg_wdt_int_map: TG_WDT_INT_MAP,
39    tg1_t0_int_map: TG1_T0_INT_MAP,
40    tg1_wdt_int_map: TG1_WDT_INT_MAP,
41    cache_ia_int_map: CACHE_IA_INT_MAP,
42    systimer_target0_int_map: SYSTIMER_TARGET0_INT_MAP,
43    systimer_target1_int_map: SYSTIMER_TARGET1_INT_MAP,
44    systimer_target2_int_map: SYSTIMER_TARGET2_INT_MAP,
45    spi_mem_reject_intr_map: SPI_MEM_REJECT_INTR_MAP,
46    icache_preload_int_map: ICACHE_PRELOAD_INT_MAP,
47    icache_sync_int_map: ICACHE_SYNC_INT_MAP,
48    apb_adc_int_map: APB_ADC_INT_MAP,
49    dma_ch0_int_map: DMA_CH0_INT_MAP,
50    dma_ch1_int_map: DMA_CH1_INT_MAP,
51    dma_ch2_int_map: DMA_CH2_INT_MAP,
52    rsa_int_map: RSA_INT_MAP,
53    aes_int_map: AES_INT_MAP,
54    sha_int_map: SHA_INT_MAP,
55    cpu_intr_from_cpu_0_map: CPU_INTR_FROM_CPU_0_MAP,
56    cpu_intr_from_cpu_1_map: CPU_INTR_FROM_CPU_1_MAP,
57    cpu_intr_from_cpu_2_map: CPU_INTR_FROM_CPU_2_MAP,
58    cpu_intr_from_cpu_3_map: CPU_INTR_FROM_CPU_3_MAP,
59    assist_debug_intr_map: ASSIST_DEBUG_INTR_MAP,
60    dma_apbperi_pms_monitor_violate_intr_map: DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP,
61    core_0_iram0_pms_monitor_violate_intr_map: CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP,
62    core_0_dram0_pms_monitor_violate_intr_map: CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP,
63    core_0_pif_pms_monitor_violate_intr_map: CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP,
64    core_0_pif_pms_monitor_violate_size_intr_map: CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP,
65    backup_pms_violate_intr_map: BACKUP_PMS_VIOLATE_INTR_MAP,
66    cache_core0_acs_int_map: CACHE_CORE0_ACS_INT_MAP,
67    intr_status_reg_0: INTR_STATUS_REG_0,
68    intr_status_reg_1: INTR_STATUS_REG_1,
69    clock_gate: CLOCK_GATE,
70    cpu_int_enable: CPU_INT_ENABLE,
71    cpu_int_type: CPU_INT_TYPE,
72    cpu_int_clear: CPU_INT_CLEAR,
73    cpu_int_eip_status: CPU_INT_EIP_STATUS,
74    cpu_int_pri: [CPU_INT_PRI; 32],
75    cpu_int_thresh: CPU_INT_THRESH,
76    _reserved71: [u8; 0x0664],
77    interrupt_reg_date: INTERRUPT_REG_DATE,
78}
79impl RegisterBlock {
80    #[doc = "0x00 - mac intr map register"]
81    #[inline(always)]
82    pub const fn mac_intr_map(&self) -> &MAC_INTR_MAP {
83        &self.mac_intr_map
84    }
85    #[doc = "0x04 - mac nmi_intr map register"]
86    #[inline(always)]
87    pub const fn mac_nmi_map(&self) -> &MAC_NMI_MAP {
88        &self.mac_nmi_map
89    }
90    #[doc = "0x08 - pwr intr map register"]
91    #[inline(always)]
92    pub const fn pwr_intr_map(&self) -> &PWR_INTR_MAP {
93        &self.pwr_intr_map
94    }
95    #[doc = "0x0c - bb intr map register"]
96    #[inline(always)]
97    pub const fn bb_int_map(&self) -> &BB_INT_MAP {
98        &self.bb_int_map
99    }
100    #[doc = "0x10 - bt intr map register"]
101    #[inline(always)]
102    pub const fn bt_mac_int_map(&self) -> &BT_MAC_INT_MAP {
103        &self.bt_mac_int_map
104    }
105    #[doc = "0x14 - bb_bt intr map register"]
106    #[inline(always)]
107    pub const fn bt_bb_int_map(&self) -> &BT_BB_INT_MAP {
108        &self.bt_bb_int_map
109    }
110    #[doc = "0x18 - bb_bt_nmi intr map register"]
111    #[inline(always)]
112    pub const fn bt_bb_nmi_map(&self) -> &BT_BB_NMI_MAP {
113        &self.bt_bb_nmi_map
114    }
115    #[doc = "0x1c - rwbt intr map register"]
116    #[inline(always)]
117    pub const fn rwbt_irq_map(&self) -> &RWBT_IRQ_MAP {
118        &self.rwbt_irq_map
119    }
120    #[doc = "0x20 - rwble intr map register"]
121    #[inline(always)]
122    pub const fn rwble_irq_map(&self) -> &RWBLE_IRQ_MAP {
123        &self.rwble_irq_map
124    }
125    #[doc = "0x24 - rwbt_nmi intr map register"]
126    #[inline(always)]
127    pub const fn rwbt_nmi_map(&self) -> &RWBT_NMI_MAP {
128        &self.rwbt_nmi_map
129    }
130    #[doc = "0x28 - rwble_nmi intr map register"]
131    #[inline(always)]
132    pub const fn rwble_nmi_map(&self) -> &RWBLE_NMI_MAP {
133        &self.rwble_nmi_map
134    }
135    #[doc = "0x2c - i2c intr map register"]
136    #[inline(always)]
137    pub const fn i2c_mst_int_map(&self) -> &I2C_MST_INT_MAP {
138        &self.i2c_mst_int_map
139    }
140    #[doc = "0x30 - slc0 intr map register"]
141    #[inline(always)]
142    pub const fn slc0_intr_map(&self) -> &SLC0_INTR_MAP {
143        &self.slc0_intr_map
144    }
145    #[doc = "0x34 - slc1 intr map register"]
146    #[inline(always)]
147    pub const fn slc1_intr_map(&self) -> &SLC1_INTR_MAP {
148        &self.slc1_intr_map
149    }
150    #[doc = "0x38 - apb_ctrl intr map register"]
151    #[inline(always)]
152    pub const fn apb_ctrl_intr_map(&self) -> &APB_CTRL_INTR_MAP {
153        &self.apb_ctrl_intr_map
154    }
155    #[doc = "0x3c - uchi0 intr map register"]
156    #[inline(always)]
157    pub const fn uhci0_intr_map(&self) -> &UHCI0_INTR_MAP {
158        &self.uhci0_intr_map
159    }
160    #[doc = "0x40 - gpio intr map register"]
161    #[inline(always)]
162    pub const fn gpio_interrupt_pro_map(&self) -> &GPIO_INTERRUPT_PRO_MAP {
163        &self.gpio_interrupt_pro_map
164    }
165    #[doc = "0x44 - gpio_pro intr map register"]
166    #[inline(always)]
167    pub const fn gpio_interrupt_pro_nmi_map(&self) -> &GPIO_INTERRUPT_PRO_NMI_MAP {
168        &self.gpio_interrupt_pro_nmi_map
169    }
170    #[doc = "0x48 - gpio_pro_nmi intr map register"]
171    #[inline(always)]
172    pub const fn spi_intr_1_map(&self) -> &SPI_INTR_1_MAP {
173        &self.spi_intr_1_map
174    }
175    #[doc = "0x4c - spi1 intr map register"]
176    #[inline(always)]
177    pub const fn spi_intr_2_map(&self) -> &SPI_INTR_2_MAP {
178        &self.spi_intr_2_map
179    }
180    #[doc = "0x50 - spi2 intr map register"]
181    #[inline(always)]
182    pub const fn i2s1_int_map(&self) -> &I2S1_INT_MAP {
183        &self.i2s1_int_map
184    }
185    #[doc = "0x54 - i2s1 intr map register"]
186    #[inline(always)]
187    pub const fn uart_intr_map(&self) -> &UART_INTR_MAP {
188        &self.uart_intr_map
189    }
190    #[doc = "0x58 - uart1 intr map register"]
191    #[inline(always)]
192    pub const fn uart1_intr_map(&self) -> &UART1_INTR_MAP {
193        &self.uart1_intr_map
194    }
195    #[doc = "0x5c - ledc intr map register"]
196    #[inline(always)]
197    pub const fn ledc_int_map(&self) -> &LEDC_INT_MAP {
198        &self.ledc_int_map
199    }
200    #[doc = "0x60 - efuse intr map register"]
201    #[inline(always)]
202    pub const fn efuse_int_map(&self) -> &EFUSE_INT_MAP {
203        &self.efuse_int_map
204    }
205    #[doc = "0x64 - can intr map register"]
206    #[inline(always)]
207    pub const fn can_int_map(&self) -> &CAN_INT_MAP {
208        &self.can_int_map
209    }
210    #[doc = "0x68 - usb intr map register"]
211    #[inline(always)]
212    pub const fn usb_intr_map(&self) -> &USB_INTR_MAP {
213        &self.usb_intr_map
214    }
215    #[doc = "0x6c - rtc intr map register"]
216    #[inline(always)]
217    pub const fn rtc_core_intr_map(&self) -> &RTC_CORE_INTR_MAP {
218        &self.rtc_core_intr_map
219    }
220    #[doc = "0x70 - rmt intr map register"]
221    #[inline(always)]
222    pub const fn rmt_intr_map(&self) -> &RMT_INTR_MAP {
223        &self.rmt_intr_map
224    }
225    #[doc = "0x74 - i2c intr map register"]
226    #[inline(always)]
227    pub const fn i2c_ext0_intr_map(&self) -> &I2C_EXT0_INTR_MAP {
228        &self.i2c_ext0_intr_map
229    }
230    #[doc = "0x78 - timer1 intr map register"]
231    #[inline(always)]
232    pub const fn timer_int1_map(&self) -> &TIMER_INT1_MAP {
233        &self.timer_int1_map
234    }
235    #[doc = "0x7c - timer2 intr map register"]
236    #[inline(always)]
237    pub const fn timer_int2_map(&self) -> &TIMER_INT2_MAP {
238        &self.timer_int2_map
239    }
240    #[doc = "0x80 - tg to intr map register"]
241    #[inline(always)]
242    pub const fn tg_t0_int_map(&self) -> &TG_T0_INT_MAP {
243        &self.tg_t0_int_map
244    }
245    #[doc = "0x84 - tg wdt intr map register"]
246    #[inline(always)]
247    pub const fn tg_wdt_int_map(&self) -> &TG_WDT_INT_MAP {
248        &self.tg_wdt_int_map
249    }
250    #[doc = "0x88 - tg1 to intr map register"]
251    #[inline(always)]
252    pub const fn tg1_t0_int_map(&self) -> &TG1_T0_INT_MAP {
253        &self.tg1_t0_int_map
254    }
255    #[doc = "0x8c - tg1 wdt intr map register"]
256    #[inline(always)]
257    pub const fn tg1_wdt_int_map(&self) -> &TG1_WDT_INT_MAP {
258        &self.tg1_wdt_int_map
259    }
260    #[doc = "0x90 - cache ia intr map register"]
261    #[inline(always)]
262    pub const fn cache_ia_int_map(&self) -> &CACHE_IA_INT_MAP {
263        &self.cache_ia_int_map
264    }
265    #[doc = "0x94 - systimer intr map register"]
266    #[inline(always)]
267    pub const fn systimer_target0_int_map(&self) -> &SYSTIMER_TARGET0_INT_MAP {
268        &self.systimer_target0_int_map
269    }
270    #[doc = "0x98 - systimer target1 intr map register"]
271    #[inline(always)]
272    pub const fn systimer_target1_int_map(&self) -> &SYSTIMER_TARGET1_INT_MAP {
273        &self.systimer_target1_int_map
274    }
275    #[doc = "0x9c - systimer target2 intr map register"]
276    #[inline(always)]
277    pub const fn systimer_target2_int_map(&self) -> &SYSTIMER_TARGET2_INT_MAP {
278        &self.systimer_target2_int_map
279    }
280    #[doc = "0xa0 - spi mem reject intr map register"]
281    #[inline(always)]
282    pub const fn spi_mem_reject_intr_map(&self) -> &SPI_MEM_REJECT_INTR_MAP {
283        &self.spi_mem_reject_intr_map
284    }
285    #[doc = "0xa4 - icache perload intr map register"]
286    #[inline(always)]
287    pub const fn icache_preload_int_map(&self) -> &ICACHE_PRELOAD_INT_MAP {
288        &self.icache_preload_int_map
289    }
290    #[doc = "0xa8 - icache sync intr map register"]
291    #[inline(always)]
292    pub const fn icache_sync_int_map(&self) -> &ICACHE_SYNC_INT_MAP {
293        &self.icache_sync_int_map
294    }
295    #[doc = "0xac - adc intr map register"]
296    #[inline(always)]
297    pub const fn apb_adc_int_map(&self) -> &APB_ADC_INT_MAP {
298        &self.apb_adc_int_map
299    }
300    #[doc = "0xb0 - dma ch0 intr map register"]
301    #[inline(always)]
302    pub const fn dma_ch0_int_map(&self) -> &DMA_CH0_INT_MAP {
303        &self.dma_ch0_int_map
304    }
305    #[doc = "0xb4 - dma ch1 intr map register"]
306    #[inline(always)]
307    pub const fn dma_ch1_int_map(&self) -> &DMA_CH1_INT_MAP {
308        &self.dma_ch1_int_map
309    }
310    #[doc = "0xb8 - dma ch2 intr map register"]
311    #[inline(always)]
312    pub const fn dma_ch2_int_map(&self) -> &DMA_CH2_INT_MAP {
313        &self.dma_ch2_int_map
314    }
315    #[doc = "0xbc - rsa intr map register"]
316    #[inline(always)]
317    pub const fn rsa_int_map(&self) -> &RSA_INT_MAP {
318        &self.rsa_int_map
319    }
320    #[doc = "0xc0 - aes intr map register"]
321    #[inline(always)]
322    pub const fn aes_int_map(&self) -> &AES_INT_MAP {
323        &self.aes_int_map
324    }
325    #[doc = "0xc4 - sha intr map register"]
326    #[inline(always)]
327    pub const fn sha_int_map(&self) -> &SHA_INT_MAP {
328        &self.sha_int_map
329    }
330    #[doc = "0xc8 - cpu from cpu 0 intr map register"]
331    #[inline(always)]
332    pub const fn cpu_intr_from_cpu_0_map(&self) -> &CPU_INTR_FROM_CPU_0_MAP {
333        &self.cpu_intr_from_cpu_0_map
334    }
335    #[doc = "0xcc - cpu from cpu 0 intr map register"]
336    #[inline(always)]
337    pub const fn cpu_intr_from_cpu_1_map(&self) -> &CPU_INTR_FROM_CPU_1_MAP {
338        &self.cpu_intr_from_cpu_1_map
339    }
340    #[doc = "0xd0 - cpu from cpu 1 intr map register"]
341    #[inline(always)]
342    pub const fn cpu_intr_from_cpu_2_map(&self) -> &CPU_INTR_FROM_CPU_2_MAP {
343        &self.cpu_intr_from_cpu_2_map
344    }
345    #[doc = "0xd4 - cpu from cpu 3 intr map register"]
346    #[inline(always)]
347    pub const fn cpu_intr_from_cpu_3_map(&self) -> &CPU_INTR_FROM_CPU_3_MAP {
348        &self.cpu_intr_from_cpu_3_map
349    }
350    #[doc = "0xd8 - assist debug intr map register"]
351    #[inline(always)]
352    pub const fn assist_debug_intr_map(&self) -> &ASSIST_DEBUG_INTR_MAP {
353        &self.assist_debug_intr_map
354    }
355    #[doc = "0xdc - dma pms violatile intr map register"]
356    #[inline(always)]
357    pub const fn dma_apbperi_pms_monitor_violate_intr_map(
358        &self,
359    ) -> &DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP {
360        &self.dma_apbperi_pms_monitor_violate_intr_map
361    }
362    #[doc = "0xe0 - iram0 pms violatile intr map register"]
363    #[inline(always)]
364    pub const fn core_0_iram0_pms_monitor_violate_intr_map(
365        &self,
366    ) -> &CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP {
367        &self.core_0_iram0_pms_monitor_violate_intr_map
368    }
369    #[doc = "0xe4 - mac intr map register"]
370    #[inline(always)]
371    pub const fn core_0_dram0_pms_monitor_violate_intr_map(
372        &self,
373    ) -> &CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP {
374        &self.core_0_dram0_pms_monitor_violate_intr_map
375    }
376    #[doc = "0xe8 - mac intr map register"]
377    #[inline(always)]
378    pub const fn core_0_pif_pms_monitor_violate_intr_map(
379        &self,
380    ) -> &CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP {
381        &self.core_0_pif_pms_monitor_violate_intr_map
382    }
383    #[doc = "0xec - mac intr map register"]
384    #[inline(always)]
385    pub const fn core_0_pif_pms_monitor_violate_size_intr_map(
386        &self,
387    ) -> &CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP {
388        &self.core_0_pif_pms_monitor_violate_size_intr_map
389    }
390    #[doc = "0xf0 - mac intr map register"]
391    #[inline(always)]
392    pub const fn backup_pms_violate_intr_map(&self) -> &BACKUP_PMS_VIOLATE_INTR_MAP {
393        &self.backup_pms_violate_intr_map
394    }
395    #[doc = "0xf4 - mac intr map register"]
396    #[inline(always)]
397    pub const fn cache_core0_acs_int_map(&self) -> &CACHE_CORE0_ACS_INT_MAP {
398        &self.cache_core0_acs_int_map
399    }
400    #[doc = "0xf8 - mac intr map register"]
401    #[inline(always)]
402    pub const fn intr_status_reg_0(&self) -> &INTR_STATUS_REG_0 {
403        &self.intr_status_reg_0
404    }
405    #[doc = "0xfc - mac intr map register"]
406    #[inline(always)]
407    pub const fn intr_status_reg_1(&self) -> &INTR_STATUS_REG_1 {
408        &self.intr_status_reg_1
409    }
410    #[doc = "0x100 - mac intr map register"]
411    #[inline(always)]
412    pub const fn clock_gate(&self) -> &CLOCK_GATE {
413        &self.clock_gate
414    }
415    #[doc = "0x104 - mac intr map register"]
416    #[inline(always)]
417    pub const fn cpu_int_enable(&self) -> &CPU_INT_ENABLE {
418        &self.cpu_int_enable
419    }
420    #[doc = "0x108 - mac intr map register"]
421    #[inline(always)]
422    pub const fn cpu_int_type(&self) -> &CPU_INT_TYPE {
423        &self.cpu_int_type
424    }
425    #[doc = "0x10c - mac intr map register"]
426    #[inline(always)]
427    pub const fn cpu_int_clear(&self) -> &CPU_INT_CLEAR {
428        &self.cpu_int_clear
429    }
430    #[doc = "0x110 - mac intr map register"]
431    #[inline(always)]
432    pub const fn cpu_int_eip_status(&self) -> &CPU_INT_EIP_STATUS {
433        &self.cpu_int_eip_status
434    }
435    #[doc = "0x114..0x194 - mac intr map register"]
436    #[inline(always)]
437    pub const fn cpu_int_pri(&self, n: usize) -> &CPU_INT_PRI {
438        &self.cpu_int_pri[n]
439    }
440    #[doc = "Iterator for array of:"]
441    #[doc = "0x114..0x194 - mac intr map register"]
442    #[inline(always)]
443    pub fn cpu_int_pri_iter(&self) -> impl Iterator<Item = &CPU_INT_PRI> {
444        self.cpu_int_pri.iter()
445    }
446    #[doc = "0x194 - mac intr map register"]
447    #[inline(always)]
448    pub const fn cpu_int_thresh(&self) -> &CPU_INT_THRESH {
449        &self.cpu_int_thresh
450    }
451    #[doc = "0x7fc - mac intr map register"]
452    #[inline(always)]
453    pub const fn interrupt_reg_date(&self) -> &INTERRUPT_REG_DATE {
454        &self.interrupt_reg_date
455    }
456}
457#[doc = "MAC_INTR_MAP (rw) register accessor: mac intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_intr_map`] module"]
458pub type MAC_INTR_MAP = crate::Reg<mac_intr_map::MAC_INTR_MAP_SPEC>;
459#[doc = "mac intr map register"]
460pub mod mac_intr_map;
461#[doc = "MAC_NMI_MAP (rw) register accessor: mac nmi_intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_nmi_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_nmi_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_nmi_map`] module"]
462pub type MAC_NMI_MAP = crate::Reg<mac_nmi_map::MAC_NMI_MAP_SPEC>;
463#[doc = "mac nmi_intr map register"]
464pub mod mac_nmi_map;
465#[doc = "PWR_INTR_MAP (rw) register accessor: pwr intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`pwr_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwr_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwr_intr_map`] module"]
466pub type PWR_INTR_MAP = crate::Reg<pwr_intr_map::PWR_INTR_MAP_SPEC>;
467#[doc = "pwr intr map register"]
468pub mod pwr_intr_map;
469#[doc = "BB_INT_MAP (rw) register accessor: bb intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`bb_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bb_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bb_int_map`] module"]
470pub type BB_INT_MAP = crate::Reg<bb_int_map::BB_INT_MAP_SPEC>;
471#[doc = "bb intr map register"]
472pub mod bb_int_map;
473#[doc = "BT_MAC_INT_MAP (rw) register accessor: bt intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`bt_mac_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bt_mac_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bt_mac_int_map`] module"]
474pub type BT_MAC_INT_MAP = crate::Reg<bt_mac_int_map::BT_MAC_INT_MAP_SPEC>;
475#[doc = "bt intr map register"]
476pub mod bt_mac_int_map;
477#[doc = "BT_BB_INT_MAP (rw) register accessor: bb_bt intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`bt_bb_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bt_bb_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bt_bb_int_map`] module"]
478pub type BT_BB_INT_MAP = crate::Reg<bt_bb_int_map::BT_BB_INT_MAP_SPEC>;
479#[doc = "bb_bt intr map register"]
480pub mod bt_bb_int_map;
481#[doc = "BT_BB_NMI_MAP (rw) register accessor: bb_bt_nmi intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`bt_bb_nmi_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bt_bb_nmi_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bt_bb_nmi_map`] module"]
482pub type BT_BB_NMI_MAP = crate::Reg<bt_bb_nmi_map::BT_BB_NMI_MAP_SPEC>;
483#[doc = "bb_bt_nmi intr map register"]
484pub mod bt_bb_nmi_map;
485#[doc = "RWBT_IRQ_MAP (rw) register accessor: rwbt intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`rwbt_irq_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rwbt_irq_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rwbt_irq_map`] module"]
486pub type RWBT_IRQ_MAP = crate::Reg<rwbt_irq_map::RWBT_IRQ_MAP_SPEC>;
487#[doc = "rwbt intr map register"]
488pub mod rwbt_irq_map;
489#[doc = "RWBLE_IRQ_MAP (rw) register accessor: rwble intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`rwble_irq_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rwble_irq_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rwble_irq_map`] module"]
490pub type RWBLE_IRQ_MAP = crate::Reg<rwble_irq_map::RWBLE_IRQ_MAP_SPEC>;
491#[doc = "rwble intr map register"]
492pub mod rwble_irq_map;
493#[doc = "RWBT_NMI_MAP (rw) register accessor: rwbt_nmi intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`rwbt_nmi_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rwbt_nmi_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rwbt_nmi_map`] module"]
494pub type RWBT_NMI_MAP = crate::Reg<rwbt_nmi_map::RWBT_NMI_MAP_SPEC>;
495#[doc = "rwbt_nmi intr map register"]
496pub mod rwbt_nmi_map;
497#[doc = "RWBLE_NMI_MAP (rw) register accessor: rwble_nmi intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`rwble_nmi_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rwble_nmi_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rwble_nmi_map`] module"]
498pub type RWBLE_NMI_MAP = crate::Reg<rwble_nmi_map::RWBLE_NMI_MAP_SPEC>;
499#[doc = "rwble_nmi intr map register"]
500pub mod rwble_nmi_map;
501#[doc = "I2C_MST_INT_MAP (rw) register accessor: i2c intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c_mst_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c_mst_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2c_mst_int_map`] module"]
502pub type I2C_MST_INT_MAP = crate::Reg<i2c_mst_int_map::I2C_MST_INT_MAP_SPEC>;
503#[doc = "i2c intr map register"]
504pub mod i2c_mst_int_map;
505#[doc = "SLC0_INTR_MAP (rw) register accessor: slc0 intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`slc0_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`slc0_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@slc0_intr_map`] module"]
506pub type SLC0_INTR_MAP = crate::Reg<slc0_intr_map::SLC0_INTR_MAP_SPEC>;
507#[doc = "slc0 intr map register"]
508pub mod slc0_intr_map;
509#[doc = "SLC1_INTR_MAP (rw) register accessor: slc1 intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`slc1_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`slc1_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@slc1_intr_map`] module"]
510pub type SLC1_INTR_MAP = crate::Reg<slc1_intr_map::SLC1_INTR_MAP_SPEC>;
511#[doc = "slc1 intr map register"]
512pub mod slc1_intr_map;
513#[doc = "APB_CTRL_INTR_MAP (rw) register accessor: apb_ctrl intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`apb_ctrl_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`apb_ctrl_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@apb_ctrl_intr_map`] module"]
514pub type APB_CTRL_INTR_MAP = crate::Reg<apb_ctrl_intr_map::APB_CTRL_INTR_MAP_SPEC>;
515#[doc = "apb_ctrl intr map register"]
516pub mod apb_ctrl_intr_map;
517#[doc = "UHCI0_INTR_MAP (rw) register accessor: uchi0 intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`uhci0_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`uhci0_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@uhci0_intr_map`] module"]
518pub type UHCI0_INTR_MAP = crate::Reg<uhci0_intr_map::UHCI0_INTR_MAP_SPEC>;
519#[doc = "uchi0 intr map register"]
520pub mod uhci0_intr_map;
521#[doc = "GPIO_INTERRUPT_PRO_MAP (rw) register accessor: gpio intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`gpio_interrupt_pro_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gpio_interrupt_pro_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio_interrupt_pro_map`] module"]
522pub type GPIO_INTERRUPT_PRO_MAP = crate::Reg<gpio_interrupt_pro_map::GPIO_INTERRUPT_PRO_MAP_SPEC>;
523#[doc = "gpio intr map register"]
524pub mod gpio_interrupt_pro_map;
525#[doc = "GPIO_INTERRUPT_PRO_NMI_MAP (rw) register accessor: gpio_pro intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`gpio_interrupt_pro_nmi_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gpio_interrupt_pro_nmi_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio_interrupt_pro_nmi_map`] module"]
526pub type GPIO_INTERRUPT_PRO_NMI_MAP =
527    crate::Reg<gpio_interrupt_pro_nmi_map::GPIO_INTERRUPT_PRO_NMI_MAP_SPEC>;
528#[doc = "gpio_pro intr map register"]
529pub mod gpio_interrupt_pro_nmi_map;
530#[doc = "SPI_INTR_1_MAP (rw) register accessor: gpio_pro_nmi intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`spi_intr_1_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spi_intr_1_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_intr_1_map`] module"]
531pub type SPI_INTR_1_MAP = crate::Reg<spi_intr_1_map::SPI_INTR_1_MAP_SPEC>;
532#[doc = "gpio_pro_nmi intr map register"]
533pub mod spi_intr_1_map;
534#[doc = "SPI_INTR_2_MAP (rw) register accessor: spi1 intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`spi_intr_2_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spi_intr_2_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_intr_2_map`] module"]
535pub type SPI_INTR_2_MAP = crate::Reg<spi_intr_2_map::SPI_INTR_2_MAP_SPEC>;
536#[doc = "spi1 intr map register"]
537pub mod spi_intr_2_map;
538#[doc = "I2S1_INT_MAP (rw) register accessor: spi2 intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`i2s1_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2s1_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2s1_int_map`] module"]
539pub type I2S1_INT_MAP = crate::Reg<i2s1_int_map::I2S1_INT_MAP_SPEC>;
540#[doc = "spi2 intr map register"]
541pub mod i2s1_int_map;
542#[doc = "UART_INTR_MAP (rw) register accessor: i2s1 intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`uart_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`uart_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@uart_intr_map`] module"]
543pub type UART_INTR_MAP = crate::Reg<uart_intr_map::UART_INTR_MAP_SPEC>;
544#[doc = "i2s1 intr map register"]
545pub mod uart_intr_map;
546#[doc = "UART1_INTR_MAP (rw) register accessor: uart1 intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`uart1_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`uart1_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@uart1_intr_map`] module"]
547pub type UART1_INTR_MAP = crate::Reg<uart1_intr_map::UART1_INTR_MAP_SPEC>;
548#[doc = "uart1 intr map register"]
549pub mod uart1_intr_map;
550#[doc = "LEDC_INT_MAP (rw) register accessor: ledc intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`ledc_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ledc_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ledc_int_map`] module"]
551pub type LEDC_INT_MAP = crate::Reg<ledc_int_map::LEDC_INT_MAP_SPEC>;
552#[doc = "ledc intr map register"]
553pub mod ledc_int_map;
554#[doc = "EFUSE_INT_MAP (rw) register accessor: efuse intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`efuse_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`efuse_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@efuse_int_map`] module"]
555pub type EFUSE_INT_MAP = crate::Reg<efuse_int_map::EFUSE_INT_MAP_SPEC>;
556#[doc = "efuse intr map register"]
557pub mod efuse_int_map;
558#[doc = "CAN_INT_MAP (rw) register accessor: can intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`can_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`can_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@can_int_map`] module"]
559pub type CAN_INT_MAP = crate::Reg<can_int_map::CAN_INT_MAP_SPEC>;
560#[doc = "can intr map register"]
561pub mod can_int_map;
562#[doc = "USB_INTR_MAP (rw) register accessor: usb intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`usb_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usb_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usb_intr_map`] module"]
563pub type USB_INTR_MAP = crate::Reg<usb_intr_map::USB_INTR_MAP_SPEC>;
564#[doc = "usb intr map register"]
565pub mod usb_intr_map;
566#[doc = "RTC_CORE_INTR_MAP (rw) register accessor: rtc intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`rtc_core_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rtc_core_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rtc_core_intr_map`] module"]
567pub type RTC_CORE_INTR_MAP = crate::Reg<rtc_core_intr_map::RTC_CORE_INTR_MAP_SPEC>;
568#[doc = "rtc intr map register"]
569pub mod rtc_core_intr_map;
570#[doc = "RMT_INTR_MAP (rw) register accessor: rmt intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`rmt_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rmt_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rmt_intr_map`] module"]
571pub type RMT_INTR_MAP = crate::Reg<rmt_intr_map::RMT_INTR_MAP_SPEC>;
572#[doc = "rmt intr map register"]
573pub mod rmt_intr_map;
574#[doc = "I2C_EXT0_INTR_MAP (rw) register accessor: i2c intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c_ext0_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c_ext0_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2c_ext0_intr_map`] module"]
575pub type I2C_EXT0_INTR_MAP = crate::Reg<i2c_ext0_intr_map::I2C_EXT0_INTR_MAP_SPEC>;
576#[doc = "i2c intr map register"]
577pub mod i2c_ext0_intr_map;
578#[doc = "TIMER_INT1_MAP (rw) register accessor: timer1 intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`timer_int1_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer_int1_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer_int1_map`] module"]
579pub type TIMER_INT1_MAP = crate::Reg<timer_int1_map::TIMER_INT1_MAP_SPEC>;
580#[doc = "timer1 intr map register"]
581pub mod timer_int1_map;
582#[doc = "TIMER_INT2_MAP (rw) register accessor: timer2 intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`timer_int2_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer_int2_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer_int2_map`] module"]
583pub type TIMER_INT2_MAP = crate::Reg<timer_int2_map::TIMER_INT2_MAP_SPEC>;
584#[doc = "timer2 intr map register"]
585pub mod timer_int2_map;
586#[doc = "TG_T0_INT_MAP (rw) register accessor: tg to intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`tg_t0_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tg_t0_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tg_t0_int_map`] module"]
587pub type TG_T0_INT_MAP = crate::Reg<tg_t0_int_map::TG_T0_INT_MAP_SPEC>;
588#[doc = "tg to intr map register"]
589pub mod tg_t0_int_map;
590#[doc = "TG_WDT_INT_MAP (rw) register accessor: tg wdt intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`tg_wdt_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tg_wdt_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tg_wdt_int_map`] module"]
591pub type TG_WDT_INT_MAP = crate::Reg<tg_wdt_int_map::TG_WDT_INT_MAP_SPEC>;
592#[doc = "tg wdt intr map register"]
593pub mod tg_wdt_int_map;
594#[doc = "TG1_T0_INT_MAP (rw) register accessor: tg1 to intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`tg1_t0_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tg1_t0_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tg1_t0_int_map`] module"]
595pub type TG1_T0_INT_MAP = crate::Reg<tg1_t0_int_map::TG1_T0_INT_MAP_SPEC>;
596#[doc = "tg1 to intr map register"]
597pub mod tg1_t0_int_map;
598#[doc = "TG1_WDT_INT_MAP (rw) register accessor: tg1 wdt intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`tg1_wdt_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tg1_wdt_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tg1_wdt_int_map`] module"]
599pub type TG1_WDT_INT_MAP = crate::Reg<tg1_wdt_int_map::TG1_WDT_INT_MAP_SPEC>;
600#[doc = "tg1 wdt intr map register"]
601pub mod tg1_wdt_int_map;
602#[doc = "CACHE_IA_INT_MAP (rw) register accessor: cache ia intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_ia_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_ia_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_ia_int_map`] module"]
603pub type CACHE_IA_INT_MAP = crate::Reg<cache_ia_int_map::CACHE_IA_INT_MAP_SPEC>;
604#[doc = "cache ia intr map register"]
605pub mod cache_ia_int_map;
606#[doc = "SYSTIMER_TARGET0_INT_MAP (rw) register accessor: systimer intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`systimer_target0_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`systimer_target0_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systimer_target0_int_map`] module"]
607pub type SYSTIMER_TARGET0_INT_MAP =
608    crate::Reg<systimer_target0_int_map::SYSTIMER_TARGET0_INT_MAP_SPEC>;
609#[doc = "systimer intr map register"]
610pub mod systimer_target0_int_map;
611#[doc = "SYSTIMER_TARGET1_INT_MAP (rw) register accessor: systimer target1 intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`systimer_target1_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`systimer_target1_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systimer_target1_int_map`] module"]
612pub type SYSTIMER_TARGET1_INT_MAP =
613    crate::Reg<systimer_target1_int_map::SYSTIMER_TARGET1_INT_MAP_SPEC>;
614#[doc = "systimer target1 intr map register"]
615pub mod systimer_target1_int_map;
616#[doc = "SYSTIMER_TARGET2_INT_MAP (rw) register accessor: systimer target2 intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`systimer_target2_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`systimer_target2_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systimer_target2_int_map`] module"]
617pub type SYSTIMER_TARGET2_INT_MAP =
618    crate::Reg<systimer_target2_int_map::SYSTIMER_TARGET2_INT_MAP_SPEC>;
619#[doc = "systimer target2 intr map register"]
620pub mod systimer_target2_int_map;
621#[doc = "SPI_MEM_REJECT_INTR_MAP (rw) register accessor: spi mem reject intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`spi_mem_reject_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spi_mem_reject_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_mem_reject_intr_map`] module"]
622pub type SPI_MEM_REJECT_INTR_MAP =
623    crate::Reg<spi_mem_reject_intr_map::SPI_MEM_REJECT_INTR_MAP_SPEC>;
624#[doc = "spi mem reject intr map register"]
625pub mod spi_mem_reject_intr_map;
626#[doc = "ICACHE_PRELOAD_INT_MAP (rw) register accessor: icache perload intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_preload_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_preload_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_preload_int_map`] module"]
627pub type ICACHE_PRELOAD_INT_MAP = crate::Reg<icache_preload_int_map::ICACHE_PRELOAD_INT_MAP_SPEC>;
628#[doc = "icache perload intr map register"]
629pub mod icache_preload_int_map;
630#[doc = "ICACHE_SYNC_INT_MAP (rw) register accessor: icache sync intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_sync_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_sync_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_sync_int_map`] module"]
631pub type ICACHE_SYNC_INT_MAP = crate::Reg<icache_sync_int_map::ICACHE_SYNC_INT_MAP_SPEC>;
632#[doc = "icache sync intr map register"]
633pub mod icache_sync_int_map;
634#[doc = "APB_ADC_INT_MAP (rw) register accessor: adc intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`apb_adc_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`apb_adc_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@apb_adc_int_map`] module"]
635pub type APB_ADC_INT_MAP = crate::Reg<apb_adc_int_map::APB_ADC_INT_MAP_SPEC>;
636#[doc = "adc intr map register"]
637pub mod apb_adc_int_map;
638#[doc = "DMA_CH0_INT_MAP (rw) register accessor: dma ch0 intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_ch0_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_ch0_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_ch0_int_map`] module"]
639pub type DMA_CH0_INT_MAP = crate::Reg<dma_ch0_int_map::DMA_CH0_INT_MAP_SPEC>;
640#[doc = "dma ch0 intr map register"]
641pub mod dma_ch0_int_map;
642#[doc = "DMA_CH1_INT_MAP (rw) register accessor: dma ch1 intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_ch1_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_ch1_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_ch1_int_map`] module"]
643pub type DMA_CH1_INT_MAP = crate::Reg<dma_ch1_int_map::DMA_CH1_INT_MAP_SPEC>;
644#[doc = "dma ch1 intr map register"]
645pub mod dma_ch1_int_map;
646#[doc = "DMA_CH2_INT_MAP (rw) register accessor: dma ch2 intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_ch2_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_ch2_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_ch2_int_map`] module"]
647pub type DMA_CH2_INT_MAP = crate::Reg<dma_ch2_int_map::DMA_CH2_INT_MAP_SPEC>;
648#[doc = "dma ch2 intr map register"]
649pub mod dma_ch2_int_map;
650#[doc = "RSA_INT_MAP (rw) register accessor: rsa intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`rsa_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rsa_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rsa_int_map`] module"]
651pub type RSA_INT_MAP = crate::Reg<rsa_int_map::RSA_INT_MAP_SPEC>;
652#[doc = "rsa intr map register"]
653pub mod rsa_int_map;
654#[doc = "AES_INT_MAP (rw) register accessor: aes intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`aes_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`aes_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@aes_int_map`] module"]
655pub type AES_INT_MAP = crate::Reg<aes_int_map::AES_INT_MAP_SPEC>;
656#[doc = "aes intr map register"]
657pub mod aes_int_map;
658#[doc = "SHA_INT_MAP (rw) register accessor: sha intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`sha_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sha_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sha_int_map`] module"]
659pub type SHA_INT_MAP = crate::Reg<sha_int_map::SHA_INT_MAP_SPEC>;
660#[doc = "sha intr map register"]
661pub mod sha_int_map;
662#[doc = "CPU_INTR_FROM_CPU_0_MAP (rw) register accessor: cpu from cpu 0 intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_intr_from_cpu_0_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpu_intr_from_cpu_0_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_intr_from_cpu_0_map`] module"]
663pub type CPU_INTR_FROM_CPU_0_MAP =
664    crate::Reg<cpu_intr_from_cpu_0_map::CPU_INTR_FROM_CPU_0_MAP_SPEC>;
665#[doc = "cpu from cpu 0 intr map register"]
666pub mod cpu_intr_from_cpu_0_map;
667#[doc = "CPU_INTR_FROM_CPU_1_MAP (rw) register accessor: cpu from cpu 0 intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_intr_from_cpu_1_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpu_intr_from_cpu_1_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_intr_from_cpu_1_map`] module"]
668pub type CPU_INTR_FROM_CPU_1_MAP =
669    crate::Reg<cpu_intr_from_cpu_1_map::CPU_INTR_FROM_CPU_1_MAP_SPEC>;
670#[doc = "cpu from cpu 0 intr map register"]
671pub mod cpu_intr_from_cpu_1_map;
672#[doc = "CPU_INTR_FROM_CPU_2_MAP (rw) register accessor: cpu from cpu 1 intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_intr_from_cpu_2_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpu_intr_from_cpu_2_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_intr_from_cpu_2_map`] module"]
673pub type CPU_INTR_FROM_CPU_2_MAP =
674    crate::Reg<cpu_intr_from_cpu_2_map::CPU_INTR_FROM_CPU_2_MAP_SPEC>;
675#[doc = "cpu from cpu 1 intr map register"]
676pub mod cpu_intr_from_cpu_2_map;
677#[doc = "CPU_INTR_FROM_CPU_3_MAP (rw) register accessor: cpu from cpu 3 intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_intr_from_cpu_3_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpu_intr_from_cpu_3_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_intr_from_cpu_3_map`] module"]
678pub type CPU_INTR_FROM_CPU_3_MAP =
679    crate::Reg<cpu_intr_from_cpu_3_map::CPU_INTR_FROM_CPU_3_MAP_SPEC>;
680#[doc = "cpu from cpu 3 intr map register"]
681pub mod cpu_intr_from_cpu_3_map;
682#[doc = "ASSIST_DEBUG_INTR_MAP (rw) register accessor: assist debug intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`assist_debug_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`assist_debug_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@assist_debug_intr_map`] module"]
683pub type ASSIST_DEBUG_INTR_MAP = crate::Reg<assist_debug_intr_map::ASSIST_DEBUG_INTR_MAP_SPEC>;
684#[doc = "assist debug intr map register"]
685pub mod assist_debug_intr_map;
686#[doc = "DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP (rw) register accessor: dma pms violatile intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_apbperi_pms_monitor_violate_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_apbperi_pms_monitor_violate_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_apbperi_pms_monitor_violate_intr_map`] module"]
687pub type DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP = crate::Reg<
688    dma_apbperi_pms_monitor_violate_intr_map::DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP_SPEC,
689>;
690#[doc = "dma pms violatile intr map register"]
691pub mod dma_apbperi_pms_monitor_violate_intr_map;
692#[doc = "CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP (rw) register accessor: iram0 pms violatile intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_iram0_pms_monitor_violate_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_iram0_pms_monitor_violate_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_iram0_pms_monitor_violate_intr_map`] module"]
693pub type CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP = crate::Reg<
694    core_0_iram0_pms_monitor_violate_intr_map::CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_SPEC,
695>;
696#[doc = "iram0 pms violatile intr map register"]
697pub mod core_0_iram0_pms_monitor_violate_intr_map;
698#[doc = "CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP (rw) register accessor: mac intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_dram0_pms_monitor_violate_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_dram0_pms_monitor_violate_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_dram0_pms_monitor_violate_intr_map`] module"]
699pub type CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP = crate::Reg<
700    core_0_dram0_pms_monitor_violate_intr_map::CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_SPEC,
701>;
702#[doc = "mac intr map register"]
703pub mod core_0_dram0_pms_monitor_violate_intr_map;
704#[doc = "CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP (rw) register accessor: mac intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_pif_pms_monitor_violate_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_pif_pms_monitor_violate_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_pif_pms_monitor_violate_intr_map`] module"]
705pub type CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP = crate::Reg<
706    core_0_pif_pms_monitor_violate_intr_map::CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_SPEC,
707>;
708#[doc = "mac intr map register"]
709pub mod core_0_pif_pms_monitor_violate_intr_map;
710#[doc = "CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP (rw) register accessor: mac intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_pif_pms_monitor_violate_size_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_pif_pms_monitor_violate_size_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_pif_pms_monitor_violate_size_intr_map`] module"]
711pub type CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP = crate::Reg<
712    core_0_pif_pms_monitor_violate_size_intr_map::CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_SPEC,
713>;
714#[doc = "mac intr map register"]
715pub mod core_0_pif_pms_monitor_violate_size_intr_map;
716#[doc = "BACKUP_PMS_VIOLATE_INTR_MAP (rw) register accessor: mac intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`backup_pms_violate_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`backup_pms_violate_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@backup_pms_violate_intr_map`] module"]
717pub type BACKUP_PMS_VIOLATE_INTR_MAP =
718    crate::Reg<backup_pms_violate_intr_map::BACKUP_PMS_VIOLATE_INTR_MAP_SPEC>;
719#[doc = "mac intr map register"]
720pub mod backup_pms_violate_intr_map;
721#[doc = "CACHE_CORE0_ACS_INT_MAP (rw) register accessor: mac intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_core0_acs_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_core0_acs_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_core0_acs_int_map`] module"]
722pub type CACHE_CORE0_ACS_INT_MAP =
723    crate::Reg<cache_core0_acs_int_map::CACHE_CORE0_ACS_INT_MAP_SPEC>;
724#[doc = "mac intr map register"]
725pub mod cache_core0_acs_int_map;
726#[doc = "INTR_STATUS_REG_0 (r) register accessor: mac intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`intr_status_reg_0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@intr_status_reg_0`] module"]
727pub type INTR_STATUS_REG_0 = crate::Reg<intr_status_reg_0::INTR_STATUS_REG_0_SPEC>;
728#[doc = "mac intr map register"]
729pub mod intr_status_reg_0;
730#[doc = "INTR_STATUS_REG_1 (r) register accessor: mac intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`intr_status_reg_1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@intr_status_reg_1`] module"]
731pub type INTR_STATUS_REG_1 = crate::Reg<intr_status_reg_1::INTR_STATUS_REG_1_SPEC>;
732#[doc = "mac intr map register"]
733pub mod intr_status_reg_1;
734#[doc = "CLOCK_GATE (rw) register accessor: mac intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`clock_gate::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clock_gate::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clock_gate`] module"]
735pub type CLOCK_GATE = crate::Reg<clock_gate::CLOCK_GATE_SPEC>;
736#[doc = "mac intr map register"]
737pub mod clock_gate;
738#[doc = "CPU_INT_ENABLE (rw) register accessor: mac intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_int_enable::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpu_int_enable::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_int_enable`] module"]
739pub type CPU_INT_ENABLE = crate::Reg<cpu_int_enable::CPU_INT_ENABLE_SPEC>;
740#[doc = "mac intr map register"]
741pub mod cpu_int_enable;
742#[doc = "CPU_INT_TYPE (rw) register accessor: mac intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_int_type::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpu_int_type::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_int_type`] module"]
743pub type CPU_INT_TYPE = crate::Reg<cpu_int_type::CPU_INT_TYPE_SPEC>;
744#[doc = "mac intr map register"]
745pub mod cpu_int_type;
746#[doc = "CPU_INT_CLEAR (rw) register accessor: mac intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_int_clear::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpu_int_clear::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_int_clear`] module"]
747pub type CPU_INT_CLEAR = crate::Reg<cpu_int_clear::CPU_INT_CLEAR_SPEC>;
748#[doc = "mac intr map register"]
749pub mod cpu_int_clear;
750#[doc = "CPU_INT_EIP_STATUS (r) register accessor: mac intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_int_eip_status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_int_eip_status`] module"]
751pub type CPU_INT_EIP_STATUS = crate::Reg<cpu_int_eip_status::CPU_INT_EIP_STATUS_SPEC>;
752#[doc = "mac intr map register"]
753pub mod cpu_int_eip_status;
754#[doc = "CPU_INT_PRI (rw) register accessor: mac intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_int_pri::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpu_int_pri::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_int_pri`] module"]
755pub type CPU_INT_PRI = crate::Reg<cpu_int_pri::CPU_INT_PRI_SPEC>;
756#[doc = "mac intr map register"]
757pub mod cpu_int_pri;
758#[doc = "CPU_INT_THRESH (rw) register accessor: mac intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_int_thresh::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpu_int_thresh::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_int_thresh`] module"]
759pub type CPU_INT_THRESH = crate::Reg<cpu_int_thresh::CPU_INT_THRESH_SPEC>;
760#[doc = "mac intr map register"]
761pub mod cpu_int_thresh;
762#[doc = "INTERRUPT_REG_DATE (rw) register accessor: mac intr map register\n\nYou can [`read`](crate::Reg::read) this register and get [`interrupt_reg_date::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`interrupt_reg_date::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@interrupt_reg_date`] module"]
763pub type INTERRUPT_REG_DATE = crate::Reg<interrupt_reg_date::INTERRUPT_REG_DATE_SPEC>;
764#[doc = "mac intr map register"]
765pub mod interrupt_reg_date;
esp32c3/interrupt_core0.rs

esp32c3/
interrupt_core0.rs
