1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5 cmd: CMD,
6 addr: ADDR,
7 ctrl: CTRL,
8 clock: CLOCK,
9 user: USER,
10 user1: USER1,
11 user2: USER2,
12 ms_dlen: MS_DLEN,
13 misc: MISC,
14 din_mode: DIN_MODE,
15 din_num: DIN_NUM,
16 dout_mode: DOUT_MODE,
17 dma_conf: DMA_CONF,
18 dma_int_ena: DMA_INT_ENA,
19 dma_int_clr: DMA_INT_CLR,
20 dma_int_raw: DMA_INT_RAW,
21 dma_int_st: DMA_INT_ST,
22 _reserved17: [u8; 0x54],
23 w: [W; 16],
24 _reserved18: [u8; 0x08],
25 slave: SLAVE,
26 slave1: SLAVE1,
27 clk_gate: CLK_GATE,
28 _reserved21: [u8; 0x04],
29 date: DATE,
30}
31impl RegisterBlock {
32 #[doc = "0x00 - Command control register"]
33 #[inline(always)]
34 pub const fn cmd(&self) -> &CMD {
35 &self.cmd
36 }
37 #[doc = "0x04 - Address value register"]
38 #[inline(always)]
39 pub const fn addr(&self) -> &ADDR {
40 &self.addr
41 }
42 #[doc = "0x08 - SPI control register"]
43 #[inline(always)]
44 pub const fn ctrl(&self) -> &CTRL {
45 &self.ctrl
46 }
47 #[doc = "0x0c - SPI clock control register"]
48 #[inline(always)]
49 pub const fn clock(&self) -> &CLOCK {
50 &self.clock
51 }
52 #[doc = "0x10 - SPI USER control register"]
53 #[inline(always)]
54 pub const fn user(&self) -> &USER {
55 &self.user
56 }
57 #[doc = "0x14 - SPI USER control register 1"]
58 #[inline(always)]
59 pub const fn user1(&self) -> &USER1 {
60 &self.user1
61 }
62 #[doc = "0x18 - SPI USER control register 2"]
63 #[inline(always)]
64 pub const fn user2(&self) -> &USER2 {
65 &self.user2
66 }
67 #[doc = "0x1c - SPI data bit length control register"]
68 #[inline(always)]
69 pub const fn ms_dlen(&self) -> &MS_DLEN {
70 &self.ms_dlen
71 }
72 #[doc = "0x20 - SPI misc register"]
73 #[inline(always)]
74 pub const fn misc(&self) -> &MISC {
75 &self.misc
76 }
77 #[doc = "0x24 - SPI input delay mode configuration"]
78 #[inline(always)]
79 pub const fn din_mode(&self) -> &DIN_MODE {
80 &self.din_mode
81 }
82 #[doc = "0x28 - SPI input delay number configuration"]
83 #[inline(always)]
84 pub const fn din_num(&self) -> &DIN_NUM {
85 &self.din_num
86 }
87 #[doc = "0x2c - SPI output delay mode configuration"]
88 #[inline(always)]
89 pub const fn dout_mode(&self) -> &DOUT_MODE {
90 &self.dout_mode
91 }
92 #[doc = "0x30 - SPI DMA control register"]
93 #[inline(always)]
94 pub const fn dma_conf(&self) -> &DMA_CONF {
95 &self.dma_conf
96 }
97 #[doc = "0x34 - SPI DMA interrupt enable register"]
98 #[inline(always)]
99 pub const fn dma_int_ena(&self) -> &DMA_INT_ENA {
100 &self.dma_int_ena
101 }
102 #[doc = "0x38 - SPI DMA interrupt clear register"]
103 #[inline(always)]
104 pub const fn dma_int_clr(&self) -> &DMA_INT_CLR {
105 &self.dma_int_clr
106 }
107 #[doc = "0x3c - SPI DMA interrupt raw register"]
108 #[inline(always)]
109 pub const fn dma_int_raw(&self) -> &DMA_INT_RAW {
110 &self.dma_int_raw
111 }
112 #[doc = "0x40 - SPI DMA interrupt status register"]
113 #[inline(always)]
114 pub const fn dma_int_st(&self) -> &DMA_INT_ST {
115 &self.dma_int_st
116 }
117 #[doc = "0x98..0xd8 - SPI CPU-controlled buffer%s"]
118 #[inline(always)]
119 pub const fn w(&self, n: usize) -> &W {
120 &self.w[n]
121 }
122 #[doc = "Iterator for array of:"]
123 #[doc = "0x98..0xd8 - SPI CPU-controlled buffer%s"]
124 #[inline(always)]
125 pub fn w_iter(&self) -> impl Iterator<Item = &W> {
126 self.w.iter()
127 }
128 #[doc = "0xe0 - SPI slave control register"]
129 #[inline(always)]
130 pub const fn slave(&self) -> &SLAVE {
131 &self.slave
132 }
133 #[doc = "0xe4 - SPI slave control register 1"]
134 #[inline(always)]
135 pub const fn slave1(&self) -> &SLAVE1 {
136 &self.slave1
137 }
138 #[doc = "0xe8 - SPI module clock and register clock control"]
139 #[inline(always)]
140 pub const fn clk_gate(&self) -> &CLK_GATE {
141 &self.clk_gate
142 }
143 #[doc = "0xf0 - Version control"]
144 #[inline(always)]
145 pub const fn date(&self) -> &DATE {
146 &self.date
147 }
148}
149#[doc = "CMD (rw) register accessor: Command control register\n\nYou can [`read`](crate::Reg::read) this register and get [`cmd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] module"]
150pub type CMD = crate::Reg<cmd::CMD_SPEC>;
151#[doc = "Command control register"]
152pub mod cmd;
153#[doc = "ADDR (rw) register accessor: Address value register\n\nYou can [`read`](crate::Reg::read) this register and get [`addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addr`] module"]
154pub type ADDR = crate::Reg<addr::ADDR_SPEC>;
155#[doc = "Address value register"]
156pub mod addr;
157#[doc = "CTRL (rw) register accessor: SPI control register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] module"]
158pub type CTRL = crate::Reg<ctrl::CTRL_SPEC>;
159#[doc = "SPI control register"]
160pub mod ctrl;
161#[doc = "CLOCK (rw) register accessor: SPI clock control register\n\nYou can [`read`](crate::Reg::read) this register and get [`clock::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clock::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clock`] module"]
162pub type CLOCK = crate::Reg<clock::CLOCK_SPEC>;
163#[doc = "SPI clock control register"]
164pub mod clock;
165#[doc = "USER (rw) register accessor: SPI USER control register\n\nYou can [`read`](crate::Reg::read) this register and get [`user::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`user::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@user`] module"]
166pub type USER = crate::Reg<user::USER_SPEC>;
167#[doc = "SPI USER control register"]
168pub mod user;
169#[doc = "USER1 (rw) register accessor: SPI USER control register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`user1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`user1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@user1`] module"]
170pub type USER1 = crate::Reg<user1::USER1_SPEC>;
171#[doc = "SPI USER control register 1"]
172pub mod user1;
173#[doc = "USER2 (rw) register accessor: SPI USER control register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`user2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`user2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@user2`] module"]
174pub type USER2 = crate::Reg<user2::USER2_SPEC>;
175#[doc = "SPI USER control register 2"]
176pub mod user2;
177#[doc = "MS_DLEN (rw) register accessor: SPI data bit length control register\n\nYou can [`read`](crate::Reg::read) this register and get [`ms_dlen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ms_dlen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ms_dlen`] module"]
178pub type MS_DLEN = crate::Reg<ms_dlen::MS_DLEN_SPEC>;
179#[doc = "SPI data bit length control register"]
180pub mod ms_dlen;
181#[doc = "MISC (rw) register accessor: SPI misc register\n\nYou can [`read`](crate::Reg::read) this register and get [`misc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`misc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@misc`] module"]
182pub type MISC = crate::Reg<misc::MISC_SPEC>;
183#[doc = "SPI misc register"]
184pub mod misc;
185#[doc = "DIN_MODE (rw) register accessor: SPI input delay mode configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`din_mode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`din_mode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@din_mode`] module"]
186pub type DIN_MODE = crate::Reg<din_mode::DIN_MODE_SPEC>;
187#[doc = "SPI input delay mode configuration"]
188pub mod din_mode;
189#[doc = "DIN_NUM (rw) register accessor: SPI input delay number configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`din_num::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`din_num::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@din_num`] module"]
190pub type DIN_NUM = crate::Reg<din_num::DIN_NUM_SPEC>;
191#[doc = "SPI input delay number configuration"]
192pub mod din_num;
193#[doc = "DOUT_MODE (rw) register accessor: SPI output delay mode configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`dout_mode::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dout_mode::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dout_mode`] module"]
194pub type DOUT_MODE = crate::Reg<dout_mode::DOUT_MODE_SPEC>;
195#[doc = "SPI output delay mode configuration"]
196pub mod dout_mode;
197#[doc = "DMA_CONF (rw) register accessor: SPI DMA control register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_conf`] module"]
198pub type DMA_CONF = crate::Reg<dma_conf::DMA_CONF_SPEC>;
199#[doc = "SPI DMA control register"]
200pub mod dma_conf;
201#[doc = "DMA_INT_ENA (rw) register accessor: SPI DMA interrupt enable register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_int_ena::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_int_ena::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_int_ena`] module"]
202pub type DMA_INT_ENA = crate::Reg<dma_int_ena::DMA_INT_ENA_SPEC>;
203#[doc = "SPI DMA interrupt enable register"]
204pub mod dma_int_ena;
205#[doc = "DMA_INT_CLR (w) register accessor: SPI DMA interrupt clear register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_int_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_int_clr`] module"]
206pub type DMA_INT_CLR = crate::Reg<dma_int_clr::DMA_INT_CLR_SPEC>;
207#[doc = "SPI DMA interrupt clear register"]
208pub mod dma_int_clr;
209#[doc = "DMA_INT_RAW (rw) register accessor: SPI DMA interrupt raw register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_int_raw::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_int_raw::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_int_raw`] module"]
210pub type DMA_INT_RAW = crate::Reg<dma_int_raw::DMA_INT_RAW_SPEC>;
211#[doc = "SPI DMA interrupt raw register"]
212pub mod dma_int_raw;
213#[doc = "DMA_INT_ST (r) register accessor: SPI DMA interrupt status register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_int_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_int_st`] module"]
214pub type DMA_INT_ST = crate::Reg<dma_int_st::DMA_INT_ST_SPEC>;
215#[doc = "SPI DMA interrupt status register"]
216pub mod dma_int_st;
217#[doc = "W (rw) register accessor: SPI CPU-controlled buffer%s\n\nYou can [`read`](crate::Reg::read) this register and get [`w::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`w::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w`] module"]
218pub type W = crate::Reg<w::W_SPEC>;
219#[doc = "SPI CPU-controlled buffer%s"]
220pub mod w;
221#[doc = "SLAVE (rw) register accessor: SPI slave control register\n\nYou can [`read`](crate::Reg::read) this register and get [`slave::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`slave::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@slave`] module"]
222pub type SLAVE = crate::Reg<slave::SLAVE_SPEC>;
223#[doc = "SPI slave control register"]
224pub mod slave;
225#[doc = "SLAVE1 (rw) register accessor: SPI slave control register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`slave1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`slave1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@slave1`] module"]
226pub type SLAVE1 = crate::Reg<slave1::SLAVE1_SPEC>;
227#[doc = "SPI slave control register 1"]
228pub mod slave1;
229#[doc = "CLK_GATE (rw) register accessor: SPI module clock and register clock control\n\nYou can [`read`](crate::Reg::read) this register and get [`clk_gate::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clk_gate::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clk_gate`] module"]
230pub type CLK_GATE = crate::Reg<clk_gate::CLK_GATE_SPEC>;
231#[doc = "SPI module clock and register clock control"]
232pub mod clk_gate;
233#[doc = "DATE (rw) register accessor: Version control\n\nYou can [`read`](crate::Reg::read) this register and get [`date::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`date::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@date`] module"]
234pub type DATE = crate::Reg<date::DATE_SPEC>;
235#[doc = "Version control"]
236pub mod date;