esp32c3/
assist_debug.rs

1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5    core_0_montr_ena: CORE_0_MONTR_ENA,
6    core_0_intr_raw: CORE_0_INTR_RAW,
7    core_0_intr_ena: CORE_0_INTR_ENA,
8    core_0_intr_clr: CORE_0_INTR_CLR,
9    core_0_area_dram0_0_min: CORE_0_AREA_DRAM0_0_MIN,
10    core_0_area_dram0_0_max: CORE_0_AREA_DRAM0_0_MAX,
11    core_0_area_dram0_1_min: CORE_0_AREA_DRAM0_1_MIN,
12    core_0_area_dram0_1_max: CORE_0_AREA_DRAM0_1_MAX,
13    core_0_area_pif_0_min: CORE_0_AREA_PIF_0_MIN,
14    core_0_area_pif_0_max: CORE_0_AREA_PIF_0_MAX,
15    core_0_area_pif_1_min: CORE_0_AREA_PIF_1_MIN,
16    core_0_area_pif_1_max: CORE_0_AREA_PIF_1_MAX,
17    core_0_area_pc: CORE_0_AREA_PC,
18    core_0_area_sp: CORE_0_AREA_SP,
19    core_0_sp_min: CORE_0_SP_MIN,
20    core_0_sp_max: CORE_0_SP_MAX,
21    core_0_sp_pc: CORE_0_SP_PC,
22    core_0_rcd_en: CORE_0_RCD_EN,
23    core_0_rcd_pdebugpc: CORE_0_RCD_PDEBUGPC,
24    core_0_rcd_pdebugsp: CORE_0_RCD_PDEBUGSP,
25    core_0_iram0_exception_monitor_0: CORE_0_IRAM0_EXCEPTION_MONITOR_0,
26    core_0_iram0_exception_monitor_1: CORE_0_IRAM0_EXCEPTION_MONITOR_1,
27    core_0_dram0_exception_monitor_0: CORE_0_DRAM0_EXCEPTION_MONITOR_0,
28    core_0_dram0_exception_monitor_1: CORE_0_DRAM0_EXCEPTION_MONITOR_1,
29    core_0_dram0_exception_monitor_2: CORE_0_DRAM0_EXCEPTION_MONITOR_2,
30    core_0_dram0_exception_monitor_3: CORE_0_DRAM0_EXCEPTION_MONITOR_3,
31    core_x_iram0_dram0_exception_monitor_0: CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_0,
32    core_x_iram0_dram0_exception_monitor_1: CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_1,
33    log_setting: LOG_SETTING,
34    log_data_0: LOG_DATA_0,
35    log_data_mask: LOG_DATA_MASK,
36    log_min: LOG_MIN,
37    log_max: LOG_MAX,
38    log_mem_start: LOG_MEM_START,
39    log_mem_end: LOG_MEM_END,
40    log_mem_writing_addr: LOG_MEM_WRITING_ADDR,
41    log_mem_full_flag: LOG_MEM_FULL_FLAG,
42    core_0_lastpc_before_exception: CORE_0_LASTPC_BEFORE_EXCEPTION,
43    core_0_debug_mode: CORE_0_DEBUG_MODE,
44    _reserved39: [u8; 0x0160],
45    date: DATE,
46}
47impl RegisterBlock {
48    #[doc = "0x00 - ASSIST_DEBUG_CORE_0_MONTR_ENA_REG"]
49    #[inline(always)]
50    pub const fn core_0_montr_ena(&self) -> &CORE_0_MONTR_ENA {
51        &self.core_0_montr_ena
52    }
53    #[doc = "0x04 - ASSIST_DEBUG_CORE_0_INTR_RAW_REG"]
54    #[inline(always)]
55    pub const fn core_0_intr_raw(&self) -> &CORE_0_INTR_RAW {
56        &self.core_0_intr_raw
57    }
58    #[doc = "0x08 - ASSIST_DEBUG_CORE_0_INTR_ENA_REG"]
59    #[inline(always)]
60    pub const fn core_0_intr_ena(&self) -> &CORE_0_INTR_ENA {
61        &self.core_0_intr_ena
62    }
63    #[doc = "0x0c - ASSIST_DEBUG_CORE_0_INTR_CLR_REG"]
64    #[inline(always)]
65    pub const fn core_0_intr_clr(&self) -> &CORE_0_INTR_CLR {
66        &self.core_0_intr_clr
67    }
68    #[doc = "0x10 - ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_MIN_REG"]
69    #[inline(always)]
70    pub const fn core_0_area_dram0_0_min(&self) -> &CORE_0_AREA_DRAM0_0_MIN {
71        &self.core_0_area_dram0_0_min
72    }
73    #[doc = "0x14 - ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_MAX_REG"]
74    #[inline(always)]
75    pub const fn core_0_area_dram0_0_max(&self) -> &CORE_0_AREA_DRAM0_0_MAX {
76        &self.core_0_area_dram0_0_max
77    }
78    #[doc = "0x18 - ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_MIN_REG"]
79    #[inline(always)]
80    pub const fn core_0_area_dram0_1_min(&self) -> &CORE_0_AREA_DRAM0_1_MIN {
81        &self.core_0_area_dram0_1_min
82    }
83    #[doc = "0x1c - ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_MAX_REG"]
84    #[inline(always)]
85    pub const fn core_0_area_dram0_1_max(&self) -> &CORE_0_AREA_DRAM0_1_MAX {
86        &self.core_0_area_dram0_1_max
87    }
88    #[doc = "0x20 - ASSIST_DEBUG_CORE_0_AREA_PIF_0_MIN_REG"]
89    #[inline(always)]
90    pub const fn core_0_area_pif_0_min(&self) -> &CORE_0_AREA_PIF_0_MIN {
91        &self.core_0_area_pif_0_min
92    }
93    #[doc = "0x24 - ASSIST_DEBUG_CORE_0_AREA_PIF_0_MAX_REG"]
94    #[inline(always)]
95    pub const fn core_0_area_pif_0_max(&self) -> &CORE_0_AREA_PIF_0_MAX {
96        &self.core_0_area_pif_0_max
97    }
98    #[doc = "0x28 - ASSIST_DEBUG_CORE_0_AREA_PIF_1_MIN_REG"]
99    #[inline(always)]
100    pub const fn core_0_area_pif_1_min(&self) -> &CORE_0_AREA_PIF_1_MIN {
101        &self.core_0_area_pif_1_min
102    }
103    #[doc = "0x2c - ASSIST_DEBUG_CORE_0_AREA_PIF_1_MAX_REG"]
104    #[inline(always)]
105    pub const fn core_0_area_pif_1_max(&self) -> &CORE_0_AREA_PIF_1_MAX {
106        &self.core_0_area_pif_1_max
107    }
108    #[doc = "0x30 - ASSIST_DEBUG_CORE_0_AREA_PC_REG"]
109    #[inline(always)]
110    pub const fn core_0_area_pc(&self) -> &CORE_0_AREA_PC {
111        &self.core_0_area_pc
112    }
113    #[doc = "0x34 - ASSIST_DEBUG_CORE_0_AREA_SP_REG"]
114    #[inline(always)]
115    pub const fn core_0_area_sp(&self) -> &CORE_0_AREA_SP {
116        &self.core_0_area_sp
117    }
118    #[doc = "0x38 - ASSIST_DEBUG_CORE_0_SP_MIN_REG"]
119    #[inline(always)]
120    pub const fn core_0_sp_min(&self) -> &CORE_0_SP_MIN {
121        &self.core_0_sp_min
122    }
123    #[doc = "0x3c - ASSIST_DEBUG_CORE_0_SP_MAX_REG"]
124    #[inline(always)]
125    pub const fn core_0_sp_max(&self) -> &CORE_0_SP_MAX {
126        &self.core_0_sp_max
127    }
128    #[doc = "0x40 - ASSIST_DEBUG_CORE_0_SP_PC_REG"]
129    #[inline(always)]
130    pub const fn core_0_sp_pc(&self) -> &CORE_0_SP_PC {
131        &self.core_0_sp_pc
132    }
133    #[doc = "0x44 - ASSIST_DEBUG_CORE_0_RCD_EN_REG"]
134    #[inline(always)]
135    pub const fn core_0_rcd_en(&self) -> &CORE_0_RCD_EN {
136        &self.core_0_rcd_en
137    }
138    #[doc = "0x48 - ASSIST_DEBUG_CORE_0_RCD_PDEBUGPC_REG"]
139    #[inline(always)]
140    pub const fn core_0_rcd_pdebugpc(&self) -> &CORE_0_RCD_PDEBUGPC {
141        &self.core_0_rcd_pdebugpc
142    }
143    #[doc = "0x4c - ASSIST_DEBUG_CORE_0_RCD_PDEBUGSP_REG"]
144    #[inline(always)]
145    pub const fn core_0_rcd_pdebugsp(&self) -> &CORE_0_RCD_PDEBUGSP {
146        &self.core_0_rcd_pdebugsp
147    }
148    #[doc = "0x50 - ASSIST_DEBUG_CORE_0_RCD_PDEBUGSP_REG"]
149    #[inline(always)]
150    pub const fn core_0_iram0_exception_monitor_0(&self) -> &CORE_0_IRAM0_EXCEPTION_MONITOR_0 {
151        &self.core_0_iram0_exception_monitor_0
152    }
153    #[doc = "0x54 - ASSIST_DEBUG_CORE_0_IRAM0_EXCEPTION_MONITOR_1_REG"]
154    #[inline(always)]
155    pub const fn core_0_iram0_exception_monitor_1(&self) -> &CORE_0_IRAM0_EXCEPTION_MONITOR_1 {
156        &self.core_0_iram0_exception_monitor_1
157    }
158    #[doc = "0x58 - ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_0_REG"]
159    #[inline(always)]
160    pub const fn core_0_dram0_exception_monitor_0(&self) -> &CORE_0_DRAM0_EXCEPTION_MONITOR_0 {
161        &self.core_0_dram0_exception_monitor_0
162    }
163    #[doc = "0x5c - ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_1_REG"]
164    #[inline(always)]
165    pub const fn core_0_dram0_exception_monitor_1(&self) -> &CORE_0_DRAM0_EXCEPTION_MONITOR_1 {
166        &self.core_0_dram0_exception_monitor_1
167    }
168    #[doc = "0x60 - ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_1_REG"]
169    #[inline(always)]
170    pub const fn core_0_dram0_exception_monitor_2(&self) -> &CORE_0_DRAM0_EXCEPTION_MONITOR_2 {
171        &self.core_0_dram0_exception_monitor_2
172    }
173    #[doc = "0x64 - ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_3_REG"]
174    #[inline(always)]
175    pub const fn core_0_dram0_exception_monitor_3(&self) -> &CORE_0_DRAM0_EXCEPTION_MONITOR_3 {
176        &self.core_0_dram0_exception_monitor_3
177    }
178    #[doc = "0x68 - ASSIST_DEBUG_CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_0_REG"]
179    #[inline(always)]
180    pub const fn core_x_iram0_dram0_exception_monitor_0(
181        &self,
182    ) -> &CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_0 {
183        &self.core_x_iram0_dram0_exception_monitor_0
184    }
185    #[doc = "0x6c - ASSIST_DEBUG_CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_1_REG"]
186    #[inline(always)]
187    pub const fn core_x_iram0_dram0_exception_monitor_1(
188        &self,
189    ) -> &CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_1 {
190        &self.core_x_iram0_dram0_exception_monitor_1
191    }
192    #[doc = "0x70 - ASSIST_DEBUG_LOG_SETTING"]
193    #[inline(always)]
194    pub const fn log_setting(&self) -> &LOG_SETTING {
195        &self.log_setting
196    }
197    #[doc = "0x74 - ASSIST_DEBUG_LOG_DATA_0_REG"]
198    #[inline(always)]
199    pub const fn log_data_0(&self) -> &LOG_DATA_0 {
200        &self.log_data_0
201    }
202    #[doc = "0x78 - ASSIST_DEBUG_LOG_DATA_MASK_REG"]
203    #[inline(always)]
204    pub const fn log_data_mask(&self) -> &LOG_DATA_MASK {
205        &self.log_data_mask
206    }
207    #[doc = "0x7c - ASSIST_DEBUG_LOG_MIN_REG"]
208    #[inline(always)]
209    pub const fn log_min(&self) -> &LOG_MIN {
210        &self.log_min
211    }
212    #[doc = "0x80 - ASSIST_DEBUG_LOG_MAX_REG"]
213    #[inline(always)]
214    pub const fn log_max(&self) -> &LOG_MAX {
215        &self.log_max
216    }
217    #[doc = "0x84 - ASSIST_DEBUG_LOG_MEM_START_REG"]
218    #[inline(always)]
219    pub const fn log_mem_start(&self) -> &LOG_MEM_START {
220        &self.log_mem_start
221    }
222    #[doc = "0x88 - ASSIST_DEBUG_LOG_MEM_END_REG"]
223    #[inline(always)]
224    pub const fn log_mem_end(&self) -> &LOG_MEM_END {
225        &self.log_mem_end
226    }
227    #[doc = "0x8c - ASSIST_DEBUG_LOG_MEM_WRITING_ADDR_REG"]
228    #[inline(always)]
229    pub const fn log_mem_writing_addr(&self) -> &LOG_MEM_WRITING_ADDR {
230        &self.log_mem_writing_addr
231    }
232    #[doc = "0x90 - ASSIST_DEBUG_LOG_MEM_FULL_FLAG_REG"]
233    #[inline(always)]
234    pub const fn log_mem_full_flag(&self) -> &LOG_MEM_FULL_FLAG {
235        &self.log_mem_full_flag
236    }
237    #[doc = "0x94 - ASSIST_DEBUG_CORE_0_LASTPC_BEFORE_EXCEPTION"]
238    #[inline(always)]
239    pub const fn core_0_lastpc_before_exception(&self) -> &CORE_0_LASTPC_BEFORE_EXCEPTION {
240        &self.core_0_lastpc_before_exception
241    }
242    #[doc = "0x98 - ASSIST_DEBUG_CORE_0_DEBUG_MODE"]
243    #[inline(always)]
244    pub const fn core_0_debug_mode(&self) -> &CORE_0_DEBUG_MODE {
245        &self.core_0_debug_mode
246    }
247    #[doc = "0x1fc - ASSIST_DEBUG_DATE_REG"]
248    #[inline(always)]
249    pub const fn date(&self) -> &DATE {
250        &self.date
251    }
252}
253#[doc = "CORE_0_MONTR_ENA (rw) register accessor: ASSIST_DEBUG_CORE_0_MONTR_ENA_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_montr_ena::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_montr_ena::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_montr_ena`] module"]
254pub type CORE_0_MONTR_ENA = crate::Reg<core_0_montr_ena::CORE_0_MONTR_ENA_SPEC>;
255#[doc = "ASSIST_DEBUG_CORE_0_MONTR_ENA_REG"]
256pub mod core_0_montr_ena;
257#[doc = "CORE_0_INTR_RAW (r) register accessor: ASSIST_DEBUG_CORE_0_INTR_RAW_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_intr_raw::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_intr_raw`] module"]
258pub type CORE_0_INTR_RAW = crate::Reg<core_0_intr_raw::CORE_0_INTR_RAW_SPEC>;
259#[doc = "ASSIST_DEBUG_CORE_0_INTR_RAW_REG"]
260pub mod core_0_intr_raw;
261#[doc = "CORE_0_INTR_ENA (rw) register accessor: ASSIST_DEBUG_CORE_0_INTR_ENA_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_intr_ena::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_intr_ena::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_intr_ena`] module"]
262pub type CORE_0_INTR_ENA = crate::Reg<core_0_intr_ena::CORE_0_INTR_ENA_SPEC>;
263#[doc = "ASSIST_DEBUG_CORE_0_INTR_ENA_REG"]
264pub mod core_0_intr_ena;
265#[doc = "CORE_0_INTR_CLR (rw) register accessor: ASSIST_DEBUG_CORE_0_INTR_CLR_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_intr_clr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_intr_clr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_intr_clr`] module"]
266pub type CORE_0_INTR_CLR = crate::Reg<core_0_intr_clr::CORE_0_INTR_CLR_SPEC>;
267#[doc = "ASSIST_DEBUG_CORE_0_INTR_CLR_REG"]
268pub mod core_0_intr_clr;
269#[doc = "CORE_0_AREA_DRAM0_0_MIN (rw) register accessor: ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_MIN_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_area_dram0_0_min::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_area_dram0_0_min::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_area_dram0_0_min`] module"]
270pub type CORE_0_AREA_DRAM0_0_MIN =
271    crate::Reg<core_0_area_dram0_0_min::CORE_0_AREA_DRAM0_0_MIN_SPEC>;
272#[doc = "ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_MIN_REG"]
273pub mod core_0_area_dram0_0_min;
274#[doc = "CORE_0_AREA_DRAM0_0_MAX (rw) register accessor: ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_MAX_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_area_dram0_0_max::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_area_dram0_0_max::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_area_dram0_0_max`] module"]
275pub type CORE_0_AREA_DRAM0_0_MAX =
276    crate::Reg<core_0_area_dram0_0_max::CORE_0_AREA_DRAM0_0_MAX_SPEC>;
277#[doc = "ASSIST_DEBUG_CORE_0_AREA_DRAM0_0_MAX_REG"]
278pub mod core_0_area_dram0_0_max;
279#[doc = "CORE_0_AREA_DRAM0_1_MIN (rw) register accessor: ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_MIN_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_area_dram0_1_min::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_area_dram0_1_min::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_area_dram0_1_min`] module"]
280pub type CORE_0_AREA_DRAM0_1_MIN =
281    crate::Reg<core_0_area_dram0_1_min::CORE_0_AREA_DRAM0_1_MIN_SPEC>;
282#[doc = "ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_MIN_REG"]
283pub mod core_0_area_dram0_1_min;
284#[doc = "CORE_0_AREA_DRAM0_1_MAX (rw) register accessor: ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_MAX_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_area_dram0_1_max::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_area_dram0_1_max::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_area_dram0_1_max`] module"]
285pub type CORE_0_AREA_DRAM0_1_MAX =
286    crate::Reg<core_0_area_dram0_1_max::CORE_0_AREA_DRAM0_1_MAX_SPEC>;
287#[doc = "ASSIST_DEBUG_CORE_0_AREA_DRAM0_1_MAX_REG"]
288pub mod core_0_area_dram0_1_max;
289#[doc = "CORE_0_AREA_PIF_0_MIN (rw) register accessor: ASSIST_DEBUG_CORE_0_AREA_PIF_0_MIN_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_area_pif_0_min::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_area_pif_0_min::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_area_pif_0_min`] module"]
290pub type CORE_0_AREA_PIF_0_MIN = crate::Reg<core_0_area_pif_0_min::CORE_0_AREA_PIF_0_MIN_SPEC>;
291#[doc = "ASSIST_DEBUG_CORE_0_AREA_PIF_0_MIN_REG"]
292pub mod core_0_area_pif_0_min;
293#[doc = "CORE_0_AREA_PIF_0_MAX (rw) register accessor: ASSIST_DEBUG_CORE_0_AREA_PIF_0_MAX_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_area_pif_0_max::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_area_pif_0_max::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_area_pif_0_max`] module"]
294pub type CORE_0_AREA_PIF_0_MAX = crate::Reg<core_0_area_pif_0_max::CORE_0_AREA_PIF_0_MAX_SPEC>;
295#[doc = "ASSIST_DEBUG_CORE_0_AREA_PIF_0_MAX_REG"]
296pub mod core_0_area_pif_0_max;
297#[doc = "CORE_0_AREA_PIF_1_MIN (rw) register accessor: ASSIST_DEBUG_CORE_0_AREA_PIF_1_MIN_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_area_pif_1_min::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_area_pif_1_min::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_area_pif_1_min`] module"]
298pub type CORE_0_AREA_PIF_1_MIN = crate::Reg<core_0_area_pif_1_min::CORE_0_AREA_PIF_1_MIN_SPEC>;
299#[doc = "ASSIST_DEBUG_CORE_0_AREA_PIF_1_MIN_REG"]
300pub mod core_0_area_pif_1_min;
301#[doc = "CORE_0_AREA_PIF_1_MAX (rw) register accessor: ASSIST_DEBUG_CORE_0_AREA_PIF_1_MAX_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_area_pif_1_max::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_area_pif_1_max::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_area_pif_1_max`] module"]
302pub type CORE_0_AREA_PIF_1_MAX = crate::Reg<core_0_area_pif_1_max::CORE_0_AREA_PIF_1_MAX_SPEC>;
303#[doc = "ASSIST_DEBUG_CORE_0_AREA_PIF_1_MAX_REG"]
304pub mod core_0_area_pif_1_max;
305#[doc = "CORE_0_AREA_PC (r) register accessor: ASSIST_DEBUG_CORE_0_AREA_PC_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_area_pc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_area_pc`] module"]
306pub type CORE_0_AREA_PC = crate::Reg<core_0_area_pc::CORE_0_AREA_PC_SPEC>;
307#[doc = "ASSIST_DEBUG_CORE_0_AREA_PC_REG"]
308pub mod core_0_area_pc;
309#[doc = "CORE_0_AREA_SP (r) register accessor: ASSIST_DEBUG_CORE_0_AREA_SP_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_area_sp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_area_sp`] module"]
310pub type CORE_0_AREA_SP = crate::Reg<core_0_area_sp::CORE_0_AREA_SP_SPEC>;
311#[doc = "ASSIST_DEBUG_CORE_0_AREA_SP_REG"]
312pub mod core_0_area_sp;
313#[doc = "CORE_0_SP_MIN (rw) register accessor: ASSIST_DEBUG_CORE_0_SP_MIN_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_sp_min::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_sp_min::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_sp_min`] module"]
314pub type CORE_0_SP_MIN = crate::Reg<core_0_sp_min::CORE_0_SP_MIN_SPEC>;
315#[doc = "ASSIST_DEBUG_CORE_0_SP_MIN_REG"]
316pub mod core_0_sp_min;
317#[doc = "CORE_0_SP_MAX (rw) register accessor: ASSIST_DEBUG_CORE_0_SP_MAX_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_sp_max::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_sp_max::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_sp_max`] module"]
318pub type CORE_0_SP_MAX = crate::Reg<core_0_sp_max::CORE_0_SP_MAX_SPEC>;
319#[doc = "ASSIST_DEBUG_CORE_0_SP_MAX_REG"]
320pub mod core_0_sp_max;
321#[doc = "CORE_0_SP_PC (r) register accessor: ASSIST_DEBUG_CORE_0_SP_PC_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_sp_pc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_sp_pc`] module"]
322pub type CORE_0_SP_PC = crate::Reg<core_0_sp_pc::CORE_0_SP_PC_SPEC>;
323#[doc = "ASSIST_DEBUG_CORE_0_SP_PC_REG"]
324pub mod core_0_sp_pc;
325#[doc = "CORE_0_RCD_EN (rw) register accessor: ASSIST_DEBUG_CORE_0_RCD_EN_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_rcd_en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_rcd_en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_rcd_en`] module"]
326pub type CORE_0_RCD_EN = crate::Reg<core_0_rcd_en::CORE_0_RCD_EN_SPEC>;
327#[doc = "ASSIST_DEBUG_CORE_0_RCD_EN_REG"]
328pub mod core_0_rcd_en;
329#[doc = "CORE_0_RCD_PDEBUGPC (r) register accessor: ASSIST_DEBUG_CORE_0_RCD_PDEBUGPC_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_rcd_pdebugpc::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_rcd_pdebugpc`] module"]
330pub type CORE_0_RCD_PDEBUGPC = crate::Reg<core_0_rcd_pdebugpc::CORE_0_RCD_PDEBUGPC_SPEC>;
331#[doc = "ASSIST_DEBUG_CORE_0_RCD_PDEBUGPC_REG"]
332pub mod core_0_rcd_pdebugpc;
333#[doc = "CORE_0_RCD_PDEBUGSP (r) register accessor: ASSIST_DEBUG_CORE_0_RCD_PDEBUGSP_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_rcd_pdebugsp::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_rcd_pdebugsp`] module"]
334pub type CORE_0_RCD_PDEBUGSP = crate::Reg<core_0_rcd_pdebugsp::CORE_0_RCD_PDEBUGSP_SPEC>;
335#[doc = "ASSIST_DEBUG_CORE_0_RCD_PDEBUGSP_REG"]
336pub mod core_0_rcd_pdebugsp;
337#[doc = "CORE_0_IRAM0_EXCEPTION_MONITOR_0 (r) register accessor: ASSIST_DEBUG_CORE_0_RCD_PDEBUGSP_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_iram0_exception_monitor_0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_iram0_exception_monitor_0`] module"]
338pub type CORE_0_IRAM0_EXCEPTION_MONITOR_0 =
339    crate::Reg<core_0_iram0_exception_monitor_0::CORE_0_IRAM0_EXCEPTION_MONITOR_0_SPEC>;
340#[doc = "ASSIST_DEBUG_CORE_0_RCD_PDEBUGSP_REG"]
341pub mod core_0_iram0_exception_monitor_0;
342#[doc = "CORE_0_IRAM0_EXCEPTION_MONITOR_1 (r) register accessor: ASSIST_DEBUG_CORE_0_IRAM0_EXCEPTION_MONITOR_1_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_iram0_exception_monitor_1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_iram0_exception_monitor_1`] module"]
343pub type CORE_0_IRAM0_EXCEPTION_MONITOR_1 =
344    crate::Reg<core_0_iram0_exception_monitor_1::CORE_0_IRAM0_EXCEPTION_MONITOR_1_SPEC>;
345#[doc = "ASSIST_DEBUG_CORE_0_IRAM0_EXCEPTION_MONITOR_1_REG"]
346pub mod core_0_iram0_exception_monitor_1;
347#[doc = "CORE_0_DRAM0_EXCEPTION_MONITOR_0 (r) register accessor: ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_0_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_dram0_exception_monitor_0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_dram0_exception_monitor_0`] module"]
348pub type CORE_0_DRAM0_EXCEPTION_MONITOR_0 =
349    crate::Reg<core_0_dram0_exception_monitor_0::CORE_0_DRAM0_EXCEPTION_MONITOR_0_SPEC>;
350#[doc = "ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_0_REG"]
351pub mod core_0_dram0_exception_monitor_0;
352#[doc = "CORE_0_DRAM0_EXCEPTION_MONITOR_1 (r) register accessor: ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_1_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_dram0_exception_monitor_1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_dram0_exception_monitor_1`] module"]
353pub type CORE_0_DRAM0_EXCEPTION_MONITOR_1 =
354    crate::Reg<core_0_dram0_exception_monitor_1::CORE_0_DRAM0_EXCEPTION_MONITOR_1_SPEC>;
355#[doc = "ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_1_REG"]
356pub mod core_0_dram0_exception_monitor_1;
357#[doc = "CORE_0_DRAM0_EXCEPTION_MONITOR_2 (r) register accessor: ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_1_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_dram0_exception_monitor_2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_dram0_exception_monitor_2`] module"]
358pub type CORE_0_DRAM0_EXCEPTION_MONITOR_2 =
359    crate::Reg<core_0_dram0_exception_monitor_2::CORE_0_DRAM0_EXCEPTION_MONITOR_2_SPEC>;
360#[doc = "ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_1_REG"]
361pub mod core_0_dram0_exception_monitor_2;
362#[doc = "CORE_0_DRAM0_EXCEPTION_MONITOR_3 (r) register accessor: ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_3_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_dram0_exception_monitor_3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_dram0_exception_monitor_3`] module"]
363pub type CORE_0_DRAM0_EXCEPTION_MONITOR_3 =
364    crate::Reg<core_0_dram0_exception_monitor_3::CORE_0_DRAM0_EXCEPTION_MONITOR_3_SPEC>;
365#[doc = "ASSIST_DEBUG_CORE_0_DRAM0_EXCEPTION_MONITOR_3_REG"]
366pub mod core_0_dram0_exception_monitor_3;
367#[doc = "CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_0 (rw) register accessor: ASSIST_DEBUG_CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_0_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_x_iram0_dram0_exception_monitor_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_x_iram0_dram0_exception_monitor_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_x_iram0_dram0_exception_monitor_0`] module"]
368pub type CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_0 =
369    crate::Reg<core_x_iram0_dram0_exception_monitor_0::CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_0_SPEC>;
370#[doc = "ASSIST_DEBUG_CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_0_REG"]
371pub mod core_x_iram0_dram0_exception_monitor_0;
372#[doc = "CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_1 (rw) register accessor: ASSIST_DEBUG_CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_1_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`core_x_iram0_dram0_exception_monitor_1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_x_iram0_dram0_exception_monitor_1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_x_iram0_dram0_exception_monitor_1`] module"]
373pub type CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_1 =
374    crate::Reg<core_x_iram0_dram0_exception_monitor_1::CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_1_SPEC>;
375#[doc = "ASSIST_DEBUG_CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_1_REG"]
376pub mod core_x_iram0_dram0_exception_monitor_1;
377#[doc = "LOG_SETTING (rw) register accessor: ASSIST_DEBUG_LOG_SETTING\n\nYou can [`read`](crate::Reg::read) this register and get [`log_setting::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`log_setting::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@log_setting`] module"]
378pub type LOG_SETTING = crate::Reg<log_setting::LOG_SETTING_SPEC>;
379#[doc = "ASSIST_DEBUG_LOG_SETTING"]
380pub mod log_setting;
381#[doc = "LOG_DATA_0 (rw) register accessor: ASSIST_DEBUG_LOG_DATA_0_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`log_data_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`log_data_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@log_data_0`] module"]
382pub type LOG_DATA_0 = crate::Reg<log_data_0::LOG_DATA_0_SPEC>;
383#[doc = "ASSIST_DEBUG_LOG_DATA_0_REG"]
384pub mod log_data_0;
385#[doc = "LOG_DATA_MASK (rw) register accessor: ASSIST_DEBUG_LOG_DATA_MASK_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`log_data_mask::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`log_data_mask::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@log_data_mask`] module"]
386pub type LOG_DATA_MASK = crate::Reg<log_data_mask::LOG_DATA_MASK_SPEC>;
387#[doc = "ASSIST_DEBUG_LOG_DATA_MASK_REG"]
388pub mod log_data_mask;
389#[doc = "LOG_MIN (rw) register accessor: ASSIST_DEBUG_LOG_MIN_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`log_min::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`log_min::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@log_min`] module"]
390pub type LOG_MIN = crate::Reg<log_min::LOG_MIN_SPEC>;
391#[doc = "ASSIST_DEBUG_LOG_MIN_REG"]
392pub mod log_min;
393#[doc = "LOG_MAX (rw) register accessor: ASSIST_DEBUG_LOG_MAX_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`log_max::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`log_max::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@log_max`] module"]
394pub type LOG_MAX = crate::Reg<log_max::LOG_MAX_SPEC>;
395#[doc = "ASSIST_DEBUG_LOG_MAX_REG"]
396pub mod log_max;
397#[doc = "LOG_MEM_START (rw) register accessor: ASSIST_DEBUG_LOG_MEM_START_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`log_mem_start::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`log_mem_start::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@log_mem_start`] module"]
398pub type LOG_MEM_START = crate::Reg<log_mem_start::LOG_MEM_START_SPEC>;
399#[doc = "ASSIST_DEBUG_LOG_MEM_START_REG"]
400pub mod log_mem_start;
401#[doc = "LOG_MEM_END (rw) register accessor: ASSIST_DEBUG_LOG_MEM_END_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`log_mem_end::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`log_mem_end::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@log_mem_end`] module"]
402pub type LOG_MEM_END = crate::Reg<log_mem_end::LOG_MEM_END_SPEC>;
403#[doc = "ASSIST_DEBUG_LOG_MEM_END_REG"]
404pub mod log_mem_end;
405#[doc = "LOG_MEM_WRITING_ADDR (r) register accessor: ASSIST_DEBUG_LOG_MEM_WRITING_ADDR_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`log_mem_writing_addr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@log_mem_writing_addr`] module"]
406pub type LOG_MEM_WRITING_ADDR = crate::Reg<log_mem_writing_addr::LOG_MEM_WRITING_ADDR_SPEC>;
407#[doc = "ASSIST_DEBUG_LOG_MEM_WRITING_ADDR_REG"]
408pub mod log_mem_writing_addr;
409#[doc = "LOG_MEM_FULL_FLAG (rw) register accessor: ASSIST_DEBUG_LOG_MEM_FULL_FLAG_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`log_mem_full_flag::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`log_mem_full_flag::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@log_mem_full_flag`] module"]
410pub type LOG_MEM_FULL_FLAG = crate::Reg<log_mem_full_flag::LOG_MEM_FULL_FLAG_SPEC>;
411#[doc = "ASSIST_DEBUG_LOG_MEM_FULL_FLAG_REG"]
412pub mod log_mem_full_flag;
413#[doc = "CORE_0_LASTPC_BEFORE_EXCEPTION (r) register accessor: ASSIST_DEBUG_CORE_0_LASTPC_BEFORE_EXCEPTION\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_lastpc_before_exception::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_lastpc_before_exception`] module"]
414pub type CORE_0_LASTPC_BEFORE_EXCEPTION =
415    crate::Reg<core_0_lastpc_before_exception::CORE_0_LASTPC_BEFORE_EXCEPTION_SPEC>;
416#[doc = "ASSIST_DEBUG_CORE_0_LASTPC_BEFORE_EXCEPTION"]
417pub mod core_0_lastpc_before_exception;
418#[doc = "CORE_0_DEBUG_MODE (r) register accessor: ASSIST_DEBUG_CORE_0_DEBUG_MODE\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_debug_mode::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_debug_mode`] module"]
419pub type CORE_0_DEBUG_MODE = crate::Reg<core_0_debug_mode::CORE_0_DEBUG_MODE_SPEC>;
420#[doc = "ASSIST_DEBUG_CORE_0_DEBUG_MODE"]
421pub mod core_0_debug_mode;
422#[doc = "DATE (rw) register accessor: ASSIST_DEBUG_DATE_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`date::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`date::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@date`] module"]
423pub type DATE = crate::Reg<date::DATE_SPEC>;
424#[doc = "ASSIST_DEBUG_DATE_REG"]
425pub mod date;