#![allow(clippy::missing_safety_doc)]
#![allow(clippy::identity_op)]
#![allow(clippy::unnecessary_cast)]
#![allow(clippy::erasing_op)]
#[doc = "QuadSPI interface"]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Quadspi {
ptr: *mut u8,
}
unsafe impl Send for Quadspi {}
unsafe impl Sync for Quadspi {}
impl Quadspi {
#[inline(always)]
pub const unsafe fn from_ptr(ptr: *mut ()) -> Self {
Self { ptr: ptr as _ }
}
#[inline(always)]
pub const fn as_ptr(&self) -> *mut () {
self.ptr as _
}
#[doc = "control register"]
#[inline(always)]
pub const fn cr(self) -> crate::common::Reg<regs::Cr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0usize) as _) }
}
#[doc = "device configuration register"]
#[inline(always)]
pub const fn dcr(self) -> crate::common::Reg<regs::Dcr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x04usize) as _) }
}
#[doc = "status register"]
#[inline(always)]
pub const fn sr(self) -> crate::common::Reg<regs::Sr, crate::common::R> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x08usize) as _) }
}
#[doc = "flag clear register"]
#[inline(always)]
pub const fn fcr(self) -> crate::common::Reg<regs::Fcr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0cusize) as _) }
}
#[doc = "data length register"]
#[inline(always)]
pub const fn dlr(self) -> crate::common::Reg<regs::Dlr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x10usize) as _) }
}
#[doc = "communication configuration register"]
#[inline(always)]
pub const fn ccr(self) -> crate::common::Reg<regs::Ccr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x14usize) as _) }
}
#[doc = "address register"]
#[inline(always)]
pub const fn ar(self) -> crate::common::Reg<regs::Ar, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x18usize) as _) }
}
#[doc = "ABR"]
#[inline(always)]
pub const fn abr(self) -> crate::common::Reg<regs::Abr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x1cusize) as _) }
}
#[doc = "data register"]
#[inline(always)]
pub const fn dr(self) -> crate::common::Reg<regs::Dr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x20usize) as _) }
}
#[doc = "polling status mask register"]
#[inline(always)]
pub const fn psmkr(self) -> crate::common::Reg<regs::Psmkr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x24usize) as _) }
}
#[doc = "polling status match register"]
#[inline(always)]
pub const fn psmar(self) -> crate::common::Reg<regs::Psmar, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x28usize) as _) }
}
#[doc = "polling interval register"]
#[inline(always)]
pub const fn pir(self) -> crate::common::Reg<regs::Pir, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x2cusize) as _) }
}
#[doc = "low-power timeout register"]
#[inline(always)]
pub const fn lptr(self) -> crate::common::Reg<regs::Lptr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x30usize) as _) }
}
}
pub mod regs {
#[doc = "ABR"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Abr(pub u32);
impl Abr {
#[doc = "ALTERNATE"]
#[inline(always)]
pub const fn alternate(&self) -> u32 {
let val = (self.0 >> 0usize) & 0xffff_ffff;
val as u32
}
#[doc = "ALTERNATE"]
#[inline(always)]
pub fn set_alternate(&mut self, val: u32) {
self.0 = (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize);
}
}
impl Default for Abr {
#[inline(always)]
fn default() -> Abr {
Abr(0)
}
}
impl core::fmt::Debug for Abr {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Abr").field("alternate", &self.alternate()).finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Abr {
fn format(&self, f: defmt::Formatter) {
defmt::write!(f, "Abr {{ alternate: {=u32:?} }}", self.alternate())
}
}
#[doc = "address register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Ar(pub u32);
impl Ar {
#[doc = "Address"]
#[inline(always)]
pub const fn address(&self) -> u32 {
let val = (self.0 >> 0usize) & 0xffff_ffff;
val as u32
}
#[doc = "Address"]
#[inline(always)]
pub fn set_address(&mut self, val: u32) {
self.0 = (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize);
}
}
impl Default for Ar {
#[inline(always)]
fn default() -> Ar {
Ar(0)
}
}
impl core::fmt::Debug for Ar {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Ar").field("address", &self.address()).finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Ar {
fn format(&self, f: defmt::Formatter) {
defmt::write!(f, "Ar {{ address: {=u32:?} }}", self.address())
}
}
#[doc = "communication configuration register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Ccr(pub u32);
impl Ccr {
#[doc = "Instruction"]
#[inline(always)]
pub const fn instruction(&self) -> u8 {
let val = (self.0 >> 0usize) & 0xff;
val as u8
}
#[doc = "Instruction"]
#[inline(always)]
pub fn set_instruction(&mut self, val: u8) {
self.0 = (self.0 & !(0xff << 0usize)) | (((val as u32) & 0xff) << 0usize);
}
#[doc = "Instruction mode"]
#[inline(always)]
pub const fn imode(&self) -> u8 {
let val = (self.0 >> 8usize) & 0x03;
val as u8
}
#[doc = "Instruction mode"]
#[inline(always)]
pub fn set_imode(&mut self, val: u8) {
self.0 = (self.0 & !(0x03 << 8usize)) | (((val as u32) & 0x03) << 8usize);
}
#[doc = "Address mode"]
#[inline(always)]
pub const fn admode(&self) -> u8 {
let val = (self.0 >> 10usize) & 0x03;
val as u8
}
#[doc = "Address mode"]
#[inline(always)]
pub fn set_admode(&mut self, val: u8) {
self.0 = (self.0 & !(0x03 << 10usize)) | (((val as u32) & 0x03) << 10usize);
}
#[doc = "Address size"]
#[inline(always)]
pub const fn adsize(&self) -> u8 {
let val = (self.0 >> 12usize) & 0x03;
val as u8
}
#[doc = "Address size"]
#[inline(always)]
pub fn set_adsize(&mut self, val: u8) {
self.0 = (self.0 & !(0x03 << 12usize)) | (((val as u32) & 0x03) << 12usize);
}
#[doc = "Alternate bytes mode"]
#[inline(always)]
pub const fn abmode(&self) -> u8 {
let val = (self.0 >> 14usize) & 0x03;
val as u8
}
#[doc = "Alternate bytes mode"]
#[inline(always)]
pub fn set_abmode(&mut self, val: u8) {
self.0 = (self.0 & !(0x03 << 14usize)) | (((val as u32) & 0x03) << 14usize);
}
#[doc = "Alternate bytes size"]
#[inline(always)]
pub const fn absize(&self) -> u8 {
let val = (self.0 >> 16usize) & 0x03;
val as u8
}
#[doc = "Alternate bytes size"]
#[inline(always)]
pub fn set_absize(&mut self, val: u8) {
self.0 = (self.0 & !(0x03 << 16usize)) | (((val as u32) & 0x03) << 16usize);
}
#[doc = "Number of dummy cycles"]
#[inline(always)]
pub const fn dcyc(&self) -> u8 {
let val = (self.0 >> 18usize) & 0x1f;
val as u8
}
#[doc = "Number of dummy cycles"]
#[inline(always)]
pub fn set_dcyc(&mut self, val: u8) {
self.0 = (self.0 & !(0x1f << 18usize)) | (((val as u32) & 0x1f) << 18usize);
}
#[doc = "Data mode"]
#[inline(always)]
pub const fn dmode(&self) -> u8 {
let val = (self.0 >> 24usize) & 0x03;
val as u8
}
#[doc = "Data mode"]
#[inline(always)]
pub fn set_dmode(&mut self, val: u8) {
self.0 = (self.0 & !(0x03 << 24usize)) | (((val as u32) & 0x03) << 24usize);
}
#[doc = "Functional mode"]
#[inline(always)]
pub const fn fmode(&self) -> u8 {
let val = (self.0 >> 26usize) & 0x03;
val as u8
}
#[doc = "Functional mode"]
#[inline(always)]
pub fn set_fmode(&mut self, val: u8) {
self.0 = (self.0 & !(0x03 << 26usize)) | (((val as u32) & 0x03) << 26usize);
}
#[doc = "Send instruction only once mode"]
#[inline(always)]
pub const fn sioo(&self) -> bool {
let val = (self.0 >> 28usize) & 0x01;
val != 0
}
#[doc = "Send instruction only once mode"]
#[inline(always)]
pub fn set_sioo(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 28usize)) | (((val as u32) & 0x01) << 28usize);
}
#[doc = "Free-running clock mode (not available on all chips!)"]
#[inline(always)]
pub const fn frcm(&self) -> bool {
let val = (self.0 >> 29usize) & 0x01;
val != 0
}
#[doc = "Free-running clock mode (not available on all chips!)"]
#[inline(always)]
pub fn set_frcm(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 29usize)) | (((val as u32) & 0x01) << 29usize);
}
#[doc = "DDR hold half cycle"]
#[inline(always)]
pub const fn dhhc(&self) -> bool {
let val = (self.0 >> 30usize) & 0x01;
val != 0
}
#[doc = "DDR hold half cycle"]
#[inline(always)]
pub fn set_dhhc(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 30usize)) | (((val as u32) & 0x01) << 30usize);
}
#[doc = "Double data rate mode"]
#[inline(always)]
pub const fn ddrm(&self) -> bool {
let val = (self.0 >> 31usize) & 0x01;
val != 0
}
#[doc = "Double data rate mode"]
#[inline(always)]
pub fn set_ddrm(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 31usize)) | (((val as u32) & 0x01) << 31usize);
}
}
impl Default for Ccr {
#[inline(always)]
fn default() -> Ccr {
Ccr(0)
}
}
impl core::fmt::Debug for Ccr {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Ccr")
.field("instruction", &self.instruction())
.field("imode", &self.imode())
.field("admode", &self.admode())
.field("adsize", &self.adsize())
.field("abmode", &self.abmode())
.field("absize", &self.absize())
.field("dcyc", &self.dcyc())
.field("dmode", &self.dmode())
.field("fmode", &self.fmode())
.field("sioo", &self.sioo())
.field("frcm", &self.frcm())
.field("dhhc", &self.dhhc())
.field("ddrm", &self.ddrm())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Ccr {
fn format(&self, f: defmt::Formatter) {
defmt :: write ! (f , "Ccr {{ instruction: {=u8:?}, imode: {=u8:?}, admode: {=u8:?}, adsize: {=u8:?}, abmode: {=u8:?}, absize: {=u8:?}, dcyc: {=u8:?}, dmode: {=u8:?}, fmode: {=u8:?}, sioo: {=bool:?}, frcm: {=bool:?}, dhhc: {=bool:?}, ddrm: {=bool:?} }}" , self . instruction () , self . imode () , self . admode () , self . adsize () , self . abmode () , self . absize () , self . dcyc () , self . dmode () , self . fmode () , self . sioo () , self . frcm () , self . dhhc () , self . ddrm ())
}
}
#[doc = "control register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Cr(pub u32);
impl Cr {
#[doc = "Enable"]
#[inline(always)]
pub const fn en(&self) -> bool {
let val = (self.0 >> 0usize) & 0x01;
val != 0
}
#[doc = "Enable"]
#[inline(always)]
pub fn set_en(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
}
#[doc = "Abort request"]
#[inline(always)]
pub const fn abort(&self) -> bool {
let val = (self.0 >> 1usize) & 0x01;
val != 0
}
#[doc = "Abort request"]
#[inline(always)]
pub fn set_abort(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
}
#[doc = "DMA enable (not available on all chips!)"]
#[inline(always)]
pub const fn dmaen(&self) -> bool {
let val = (self.0 >> 2usize) & 0x01;
val != 0
}
#[doc = "DMA enable (not available on all chips!)"]
#[inline(always)]
pub fn set_dmaen(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize);
}
#[doc = "Timeout counter enable"]
#[inline(always)]
pub const fn tcen(&self) -> bool {
let val = (self.0 >> 3usize) & 0x01;
val != 0
}
#[doc = "Timeout counter enable"]
#[inline(always)]
pub fn set_tcen(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize);
}
#[doc = "Sample shift"]
#[inline(always)]
pub const fn sshift(&self) -> bool {
let val = (self.0 >> 4usize) & 0x01;
val != 0
}
#[doc = "Sample shift"]
#[inline(always)]
pub fn set_sshift(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize);
}
#[doc = "Dual-flash mode"]
#[inline(always)]
pub const fn dfm(&self) -> bool {
let val = (self.0 >> 6usize) & 0x01;
val != 0
}
#[doc = "Dual-flash mode"]
#[inline(always)]
pub fn set_dfm(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 6usize)) | (((val as u32) & 0x01) << 6usize);
}
#[doc = "FLASH memory selection"]
#[inline(always)]
pub const fn fsel(&self) -> bool {
let val = (self.0 >> 7usize) & 0x01;
val != 0
}
#[doc = "FLASH memory selection"]
#[inline(always)]
pub fn set_fsel(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 7usize)) | (((val as u32) & 0x01) << 7usize);
}
#[doc = "IFO threshold level"]
#[inline(always)]
pub const fn fthres(&self) -> u8 {
let val = (self.0 >> 8usize) & 0x0f;
val as u8
}
#[doc = "IFO threshold level"]
#[inline(always)]
pub fn set_fthres(&mut self, val: u8) {
self.0 = (self.0 & !(0x0f << 8usize)) | (((val as u32) & 0x0f) << 8usize);
}
#[doc = "Transfer error interrupt enable"]
#[inline(always)]
pub const fn teie(&self) -> bool {
let val = (self.0 >> 16usize) & 0x01;
val != 0
}
#[doc = "Transfer error interrupt enable"]
#[inline(always)]
pub fn set_teie(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 16usize)) | (((val as u32) & 0x01) << 16usize);
}
#[doc = "Transfer complete interrupt enable"]
#[inline(always)]
pub const fn tcie(&self) -> bool {
let val = (self.0 >> 17usize) & 0x01;
val != 0
}
#[doc = "Transfer complete interrupt enable"]
#[inline(always)]
pub fn set_tcie(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 17usize)) | (((val as u32) & 0x01) << 17usize);
}
#[doc = "FIFO threshold interrupt enable"]
#[inline(always)]
pub const fn ftie(&self) -> bool {
let val = (self.0 >> 18usize) & 0x01;
val != 0
}
#[doc = "FIFO threshold interrupt enable"]
#[inline(always)]
pub fn set_ftie(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 18usize)) | (((val as u32) & 0x01) << 18usize);
}
#[doc = "Status match interrupt enable"]
#[inline(always)]
pub const fn smie(&self) -> bool {
let val = (self.0 >> 19usize) & 0x01;
val != 0
}
#[doc = "Status match interrupt enable"]
#[inline(always)]
pub fn set_smie(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 19usize)) | (((val as u32) & 0x01) << 19usize);
}
#[doc = "TimeOut interrupt enable"]
#[inline(always)]
pub const fn toie(&self) -> bool {
let val = (self.0 >> 20usize) & 0x01;
val != 0
}
#[doc = "TimeOut interrupt enable"]
#[inline(always)]
pub fn set_toie(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 20usize)) | (((val as u32) & 0x01) << 20usize);
}
#[doc = "Automatic poll mode stop"]
#[inline(always)]
pub const fn apms(&self) -> bool {
let val = (self.0 >> 22usize) & 0x01;
val != 0
}
#[doc = "Automatic poll mode stop"]
#[inline(always)]
pub fn set_apms(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize);
}
#[doc = "Polling match mode"]
#[inline(always)]
pub const fn pmm(&self) -> bool {
let val = (self.0 >> 23usize) & 0x01;
val != 0
}
#[doc = "Polling match mode"]
#[inline(always)]
pub fn set_pmm(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize);
}
#[doc = "Clock prescaler"]
#[inline(always)]
pub const fn prescaler(&self) -> u8 {
let val = (self.0 >> 24usize) & 0xff;
val as u8
}
#[doc = "Clock prescaler"]
#[inline(always)]
pub fn set_prescaler(&mut self, val: u8) {
self.0 = (self.0 & !(0xff << 24usize)) | (((val as u32) & 0xff) << 24usize);
}
}
impl Default for Cr {
#[inline(always)]
fn default() -> Cr {
Cr(0)
}
}
impl core::fmt::Debug for Cr {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Cr")
.field("en", &self.en())
.field("abort", &self.abort())
.field("dmaen", &self.dmaen())
.field("tcen", &self.tcen())
.field("sshift", &self.sshift())
.field("dfm", &self.dfm())
.field("fsel", &self.fsel())
.field("fthres", &self.fthres())
.field("teie", &self.teie())
.field("tcie", &self.tcie())
.field("ftie", &self.ftie())
.field("smie", &self.smie())
.field("toie", &self.toie())
.field("apms", &self.apms())
.field("pmm", &self.pmm())
.field("prescaler", &self.prescaler())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Cr {
fn format(&self, f: defmt::Formatter) {
defmt :: write ! (f , "Cr {{ en: {=bool:?}, abort: {=bool:?}, dmaen: {=bool:?}, tcen: {=bool:?}, sshift: {=bool:?}, dfm: {=bool:?}, fsel: {=bool:?}, fthres: {=u8:?}, teie: {=bool:?}, tcie: {=bool:?}, ftie: {=bool:?}, smie: {=bool:?}, toie: {=bool:?}, apms: {=bool:?}, pmm: {=bool:?}, prescaler: {=u8:?} }}" , self . en () , self . abort () , self . dmaen () , self . tcen () , self . sshift () , self . dfm () , self . fsel () , self . fthres () , self . teie () , self . tcie () , self . ftie () , self . smie () , self . toie () , self . apms () , self . pmm () , self . prescaler ())
}
}
#[doc = "device configuration register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Dcr(pub u32);
impl Dcr {
#[doc = "Mode 0 / mode 3"]
#[inline(always)]
pub const fn ckmode(&self) -> bool {
let val = (self.0 >> 0usize) & 0x01;
val != 0
}
#[doc = "Mode 0 / mode 3"]
#[inline(always)]
pub fn set_ckmode(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
}
#[doc = "Chip select high time"]
#[inline(always)]
pub const fn csht(&self) -> u8 {
let val = (self.0 >> 8usize) & 0x07;
val as u8
}
#[doc = "Chip select high time"]
#[inline(always)]
pub fn set_csht(&mut self, val: u8) {
self.0 = (self.0 & !(0x07 << 8usize)) | (((val as u32) & 0x07) << 8usize);
}
#[doc = "FLASH memory size"]
#[inline(always)]
pub const fn fsize(&self) -> u8 {
let val = (self.0 >> 16usize) & 0x1f;
val as u8
}
#[doc = "FLASH memory size"]
#[inline(always)]
pub fn set_fsize(&mut self, val: u8) {
self.0 = (self.0 & !(0x1f << 16usize)) | (((val as u32) & 0x1f) << 16usize);
}
}
impl Default for Dcr {
#[inline(always)]
fn default() -> Dcr {
Dcr(0)
}
}
impl core::fmt::Debug for Dcr {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Dcr")
.field("ckmode", &self.ckmode())
.field("csht", &self.csht())
.field("fsize", &self.fsize())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Dcr {
fn format(&self, f: defmt::Formatter) {
defmt::write!(
f,
"Dcr {{ ckmode: {=bool:?}, csht: {=u8:?}, fsize: {=u8:?} }}",
self.ckmode(),
self.csht(),
self.fsize()
)
}
}
#[doc = "data length register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Dlr(pub u32);
impl Dlr {
#[doc = "Data length"]
#[inline(always)]
pub const fn dl(&self) -> u32 {
let val = (self.0 >> 0usize) & 0xffff_ffff;
val as u32
}
#[doc = "Data length"]
#[inline(always)]
pub fn set_dl(&mut self, val: u32) {
self.0 = (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize);
}
}
impl Default for Dlr {
#[inline(always)]
fn default() -> Dlr {
Dlr(0)
}
}
impl core::fmt::Debug for Dlr {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Dlr").field("dl", &self.dl()).finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Dlr {
fn format(&self, f: defmt::Formatter) {
defmt::write!(f, "Dlr {{ dl: {=u32:?} }}", self.dl())
}
}
#[doc = "data register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Dr(pub u32);
impl Dr {
#[doc = "Data"]
#[inline(always)]
pub const fn data(&self) -> u32 {
let val = (self.0 >> 0usize) & 0xffff_ffff;
val as u32
}
#[doc = "Data"]
#[inline(always)]
pub fn set_data(&mut self, val: u32) {
self.0 = (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize);
}
}
impl Default for Dr {
#[inline(always)]
fn default() -> Dr {
Dr(0)
}
}
impl core::fmt::Debug for Dr {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Dr").field("data", &self.data()).finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Dr {
fn format(&self, f: defmt::Formatter) {
defmt::write!(f, "Dr {{ data: {=u32:?} }}", self.data())
}
}
#[doc = "flag clear register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Fcr(pub u32);
impl Fcr {
#[doc = "Clear transfer error flag"]
#[inline(always)]
pub const fn ctef(&self) -> bool {
let val = (self.0 >> 0usize) & 0x01;
val != 0
}
#[doc = "Clear transfer error flag"]
#[inline(always)]
pub fn set_ctef(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
}
#[doc = "Clear transfer complete flag"]
#[inline(always)]
pub const fn ctcf(&self) -> bool {
let val = (self.0 >> 1usize) & 0x01;
val != 0
}
#[doc = "Clear transfer complete flag"]
#[inline(always)]
pub fn set_ctcf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
}
#[doc = "Clear status match flag"]
#[inline(always)]
pub const fn csmf(&self) -> bool {
let val = (self.0 >> 3usize) & 0x01;
val != 0
}
#[doc = "Clear status match flag"]
#[inline(always)]
pub fn set_csmf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize);
}
#[doc = "Clear timeout flag"]
#[inline(always)]
pub const fn ctof(&self) -> bool {
let val = (self.0 >> 4usize) & 0x01;
val != 0
}
#[doc = "Clear timeout flag"]
#[inline(always)]
pub fn set_ctof(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize);
}
}
impl Default for Fcr {
#[inline(always)]
fn default() -> Fcr {
Fcr(0)
}
}
impl core::fmt::Debug for Fcr {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Fcr")
.field("ctef", &self.ctef())
.field("ctcf", &self.ctcf())
.field("csmf", &self.csmf())
.field("ctof", &self.ctof())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Fcr {
fn format(&self, f: defmt::Formatter) {
defmt::write!(
f,
"Fcr {{ ctef: {=bool:?}, ctcf: {=bool:?}, csmf: {=bool:?}, ctof: {=bool:?} }}",
self.ctef(),
self.ctcf(),
self.csmf(),
self.ctof()
)
}
}
#[doc = "low-power timeout register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Lptr(pub u32);
impl Lptr {
#[doc = "Timeout period"]
#[inline(always)]
pub const fn timeout(&self) -> u16 {
let val = (self.0 >> 0usize) & 0xffff;
val as u16
}
#[doc = "Timeout period"]
#[inline(always)]
pub fn set_timeout(&mut self, val: u16) {
self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize);
}
}
impl Default for Lptr {
#[inline(always)]
fn default() -> Lptr {
Lptr(0)
}
}
impl core::fmt::Debug for Lptr {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Lptr").field("timeout", &self.timeout()).finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Lptr {
fn format(&self, f: defmt::Formatter) {
defmt::write!(f, "Lptr {{ timeout: {=u16:?} }}", self.timeout())
}
}
#[doc = "polling interval register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Pir(pub u32);
impl Pir {
#[doc = "Polling interval"]
#[inline(always)]
pub const fn interval(&self) -> u16 {
let val = (self.0 >> 0usize) & 0xffff;
val as u16
}
#[doc = "Polling interval"]
#[inline(always)]
pub fn set_interval(&mut self, val: u16) {
self.0 = (self.0 & !(0xffff << 0usize)) | (((val as u32) & 0xffff) << 0usize);
}
}
impl Default for Pir {
#[inline(always)]
fn default() -> Pir {
Pir(0)
}
}
impl core::fmt::Debug for Pir {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Pir").field("interval", &self.interval()).finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Pir {
fn format(&self, f: defmt::Formatter) {
defmt::write!(f, "Pir {{ interval: {=u16:?} }}", self.interval())
}
}
#[doc = "polling status match register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Psmar(pub u32);
impl Psmar {
#[doc = "Status match"]
#[inline(always)]
pub const fn match_(&self) -> u32 {
let val = (self.0 >> 0usize) & 0xffff_ffff;
val as u32
}
#[doc = "Status match"]
#[inline(always)]
pub fn set_match_(&mut self, val: u32) {
self.0 = (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize);
}
}
impl Default for Psmar {
#[inline(always)]
fn default() -> Psmar {
Psmar(0)
}
}
impl core::fmt::Debug for Psmar {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Psmar").field("match_", &self.match_()).finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Psmar {
fn format(&self, f: defmt::Formatter) {
defmt::write!(f, "Psmar {{ match_: {=u32:?} }}", self.match_())
}
}
#[doc = "polling status mask register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Psmkr(pub u32);
impl Psmkr {
#[doc = "Status mask"]
#[inline(always)]
pub const fn mask(&self) -> u32 {
let val = (self.0 >> 0usize) & 0xffff_ffff;
val as u32
}
#[doc = "Status mask"]
#[inline(always)]
pub fn set_mask(&mut self, val: u32) {
self.0 = (self.0 & !(0xffff_ffff << 0usize)) | (((val as u32) & 0xffff_ffff) << 0usize);
}
}
impl Default for Psmkr {
#[inline(always)]
fn default() -> Psmkr {
Psmkr(0)
}
}
impl core::fmt::Debug for Psmkr {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Psmkr").field("mask", &self.mask()).finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Psmkr {
fn format(&self, f: defmt::Formatter) {
defmt::write!(f, "Psmkr {{ mask: {=u32:?} }}", self.mask())
}
}
#[doc = "status register"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Sr(pub u32);
impl Sr {
#[doc = "Transfer error flag"]
#[inline(always)]
pub const fn tef(&self) -> bool {
let val = (self.0 >> 0usize) & 0x01;
val != 0
}
#[doc = "Transfer error flag"]
#[inline(always)]
pub fn set_tef(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
}
#[doc = "Transfer complete flag"]
#[inline(always)]
pub const fn tcf(&self) -> bool {
let val = (self.0 >> 1usize) & 0x01;
val != 0
}
#[doc = "Transfer complete flag"]
#[inline(always)]
pub fn set_tcf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 1usize)) | (((val as u32) & 0x01) << 1usize);
}
#[doc = "FIFO threshold flag"]
#[inline(always)]
pub const fn ftf(&self) -> bool {
let val = (self.0 >> 2usize) & 0x01;
val != 0
}
#[doc = "FIFO threshold flag"]
#[inline(always)]
pub fn set_ftf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 2usize)) | (((val as u32) & 0x01) << 2usize);
}
#[doc = "Status match flag"]
#[inline(always)]
pub const fn smf(&self) -> bool {
let val = (self.0 >> 3usize) & 0x01;
val != 0
}
#[doc = "Status match flag"]
#[inline(always)]
pub fn set_smf(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 3usize)) | (((val as u32) & 0x01) << 3usize);
}
#[doc = "Timeout flag"]
#[inline(always)]
pub const fn tof(&self) -> bool {
let val = (self.0 >> 4usize) & 0x01;
val != 0
}
#[doc = "Timeout flag"]
#[inline(always)]
pub fn set_tof(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 4usize)) | (((val as u32) & 0x01) << 4usize);
}
#[doc = "Busy"]
#[inline(always)]
pub const fn busy(&self) -> bool {
let val = (self.0 >> 5usize) & 0x01;
val != 0
}
#[doc = "Busy"]
#[inline(always)]
pub fn set_busy(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 5usize)) | (((val as u32) & 0x01) << 5usize);
}
#[doc = "FIFO level"]
#[inline(always)]
pub const fn flevel(&self) -> u8 {
let val = (self.0 >> 8usize) & 0x7f;
val as u8
}
#[doc = "FIFO level"]
#[inline(always)]
pub fn set_flevel(&mut self, val: u8) {
self.0 = (self.0 & !(0x7f << 8usize)) | (((val as u32) & 0x7f) << 8usize);
}
}
impl Default for Sr {
#[inline(always)]
fn default() -> Sr {
Sr(0)
}
}
impl core::fmt::Debug for Sr {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Sr")
.field("tef", &self.tef())
.field("tcf", &self.tcf())
.field("ftf", &self.ftf())
.field("smf", &self.smf())
.field("tof", &self.tof())
.field("busy", &self.busy())
.field("flevel", &self.flevel())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Sr {
fn format(&self, f: defmt::Formatter) {
defmt :: write ! (f , "Sr {{ tef: {=bool:?}, tcf: {=bool:?}, ftf: {=bool:?}, smf: {=bool:?}, tof: {=bool:?}, busy: {=bool:?}, flevel: {=u8:?} }}" , self . tef () , self . tcf () , self . ftf () , self . smf () , self . tof () , self . busy () , self . flevel ())
}
}
}