#![allow(clippy::missing_safety_doc)]
#![allow(clippy::identity_op)]
#![allow(clippy::unnecessary_cast)]
#![allow(clippy::erasing_op)]
#[doc = "Comparator."]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Comp {
ptr: *mut u8,
}
unsafe impl Send for Comp {}
unsafe impl Sync for Comp {}
impl Comp {
#[inline(always)]
pub const unsafe fn from_ptr(ptr: *mut ()) -> Self {
Self { ptr: ptr as _ }
}
#[inline(always)]
pub const fn as_ptr(&self) -> *mut () {
self.ptr as _
}
#[doc = "Comparator control and status register."]
#[inline(always)]
pub const fn csr(self) -> crate::common::Reg<regs::Csr, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0usize) as _) }
}
}
pub mod regs {
#[doc = "control and status register."]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Csr(pub u32);
impl Csr {
#[doc = "Enable"]
#[inline(always)]
pub const fn en(&self) -> bool {
let val = (self.0 >> 0usize) & 0x01;
val != 0
}
#[doc = "Enable"]
#[inline(always)]
pub fn set_en(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 0usize)) | (((val as u32) & 0x01) << 0usize);
}
#[doc = "Power Mode."]
#[inline(always)]
pub const fn pwrmode(&self) -> super::vals::Pwrmode {
let val = (self.0 >> 2usize) & 0x03;
super::vals::Pwrmode::from_bits(val as u8)
}
#[doc = "Power Mode."]
#[inline(always)]
pub fn set_pwrmode(&mut self, val: super::vals::Pwrmode) {
self.0 = (self.0 & !(0x03 << 2usize)) | (((val.to_bits() as u32) & 0x03) << 2usize);
}
#[doc = "Input minus selection bits."]
#[inline(always)]
pub const fn inmsel(&self) -> u8 {
let val = (self.0 >> 4usize) & 0x07;
val as u8
}
#[doc = "Input minus selection bits."]
#[inline(always)]
pub fn set_inmsel(&mut self, val: u8) {
self.0 = (self.0 & !(0x07 << 4usize)) | (((val as u32) & 0x07) << 4usize);
}
#[doc = "Input plus selection bit."]
#[inline(always)]
pub const fn inpsel(&self) -> u8 {
let val = (self.0 >> 7usize) & 0x03;
val as u8
}
#[doc = "Input plus selection bit."]
#[inline(always)]
pub fn set_inpsel(&mut self, val: u8) {
self.0 = (self.0 & !(0x03 << 7usize)) | (((val as u32) & 0x03) << 7usize);
}
#[doc = "Polarity selection bit."]
#[inline(always)]
pub const fn polarity(&self) -> super::vals::Polarity {
let val = (self.0 >> 15usize) & 0x01;
super::vals::Polarity::from_bits(val as u8)
}
#[doc = "Polarity selection bit."]
#[inline(always)]
pub fn set_polarity(&mut self, val: super::vals::Polarity) {
self.0 = (self.0 & !(0x01 << 15usize)) | (((val.to_bits() as u32) & 0x01) << 15usize);
}
#[doc = "Hysteresis selection bits."]
#[inline(always)]
pub const fn hyst(&self) -> super::vals::Hyst {
let val = (self.0 >> 16usize) & 0x03;
super::vals::Hyst::from_bits(val as u8)
}
#[doc = "Hysteresis selection bits."]
#[inline(always)]
pub fn set_hyst(&mut self, val: super::vals::Hyst) {
self.0 = (self.0 & !(0x03 << 16usize)) | (((val.to_bits() as u32) & 0x03) << 16usize);
}
#[doc = "Blanking source selection bits."]
#[inline(always)]
pub const fn blanking(&self) -> super::vals::Blanking {
let val = (self.0 >> 18usize) & 0x07;
super::vals::Blanking::from_bits(val as u8)
}
#[doc = "Blanking source selection bits."]
#[inline(always)]
pub fn set_blanking(&mut self, val: super::vals::Blanking) {
self.0 = (self.0 & !(0x07 << 18usize)) | (((val.to_bits() as u32) & 0x07) << 18usize);
}
#[doc = "Scaler bridge enable."]
#[inline(always)]
pub const fn brgen(&self) -> bool {
let val = (self.0 >> 22usize) & 0x01;
val != 0
}
#[doc = "Scaler bridge enable."]
#[inline(always)]
pub fn set_brgen(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 22usize)) | (((val as u32) & 0x01) << 22usize);
}
#[doc = "Voltage scaler enable bit."]
#[inline(always)]
pub const fn scalen(&self) -> bool {
let val = (self.0 >> 23usize) & 0x01;
val != 0
}
#[doc = "Voltage scaler enable bit."]
#[inline(always)]
pub fn set_scalen(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 23usize)) | (((val as u32) & 0x01) << 23usize);
}
#[doc = "Input minus extended selection bits."]
#[inline(always)]
pub const fn inmesel(&self) -> u8 {
let val = (self.0 >> 25usize) & 0x03;
val as u8
}
#[doc = "Input minus extended selection bits."]
#[inline(always)]
pub fn set_inmesel(&mut self, val: u8) {
self.0 = (self.0 & !(0x03 << 25usize)) | (((val as u32) & 0x03) << 25usize);
}
#[doc = "Output status bit."]
#[inline(always)]
pub const fn value(&self) -> bool {
let val = (self.0 >> 30usize) & 0x01;
val != 0
}
#[doc = "Output status bit."]
#[inline(always)]
pub fn set_value(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 30usize)) | (((val as u32) & 0x01) << 30usize);
}
#[doc = "Register lock bit."]
#[inline(always)]
pub const fn lock(&self) -> bool {
let val = (self.0 >> 31usize) & 0x01;
val != 0
}
#[doc = "Register lock bit."]
#[inline(always)]
pub fn set_lock(&mut self, val: bool) {
self.0 = (self.0 & !(0x01 << 31usize)) | (((val as u32) & 0x01) << 31usize);
}
}
impl Default for Csr {
#[inline(always)]
fn default() -> Csr {
Csr(0)
}
}
impl core::fmt::Debug for Csr {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("Csr")
.field("en", &self.en())
.field("pwrmode", &self.pwrmode())
.field("inmsel", &self.inmsel())
.field("inpsel", &self.inpsel())
.field("polarity", &self.polarity())
.field("hyst", &self.hyst())
.field("blanking", &self.blanking())
.field("brgen", &self.brgen())
.field("scalen", &self.scalen())
.field("inmesel", &self.inmesel())
.field("value", &self.value())
.field("lock", &self.lock())
.finish()
}
}
#[cfg(feature = "defmt")]
impl defmt::Format for Csr {
fn format(&self, f: defmt::Formatter) {
defmt :: write ! (f , "Csr {{ en: {=bool:?}, pwrmode: {:?}, inmsel: {=u8:?}, inpsel: {=u8:?}, polarity: {:?}, hyst: {:?}, blanking: {:?}, brgen: {=bool:?}, scalen: {=bool:?}, inmesel: {=u8:?}, value: {=bool:?}, lock: {=bool:?} }}" , self . en () , self . pwrmode () , self . inmsel () , self . inpsel () , self . polarity () , self . hyst () , self . blanking () , self . brgen () , self . scalen () , self . inmesel () , self . value () , self . lock ())
}
}
}
pub mod vals {
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Blanking {
#[doc = "No blanking."]
NO_BLANKING = 0x0,
#[doc = "TIM1 OC5 selected as blanking source."]
TIM1OC5 = 0x01,
#[doc = "TIM2 OC3 selected as blanking source."]
TIM2OC3 = 0x02,
_RESERVED_3 = 0x03,
_RESERVED_4 = 0x04,
_RESERVED_5 = 0x05,
_RESERVED_6 = 0x06,
_RESERVED_7 = 0x07,
}
impl Blanking {
#[inline(always)]
pub const fn from_bits(val: u8) -> Blanking {
unsafe { core::mem::transmute(val & 0x07) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Blanking {
#[inline(always)]
fn from(val: u8) -> Blanking {
Blanking::from_bits(val)
}
}
impl From<Blanking> for u8 {
#[inline(always)]
fn from(val: Blanking) -> u8 {
Blanking::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Hyst {
NONE = 0x0,
LOW = 0x01,
MEDIUM = 0x02,
HIGH = 0x03,
}
impl Hyst {
#[inline(always)]
pub const fn from_bits(val: u8) -> Hyst {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Hyst {
#[inline(always)]
fn from(val: u8) -> Hyst {
Hyst::from_bits(val)
}
}
impl From<Hyst> for u8 {
#[inline(always)]
fn from(val: Hyst) -> u8 {
Hyst::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Polarity {
#[doc = "Output is not inverted."]
NOT_INVERTED = 0x0,
#[doc = "Output is inverted."]
INVERTED = 0x01,
}
impl Polarity {
#[inline(always)]
pub const fn from_bits(val: u8) -> Polarity {
unsafe { core::mem::transmute(val & 0x01) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Polarity {
#[inline(always)]
fn from(val: u8) -> Polarity {
Polarity::from_bits(val)
}
}
impl From<Polarity> for u8 {
#[inline(always)]
fn from(val: Polarity) -> u8 {
Polarity::to_bits(val)
}
}
#[repr(u8)]
#[derive(Copy, Clone, Debug, Eq, PartialEq, Ord, PartialOrd)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub enum Pwrmode {
#[doc = "High speed / full power."]
HIGH_SPEED = 0x0,
#[doc = "Medium speed / medium power."]
MEDIUM_SPEED = 0x01,
#[doc = "Low speed / low power."]
LOW_SPEED = 0x02,
#[doc = "Very-low speed / ultra-low power."]
VERY_LOW_SPEED = 0x03,
}
impl Pwrmode {
#[inline(always)]
pub const fn from_bits(val: u8) -> Pwrmode {
unsafe { core::mem::transmute(val & 0x03) }
}
#[inline(always)]
pub const fn to_bits(self) -> u8 {
unsafe { core::mem::transmute(self) }
}
}
impl From<u8> for Pwrmode {
#[inline(always)]
fn from(val: u8) -> Pwrmode {
Pwrmode::from_bits(val)
}
}
impl From<Pwrmode> for u8 {
#[inline(always)]
fn from(val: Pwrmode) -> u8 {
Pwrmode::to_bits(val)
}
}
}